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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/llvm-project.

from dc1c41fb6f0 build: use clang-cl for runtimes when targeting Windows adds 182c638fe09 Explicitly remove -stdlib=libc++, as we pass -nostdinc++ an [...] adds 549ddae58f7 Remove `using namespace std;` in __gnu_cxx namespace. adds 236317d2161 Fix missing std:: qualifier in __gnu_cxx::hash_map in C++03 adds 12de5425c19 [NFC][InstSimplify] Add more unary fneg tests to floating-p [...] adds a9c7b2583f2 [sanitizer] Update symbolizer/scripts/global_symbols.txt adds 53f68c57646 [EditLine] Check string pointers before dereferencing them. adds d84d02e1973 Fix IPv6 support on lldb-server platform adds 2fc6b024b98 [CommandInterpreter] Refactor SourceInitFile adds 02b5ca8cd11 GlobalISel: Implement lower for S64->S32 [SU]ITOFP adds 2f29220d6d6 AMDGPU/GlobalISel: Implement s64->s64 [SU]ITOFP adds f9399de525e Unbreak windows build bot adds 348731aeed4 [ELF] Fix TP offset of TLS Variant I after D62059 adds db5cb0fce77 [ELF] Add {i386,x86-64}-tls-le-align.s to test TP offsets f [...] adds 38cc896f002 Revert "Fix IPv6 support on lldb-server platform" adds 8803124d234 [crashlog] Use loads() instead of readPlistFromString() for [...] adds 898896836dd [ELF][X86] Fix R_RELAX_TLS_GD_TO_LE_NEG and R_NEG_TLS after D62059 adds 5f36a28556c [docs][ORC] Start work on an ORC design doc. Very much a wo [...] adds ed2ad77ccb0 [ARM][AArch64] Revert Android Bionic PT_TLS overaligning hack adds 07c96ebd944 Update llvm-nm -s to use a multi-var option adds 82c3f3dae0e [docs] Fix some RST errors. adds 5fab538e2a9 [MinGW] Set the right updated option help for the updated p [...] adds 63621832da6 Suppress false-positive GCC -Wreturn-type warning. adds 2b45a70fd6d MemCmpExpansion::getCompareLoadPairs - assert we find a com [...] adds 4c146ab8c46 ASTNodeImporter - fix uninitialized variable warnings. NFCI. adds 3e95568dcf8 MIGChecker - assert we have a non-null LocationContext. NFCI. adds 30aa42e1451 ScalarExprEmitter::EmitCompoundAssign - fix uninitialized v [...] adds f40c18b628f [analyzer] PR41753: Include complex integer types in NonLoc [...] adds 822b9c971be UpdateTestChecks: arm64-eabi handlind adds 98092f37d0d UpdateTestChecks: fix AMDGPU handling adds d1be3c446ef [NFC][AArch64] Add some ubfx tests with immediates adds b04f3258dd6 GVN: Handle addrspacecast adds e638a891660 [AVR] Fix 'symbol_relocations.s' MC test adds 13ac317e4cf [NFC][AArch64] Autogenerate bitfield-insert.ll, selectcc-to [...] new 1a5d623ded8 [NFC][AArch64] Autogenerate fcopysign.ll test

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Summary of changes: .../StaticAnalyzer/Core/PathSensitive/SVals.h | 2 +- clang/lib/AST/ASTImporter.cpp | 4 +- clang/lib/CodeGen/CGExprScalar.cpp | 2 +- clang/lib/StaticAnalyzer/Checkers/MIGChecker.cpp | 2 + clang/test/Analysis/complex.c | 30 +- clang/test/Analysis/cxx-uninitialized-object.cpp | 21 +- compiler-rt/lib/gwp_asan/CMakeLists.txt | 3 + .../symbolizer/scripts/global_symbols.txt | 1 + libcxx/include/ext/__hash | 27 +- libcxx/include/ext/hash_map | 71 +- libcxx/include/ext/hash_set | 27 +- .../libcxx/containers/gnu_cxx/hash_map.pass.cpp | 7 + .../libcxx/containers/gnu_cxx/hash_set.pass.cpp | 7 +- lld/ELF/InputSection.cpp | 8 +- lld/ELF/Symbols.h | 1 + lld/ELF/Writer.cpp | 13 - lld/MinGW/Options.td | 3 +- lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s | 4 +- lld/test/ELF/aarch64-tls-gdle.s | 4 +- lld/test/ELF/aarch64-tls-iele.s | 6 +- lld/test/ELF/aarch64-tls-le.s | 8 +- lld/test/ELF/aarch64-tlsld-ldst.s | 50 +- lld/test/ELF/arm-tls-le32.s | 12 +- lld/test/ELF/arm-tls-norelax-ie-le.s | 4 +- lld/test/ELF/i386-tls-le-align.s | 29 + lld/test/ELF/x86-64-tls-le-align.s | 16 + lldb/examples/python/crashlog.py | 8 +- lldb/include/lldb/Interpreter/CommandInterpreter.h | 5 +- lldb/source/API/SBCommandInterpreter.cpp | 4 +- lldb/source/Host/common/Editline.cpp | 5 +- lldb/source/Interpreter/CommandInterpreter.cpp | 197 +-- llvm/docs/ORCv2DesignAndImplementation.rst | 248 +++ llvm/docs/index.rst | 5 + .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 4 + llvm/lib/CodeGen/ExpandMemCmp.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 121 ++ llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 38 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 2 + llvm/lib/Transforms/Scalar/GVN.cpp | 1 + .../test/CodeGen/AArch64/arm64-bitfield-extract.ll | 829 +++++++++-- llvm/test/CodeGen/AArch64/bitfield-insert.ll | 329 ++-- llvm/test/CodeGen/AArch64/fcopysign.ll | 46 +- llvm/test/CodeGen/AArch64/selectcc-to-shiftand.ll | 10 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir | 76 + .../CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir | 79 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll | 1575 +++++++++++++++++--- llvm/test/MC/AVR/symbol_relocation.s | 2 +- llvm/test/Transforms/GVN/addrspacecast.ll | 20 + .../InstSimplify/floating-point-arithmetic.ll | 29 + llvm/tools/llvm-nm/llvm-nm.cpp | 7 +- llvm/utils/UpdateTestChecks/asm.py | 11 + llvm/utils/update_llc_test_checks.py | 16 +- 52 files changed, 3245 insertions(+), 788 deletions(-) create mode 100644 lld/test/ELF/i386-tls-le-align.s create mode 100644 lld/test/ELF/x86-64-tls-le-align.s create mode 100644 llvm/docs/ORCv2DesignAndImplementation.rst create mode 100644 llvm/test/Transforms/GVN/addrspacecast.ll