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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/llvm-project.

from 68b4673feaa CodeGen: Preserve packed attribute in constStructWithPadding. adds b18e314a7cb [RISCV] Fix RISCVAsmParser::ParseRegister and add tests adds 997947961a0 [RISCV][NFC] Factor out matchRegisterNameHelper in RISCVAsm [...] adds 6778b53e957 [ELF] De-virtualize findOrphanPos, excludeLibs and handleAR [...] adds 6a6e808b699 [TargetLowering] improve the default expansion of uaddsat/usubsat adds 9a4453592bf [DAGCombine] Fold (x & ~y) | y patterns adds 738146ab333 [LLD][ELF] - Replace one of the tests with a YAML version. adds 30673299d45 [ARM] Add some CBZ constant island tests. NFC adds e0b48a80150 [ARM] Search backwards for CMP when combining into CBZ adds a3a2f9424e0 [InstCombine] add tests for rotate by constant using funnel [...] adds b3bcd957718 [InstCombine] canonicalize rotate right by constant to rotate left adds ef2d9799435 [ConstantRange] Add fromKnownBits() method new 10ba65cc48f [AMDGPU] Regenerate some f16/i16 tests. new d1477e989ce [ARM] Fixed an assumption of power-of-2 vector MVT new e30aa6a1362 [AMDGPU] Prepare for introduction of v3 and v5 MVTs

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Summary of changes: lld/ELF/Driver.cpp | 3 +- lld/ELF/Relocations.cpp | 3 +- lld/ELF/Writer.cpp | 3 +- lld/test/ELF/invalid/Inputs/data-encoding.a | Bin 156 -> 0 bytes lld/test/ELF/invalid/data-encoding.test | 17 + lld/test/ELF/invalid/invalid-elf.test | 4 - llvm/include/llvm/IR/ConstantRange.h | 6 + llvm/lib/Analysis/ValueTracking.cpp | 19 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 22 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 11 + llvm/lib/IR/ConstantRange.cpp | 19 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 7 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 94 ++- llvm/lib/Target/ARM/ARMISelLowering.cpp | 12 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 32 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 27 +- llvm/test/Analysis/CostModel/AMDGPU/add-sub.ll | 15 +- .../Analysis/CostModel/AMDGPU/extractelement.ll | 9 + llvm/test/Analysis/CostModel/AMDGPU/fabs.ll | 10 + llvm/test/Analysis/CostModel/AMDGPU/fadd.ll | 15 +- llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll | 18 +- llvm/test/Analysis/CostModel/AMDGPU/fmul.ll | 15 +- llvm/test/Analysis/CostModel/AMDGPU/fsub.ll | 15 +- llvm/test/Analysis/CostModel/AMDGPU/mul.ll | 15 +- llvm/test/CodeGen/AArch64/sat-add.ll | 24 +- llvm/test/CodeGen/AArch64/uadd_sat_vec.ll | 21 +- .../unfold-masked-merge-scalar-variablemask.ll | 6 +- ...nfold-masked-merge-vector-variablemask-const.ll | 7 +- llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 173 +++- llvm/test/CodeGen/AMDGPU/call-return-types.ll | 42 +- llvm/test/CodeGen/AMDGPU/calling-conventions.ll | 90 ++ llvm/test/CodeGen/AMDGPU/kernel-args.ll | 116 +++ llvm/test/CodeGen/AMDGPU/max.i16.ll | 412 +++++++++- llvm/test/CodeGen/AMDGPU/select.f16.ll | 912 +++++++++++++++++---- llvm/test/CodeGen/AMDGPU/v_madak_f16.ll | 131 ++- llvm/test/CodeGen/Thumb2/constant-islands-cbz.ll | 67 ++ llvm/test/CodeGen/Thumb2/constant-islands-cbz.mir | 276 +++++++ .../X86/unfold-masked-merge-scalar-variablemask.ll | 12 +- ...nfold-masked-merge-vector-variablemask-const.ll | 49 +- llvm/test/MC/RISCV/cfi-regs-invalid.s | 7 + llvm/test/MC/RISCV/cfi-regs-valid.s | 137 ++++ llvm/test/Transforms/InstCombine/fsh.ll | 40 +- llvm/unittests/IR/ConstantRangeTest.cpp | 65 ++ 43 files changed, 2572 insertions(+), 406 deletions(-) delete mode 100644 lld/test/ELF/invalid/Inputs/data-encoding.a create mode 100644 lld/test/ELF/invalid/data-encoding.test create mode 100644 llvm/test/CodeGen/Thumb2/constant-islands-cbz.ll create mode 100644 llvm/test/CodeGen/Thumb2/constant-islands-cbz.mir create mode 100644 llvm/test/MC/RISCV/cfi-regs-invalid.s create mode 100644 llvm/test/MC/RISCV/cfi-regs-valid.s