This is an automated email from the git hooks/post-receive script.

unknown user pushed a change to branch master in repository gcc.

from 22175d0dc6a tree-optimization/97706 - handle PHIs in pattern recog mask [...] new d3989492307 make PRE constant value IDs negative new 9b11203e33f Add -fbit-tests option. new 6c3ce63b04b aarch64: Support permutes on unpacked SVE vectors new 4b5f564a5d9 libcpp: Provide date routine new 05f1883cfd0 aarch64: Use intrinsics for upper saturating shift right new ba6498124c3 core: Rename DECL_IS_BUILTIN -> DECL_IS_UNDECLARED_BUILTIN new 25126a28dbe Add PC as control register

The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: gcc/c-family/c-ada-spec.c | 8 +- gcc/c-family/c-common.c | 11 +- gcc/c/c-decl.c | 14 +- gcc/c/c-typeck.c | 10 +- gcc/calls.c | 2 +- gcc/cfgexpand.c | 2 +- gcc/common.opt | 4 + gcc/config/aarch64/aarch64-builtins.c | 6 + gcc/config/aarch64/aarch64-modes.def | 4 + gcc/config/aarch64/aarch64-simd-builtins.def | 7 + gcc/config/aarch64/aarch64-simd.md | 11 + gcc/config/aarch64/aarch64-sve.md | 57 ++- gcc/config/aarch64/aarch64.c | 45 +-- gcc/config/aarch64/arm_neon.h | 360 ++++++------------ gcc/config/aarch64/iterators.md | 54 ++- gcc/config/rx/rx.c | 8 + gcc/config/rx/rx.md | 1 + gcc/cp/cp-objcp-common.c | 5 +- gcc/cp/cp-tree.h | 5 - gcc/cp/decl.c | 16 +- gcc/cp/decl2.c | 2 +- gcc/cp/name-lookup.c | 6 +- gcc/cp/pt.c | 2 +- gcc/cp/typeck.c | 2 +- gcc/doc/invoke.texi | 8 +- gcc/dwarf2out.c | 6 +- gcc/go/go-gcc.cc | 2 +- gcc/godump.c | 4 +- gcc/lto/lto-symtab.c | 4 +- gcc/print-tree.c | 2 +- .../gcc.dg/tree-ssa/{switch-2.c => switch-4.c} | 4 +- .../aarch64/advsimd-intrinsics/vqrshrn_high_n.c | 192 ++++++++++ .../aarch64/advsimd-intrinsics/vqrshrun_high_n.c | 194 ++++++++++ .../aarch64/advsimd-intrinsics/vqshrn_high_n.c | 190 ++++++++++ .../aarch64/advsimd-intrinsics/vqshrun_high_n.c | 140 +++++++ .../gcc.target/aarch64/narrow_high-intrinsics.c | 12 +- gcc/testsuite/gcc.target/aarch64/sve/dup_lane_2.c | 331 +++++++++++++++++ gcc/testsuite/gcc.target/aarch64/sve/dup_lane_3.c | 90 +++++ gcc/testsuite/gcc.target/aarch64/sve/ext_4.c | 353 ++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/sve/rev_2.c | 177 +++++++++ gcc/testsuite/gcc.target/aarch64/sve/revhw_1.c | 127 +++++++ gcc/testsuite/gcc.target/aarch64/sve/revhw_2.c | 127 +++++++ gcc/testsuite/gcc.target/aarch64/sve/slp_perm_8.c | 18 + gcc/testsuite/gcc.target/aarch64/sve/trn1_2.c | 403 +++++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/sve/trn2_2.c | 403 +++++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/sve/uzp1_2.c | 375 +++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/sve/uzp2_2.c | 375 +++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/sve/zip1_2.c | 403 +++++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/sve/zip2_2.c | 403 +++++++++++++++++++++ gcc/tree-pretty-print.c | 2 +- gcc/tree-ssa-ccp.c | 2 +- gcc/tree-ssa-pre.c | 57 ++- gcc/tree-ssa-sccvn.c | 34 +- gcc/tree-ssa-sccvn.h | 12 +- gcc/tree-switch-conversion.c | 3 + gcc/tree-switch-conversion.h | 6 + gcc/tree.h | 16 +- gcc/xcoffout.c | 2 +- libcc1/libcc1plugin.cc | 2 +- libcc1/libcp1plugin.cc | 2 +- libcpp/include/cpplib.h | 9 + libcpp/init.c | 5 +- libcpp/internal.h | 7 +- libcpp/macro.c | 83 +++-- 64 files changed, 4774 insertions(+), 453 deletions(-) copy gcc/testsuite/gcc.dg/tree-ssa/{switch-2.c => switch-4.c} (68%) create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/dup_lane_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/dup_lane_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/ext_4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/rev_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/revhw_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/revhw_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/slp_perm_8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/trn1_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/trn2_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/uzp1_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/uzp2_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/zip1_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/zip2_2.c