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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig in repository toolchain/ci/llvm-project.

from 6b77ebdc919 [NFC] Strip trailing whitespace from libc++ adds bf2975eca0a Remove a no longer accurate sentence from the coding standards. adds 7c9844b66e5 [libcxx][NFC] Strip trailing whitespace, fix typo. adds 23fdd513a3b Improve language in GettingStarted.rst adds bf869683c3f Use portable flag with nm in extract_symbols.py adds dc1499b90dc Improve Clang's getting involved document and make it more [...] adds da6384fbb9f Add beginning of LLVM's GettingStarted to GitHub readme adds e3d26b42b95 [Hexagon] Fix typo. NFC adds 61e7a61bdcc [AMDGPU] Allow folding of sgpr to vgpr copy adds 7f1ffef567a [X86] Replace some regular expressions in xray tests with e [...] adds 1d7f79c0171 [MIPS GlobalISel] MSA vector generic and builtin sdiv, srem [...] adds 914ce66413e [MIPS GlobalISel] MSA vector generic and builtin fadd, fsub [...] adds bf71e4fe0a6 [clangd] Collect name references in the index. adds 13fc899cdec [clangd] Handle the missing constructor initializers in fin [...] adds bfa3f0c3166 Hide implementation details in anonymous namespaces. NFC. adds 73cebfe4128 [libFuzzer] docs: update note to include REDUCE event. adds 612eadb7bc0 Expose __hwasan_tag_mismatch_stub adds 93aec861f52 Revert "Expose __hwasan_tag_mismatch_stub" adds 6d11abfe350 [compiler-rt] Expose __hwasan_tag_mismatch_stub adds 1ae8e8d25fd Don't add -fsplit-lto-unit for thin LTO builds with PS4 and [...] adds e3b49df50e4 [MIPS GlobalISel] Select MSA vector generic and builtin fabs adds c84cfaf9bc8 [docs] Update link to the MIPS 64-bit ELF object file speci [...] adds fd77e578e96 [docs] Add Mips as a supported architecture in GettingStarted.rst adds ed913a29153 [clangd] Fix case of variables and functions in code comple [...] adds 950b800c451 Fix compilation warning on the trailing whitespace. NFC. adds b2a65f0d70f [AMDGPU] Skip additional folding on the same operand. adds 1b45297e013 [ARM] Begin adding IR intrinsics for MVE instructions. adds ceeff95ca48 [ARM] Add some sample IR MVE intrinsics with C++ isel. adds e0ef4ebe2f6 [ARM] Add IR intrinsics for MVE VLD[24] and VST[24]. adds 7c11da0cfd3 [clang] New __attribute__((__clang_arm_mve_alias)). adds 08074cc9655 [clang,ARM] Initial ACLE intrinsics for MVE. adds e5f485c3bd9 [InstCombine] Known-bits optimization for ARM MVE VADC. adds 78207e1f234 [NFC][XCOFF][AIX] Serialize object file writing for each Cs [...] adds 6f0bb770370 [InstCombine] Fold one-use variable into assert adds 6d0fc4373e9 [NFC] Remove redundant lines adds 6c5898ef79f [llvm-ifs][NFC] Adds TODO comment for dropping ObjectFileFo [...] new 0c798aa4483 [CMake] Split logic across test suite subdirectories (NFC) new 5da6d4ec164 Speculative build fix for GCC 5.3.0 new 3c8e055187d [AMDGPU] Fix mfma scheduling crash new ec66603ac7e [clang-format] Remove the dependency on frontend

The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: README.md | 99 ++ clang-tools-extra/clangd/FindTarget.cpp | 20 +- clang-tools-extra/clangd/index/SymbolCollector.cpp | 4 - .../clangd/unittests/CodeCompleteTests.cpp | 32 +- .../clangd/unittests/FindTargetTests.cpp | 39 + .../clangd/unittests/SymbolCollectorTests.cpp | 17 + clang/include/clang/Basic/Attr.td | 7 + clang/include/clang/Basic/AttrDocs.td | 22 + clang/include/clang/Basic/BuiltinsARM.def | 5 + clang/include/clang/Basic/CMakeLists.txt | 14 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 8 + clang/include/clang/Basic/arm_mve.td | 121 ++ clang/include/clang/Basic/arm_mve_defs.td | 325 ++++ clang/include/clang/Driver/ToolChain.h | 4 + clang/include/clang/Sema/Sema.h | 4 + clang/lib/AST/Decl.cpp | 16 +- clang/lib/CodeGen/CGBuiltin.cpp | 120 +- clang/lib/CodeGen/CodeGenFunction.h | 7 +- clang/lib/Driver/ToolChains/Clang.cpp | 4 +- clang/lib/Driver/ToolChains/Darwin.h | 3 + clang/lib/Driver/ToolChains/PS4CPU.h | 4 + clang/lib/Headers/CMakeLists.txt | 2 + clang/lib/Sema/SemaChecking.cpp | 105 ++ clang/lib/Sema/SemaDeclAttr.cpp | 34 + clang/lib/Sema/SemaType.cpp | 6 +- .../CodeGen/arm-mve-intrinsics/scalar-shifts.c | 23 + clang/test/CodeGen/arm-mve-intrinsics/vadc.c | 89 + clang/test/CodeGen/arm-mve-intrinsics/vaddq.c | 65 + clang/test/CodeGen/arm-mve-intrinsics/vcvt.c | 26 + clang/test/CodeGen/arm-mve-intrinsics/vld24.c | 100 ++ clang/test/CodeGen/arm-mve-intrinsics/vldr.c | 48 + clang/test/CodeGen/arm-mve-intrinsics/vminvq.c | 97 ++ clang/test/Driver/split-lto-unit.c | 4 + ...pragma-attribute-supported-attributes-list.test | 1 + clang/test/Sema/arm-mve-alias-attribute.c | 22 + clang/tools/clang-format/CMakeLists.txt | 1 - clang/tools/clang-format/ClangFormat.cpp | 40 +- clang/utils/TableGen/CMakeLists.txt | 1 + clang/utils/TableGen/MveEmitter.cpp | 1692 ++++++++++++++++++++ clang/utils/TableGen/TableGen.cpp | 30 + clang/utils/TableGen/TableGenBackends.h | 6 + clang/www/get_involved.html | 71 +- compiler-rt/lib/hwasan/hwasan_interface_internal.h | 4 + compiler-rt/lib/hwasan/hwasan_linux.cpp | 35 +- .../lib/hwasan/hwasan_tag_mismatch_aarch64.S | 4 +- .../benchmarks/unordered_set_operations.bench.cpp | 4 +- libcxx/src/chrono.cpp | 2 +- libcxx/src/filesystem/operations.cpp | 2 +- libcxx/src/locale.cpp | 4 +- libcxx/src/support/solaris/xlocale.cpp | 2 +- libcxx/src/support/win32/support.cpp | 12 +- libcxx/src/thread.cpp | 2 +- .../std/numerics/bit/bit.pow.two/floor2.pass.cpp | 4 +- .../std/numerics/bit/bit.pow.two/ispow2.pass.cpp | 6 +- .../std/numerics/bit/bit.pow.two/log2p1.pass.cpp | 4 +- .../numerics/bit/bitops.count/countl_one.pass.cpp | 2 +- .../numerics/bit/bitops.count/countl_zero.pass.cpp | 4 +- .../numerics/bit/bitops.count/countr_one.pass.cpp | 4 +- .../numerics/bit/bitops.count/countr_zero.pass.cpp | 4 +- .../numerics/bit/bitops.count/popcount.pass.cpp | 4 +- .../optional.object.ctor/ctor.fail.cpp | 4 +- .../utilities/time/time.hms/time.12/is_am.pass.cpp | 2 +- .../time.hms/time.hms.members/is_negative.pass.cpp | 4 +- .../time.hms/time.hms.members/precision.pass.cpp | 2 +- .../time.hms.members/precision_type.pass.cpp | 2 +- lldb/test/API/CMakeLists.txt | 39 +- lldb/test/CMakeLists.txt | 91 +- lldb/test/Shell/CMakeLists.txt | 9 + lldb/test/Unit/CMakeLists.txt | 7 + llvm/docs/CodingStandards.rst | 3 +- llvm/docs/CompilerWriterInfo.rst | 2 +- llvm/docs/GettingStarted.rst | 38 +- llvm/docs/LibFuzzer.rst | 8 +- llvm/include/llvm/IR/IntrinsicsARM.td | 56 + .../lib/DebugInfo/CodeView/SymbolRecordHelpers.cpp | 2 +- llvm/lib/LTO/ThinLTOCodeGenerator.cpp | 2 + llvm/lib/MC/XCOFFObjectWriter.cpp | 292 ++-- llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp | 4 - llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 7 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 31 +- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 247 +++ llvm/lib/Target/ARM/ARMISelLowering.cpp | 4 + llvm/lib/Target/ARM/ARMInstrMVE.td | 235 ++- .../Hexagon/HexagonVectorLoopCarriedReuse.cpp | 2 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 57 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 14 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 13 + llvm/test/CodeGen/AMDGPU/fold-imm-copy.mir | 18 + llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir | 25 +- llvm/test/CodeGen/AMDGPU/mfma-loop.ll | 34 + llvm/test/CodeGen/AMDGPU/operand-folding.ll | 24 + llvm/test/CodeGen/AMDGPU/saddo.ll | 28 +- .../GlobalISel/instruction-select/fabs_vec.mir | 60 + .../floating_point_vec_arithmetic_operations.mir | 257 +++ .../instruction-select/rem_and_div_vec.mir | 505 ++++++ .../CodeGen/Mips/GlobalISel/legalizer/fabs_vec.mir | 56 + .../Mips/GlobalISel/legalizer/fabs_vec_builtin.mir | 59 + .../floating_point_vec_arithmetic_operations.mir | 241 +++ ...ing_point_vec_arithmetic_operations_builtin.mir | 253 +++ .../Mips/GlobalISel/legalizer/rem_and_div_vec.mir | 473 ++++++ .../legalizer/rem_and_div_vec_builtin.mir | 501 ++++++ .../CodeGen/Mips/GlobalISel/llvm-ir/fabs_vec.ll | 34 + .../Mips/GlobalISel/llvm-ir/fabs_vec_builtin.ll | 35 + .../floating_point_vec_arithmetic_operations.ll | 145 ++ ...ting_point_vec_arithmetic_operations_builtin.ll | 146 ++ .../Mips/GlobalISel/llvm-ir/rem_and_div_vec.ll | 274 ++++ .../GlobalISel/llvm-ir/rem_and_div_vec_builtin.ll | 290 ++++ .../Mips/GlobalISel/regbankselect/fabs_vec.mir | 58 + .../floating_point_vec_arithmetic_operations.mir | 249 +++ .../GlobalISel/regbankselect/rem_and_div_vec.mir | 489 ++++++ .../CodeGen/Thumb2/mve-intrinsics/scalar-shifts.ll | 23 + .../CodeGen/Thumb2/mve-intrinsics/vadc-multiple.ll | 87 + llvm/test/CodeGen/Thumb2/mve-intrinsics/vadc.ll | 98 ++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vaddq.ll | 112 ++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vcvt.ll | 56 + llvm/test/CodeGen/Thumb2/mve-intrinsics/vld24.ll | 109 ++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vldr.ll | 62 + llvm/test/CodeGen/Thumb2/mve-intrinsics/vminvq.ll | 36 + llvm/test/CodeGen/X86/xray-custom-log.ll | 8 +- llvm/test/CodeGen/X86/xray-typed-event-log.ll | 12 +- llvm/tools/llvm-ifs/llvm-ifs.cpp | 1 + llvm/utils/extract_symbols.py | 4 +- 122 files changed, 8998 insertions(+), 482 deletions(-) create mode 100644 clang/include/clang/Basic/arm_mve.td create mode 100644 clang/include/clang/Basic/arm_mve_defs.td create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/scalar-shifts.c create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vadc.c create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vaddq.c create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vcvt.c create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vld24.c create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vldr.c create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vminvq.c create mode 100644 clang/test/Sema/arm-mve-alias-attribute.c create mode 100644 clang/utils/TableGen/MveEmitter.cpp create mode 100644 lldb/test/Shell/CMakeLists.txt create mode 100644 lldb/test/Unit/CMakeLists.txt create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/fabs_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/floating_p [...] create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/rem_and_di [...] create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/fabs_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/fabs_vec_builtin.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/floating_point_vec_ [...] create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/floating_point_vec_ [...] create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/rem_and_div_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/rem_and_div_vec_bui [...] create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fabs_vec.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fabs_vec_builtin.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/floating_point_vec_ar [...] create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/floating_point_vec_ar [...] create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/rem_and_div_vec.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/rem_and_div_vec_builtin.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/fabs_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/floating_point_ [...] create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/rem_and_div_vec.mir create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/scalar-shifts.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vadc-multiple.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vadc.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vaddq.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vcvt.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vld24.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vldr.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vminvq.ll