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from e574f76b8f5 [SelectionDAG] Add SIGN_EXTEND_VECTOR_INREG and CONCAT_VECT [...] new 968d0cc02d8 [x86] use demanded bits to simplify masked store codegen

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Summary of changes: lib/Target/X86/X86ISelLowering.cpp | 33 ++++++++++++++++----------------- test/CodeGen/X86/masked_memop.ll | 6 +----- 2 files changed, 17 insertions(+), 22 deletions(-)