This is an automated email from the git hooks/post-receive script.

unknown user pushed a change to branch master in repository llvm.

from a5895f1adac Revert [WinEH] Allocate space in funclets stack to save XMM CSRs new 431ef0cefb0 [DAGCombiner][X86] Teach visitCONCAT_VECTORS to combine (co [...] new bb5c0f6c915 [AArch64][GlobalISel] Select patterns which use shifted reg [...]

The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 9 + lib/Target/AArch64/AArch64InstrFormats.td | 16 + lib/Target/AArch64/AArch64InstructionSelector.cpp | 73 ++++ lib/Target/X86/X86ISelLowering.cpp | 14 + .../GlobalISel/select-arith-shifted-reg.mir | 395 +++++++++++++++++++++ .../GlobalISel/select-logical-shifted-reg.mir | 75 ++++ test/CodeGen/AArch64/addsub-shifted.ll | 41 ++- test/CodeGen/AArch64/eon.ll | 3 + test/CodeGen/X86/avx512vl-vec-masked-cmp.ll | 30 -- test/CodeGen/X86/oddshuffles.ll | 128 +++---- test/CodeGen/X86/vec_saddo.ll | 58 +-- test/CodeGen/X86/vec_smulo.ll | 2 +- test/CodeGen/X86/vec_ssubo.ll | 56 +-- test/CodeGen/X86/vec_uaddo.ll | 10 +- test/CodeGen/X86/vec_umulo.ll | 86 ++--- test/CodeGen/X86/vec_usubo.ll | 10 +- 16 files changed, 801 insertions(+), 205 deletions(-) create mode 100644 test/CodeGen/AArch64/GlobalISel/select-arith-shifted-reg.mir create mode 100644 test/CodeGen/AArch64/GlobalISel/select-logical-shifted-reg.mir