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from 3a6eaef3ccd Revert "ExecutionEngine: add R_AARCH64_ABS{16,32}" new 5994e167a78 [SystemZ] Fix truncstore + bswap codegen bug new 60873e298c9 [AMDGPU] Prevent post-RA scheduler from breaking memory clauses new 6fe45f97227 [SimplifyCFG] fix typos/formatting; NFC

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Summary of changes: lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 54 ++++++++++++++++++++++ lib/Target/AMDGPU/AMDGPUSubtarget.h | 4 ++ lib/Target/SystemZ/SystemZISelLowering.cpp | 3 +- lib/Transforms/Utils/SimplifyCFG.cpp | 46 +++++++++--------- test/CodeGen/AMDGPU/and.ll | 2 +- test/CodeGen/AMDGPU/ashr.v2i16.ll | 8 ++-- test/CodeGen/AMDGPU/br_cc.f16.ll | 10 ++-- test/CodeGen/AMDGPU/call-argument-types.ll | 16 +++---- test/CodeGen/AMDGPU/callee-special-input-vgprs.ll | 2 +- test/CodeGen/AMDGPU/cluster-flat-loads-postra.mir | 31 +++++++++++++ test/CodeGen/AMDGPU/fcopysign.f16.ll | 4 +- test/CodeGen/AMDGPU/fcopysign.f64.ll | 3 +- test/CodeGen/AMDGPU/frame-index-amdgiz.ll | 4 +- test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll | 4 +- test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll | 13 +++--- test/CodeGen/AMDGPU/load-global-i32.ll | 32 ++++++------- test/CodeGen/AMDGPU/load-weird-sizes.ll | 4 +- test/CodeGen/AMDGPU/lshr.v2i16.ll | 6 +-- .../AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll | 4 +- test/CodeGen/AMDGPU/salu-to-valu.ll | 4 +- test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll | 10 ++-- test/CodeGen/AMDGPU/select-vectors.ll | 6 +-- test/CodeGen/AMDGPU/select.f16.ll | 18 ++++---- test/CodeGen/AMDGPU/shl.v2i16.ll | 8 ++-- test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 11 +++-- test/CodeGen/AMDGPU/v_cndmask.ll | 2 +- test/CodeGen/AMDGPU/wqm.ll | 4 +- test/CodeGen/SystemZ/bswap-08.ll | 17 +++++++ 28 files changed, 218 insertions(+), 112 deletions(-) create mode 100644 test/CodeGen/AMDGPU/cluster-flat-loads-postra.mir create mode 100644 test/CodeGen/SystemZ/bswap-08.ll