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from 4c19071b5b4 ARM: don't try to over-align large vectors as arguments. new 2cc6ed7b2eb [X86] Split WriteVecALU/WritePHAdd into XMM and YMM/ZMM sch [...] new e14cfef0896 [CodeGen][X86][NFC] Copy two selectcc tests from AArch64.

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Summary of changes: lib/Target/X86/X86InstrSSE.td | 36 +-- lib/Target/X86/X86SchedBroadwell.td | 69 +----- lib/Target/X86/X86SchedHaswell.td | 125 +--------- lib/Target/X86/X86SchedSandyBridge.td | 116 ++-------- lib/Target/X86/X86SchedSkylakeClient.td | 153 +------------ lib/Target/X86/X86SchedSkylakeServer.td | 331 +-------------------------- lib/Target/X86/X86Schedule.td | 6 +- lib/Target/X86/X86ScheduleAtom.td | 2 + lib/Target/X86/X86ScheduleBtVer2.td | 2 + lib/Target/X86/X86ScheduleSLM.td | 2 + lib/Target/X86/X86ScheduleZnver1.td | 2 + test/CodeGen/X86/avx2-schedule.ll | 262 ++++++++++----------- test/CodeGen/X86/avx512-schedule.ll | 86 +++---- test/CodeGen/X86/avx512vpopcntdq-schedule.ll | 60 ++--- test/CodeGen/X86/icmp-opt.ll | 27 +++ test/CodeGen/X86/selectcc-to-shiftand.ll | 200 ++++++++++++++++ test/CodeGen/X86/sse4a-schedule.ll | 8 +- test/CodeGen/X86/xop-schedule.ll | 32 +-- 18 files changed, 541 insertions(+), 978 deletions(-) create mode 100644 test/CodeGen/X86/icmp-opt.ll create mode 100644 test/CodeGen/X86/selectcc-to-shiftand.ll