This is an automated email from the git hooks/post-receive script.

unknown user pushed a change to branch master in repository llvm.

from a0250a0ae6f [Local] Remove unused LazyValueInfo pointer from removeUnre [...] new 8db4d72fa53 [AMDGPU] Extend buffer intrinsics with swizzling new 0312be25f1c gn build: Merge r373489

The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: include/llvm/IR/IntrinsicsAMDGPU.td | 40 ++- lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 32 ++- lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 25 +- lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 4 + lib/Target/AMDGPU/BUFInstructions.td | 296 ++++++++++++--------- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 4 + lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 2 + lib/Target/AMDGPU/SIFrameLowering.cpp | 4 + lib/Target/AMDGPU/SIISelLowering.cpp | 16 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 2 + lib/Target/AMDGPU/SIInstrInfo.td | 9 +- lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 8 + lib/Target/AMDGPU/SIRegisterInfo.cpp | 2 + lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 41 +++ lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 18 ++ .../AMDGPU/GlobalISel/inst-select-load-private.mir | 92 +++---- .../GlobalISel/inst-select-store-private.mir | 36 +-- .../llvm.amdgcn.raw.buffer.store.format.f16.ll | 44 +-- .../llvm.amdgcn.raw.buffer.store.format.f32.ll | 24 +- .../GlobalISel/llvm.amdgcn.raw.buffer.store.ll | 66 ++--- test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir | 42 +-- test/CodeGen/AMDGPU/clamp-omod-special-case.mir | 24 +- .../AMDGPU/coalescer-extend-pruned-subrange.mir | 4 +- ...coalescer-subranges-another-copymi-not-live.mir | 2 +- .../coalescer-subranges-another-prune-error.mir | 2 +- .../AMDGPU/coalescer-subregjoin-fullcopy.mir | 6 +- .../coalescer-with-subregs-bad-identical.mir | 2 +- test/CodeGen/AMDGPU/collapse-endcf.mir | 64 ++--- test/CodeGen/AMDGPU/collapse-endcf2.mir | 8 +- test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 8 +- test/CodeGen/AMDGPU/couldnt-join-subrange-3.mir | 2 +- test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll | 4 +- test/CodeGen/AMDGPU/fold-fi-mubuf.mir | 24 +- test/CodeGen/AMDGPU/fold-imm-copy.mir | 2 +- test/CodeGen/AMDGPU/fold-imm-f16-f32.mir | 78 +++--- test/CodeGen/AMDGPU/fold-immediate-output-mods.mir | 24 +- test/CodeGen/AMDGPU/fold-multiple.mir | 2 +- .../AMDGPU/hazard-buffer-store-v-interp.mir | 2 +- test/CodeGen/AMDGPU/hazard-hidden-bundle.mir | 4 +- test/CodeGen/AMDGPU/indirect-addressing-term.ll | 2 +- test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir | 4 +- test/CodeGen/AMDGPU/insert-waitcnts-exp.mir | 8 +- test/CodeGen/AMDGPU/inserted-wait-states.mir | 16 +- test/CodeGen/AMDGPU/invert-br-undef-vcc.mir | 6 +- test/CodeGen/AMDGPU/lds-branch-vmem-hazard.mir | 32 +-- test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll | 40 +++ .../CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll | 31 +++ .../AMDGPU/memory-legalizer-atomic-insert-end.mir | 2 +- ...ory-legalizer-multiple-mem-operands-atomics.mir | 6 +- ...galizer-multiple-mem-operands-nontemporal-1.mir | 6 +- ...galizer-multiple-mem-operands-nontemporal-2.mir | 6 +- test/CodeGen/AMDGPU/memory_clause.mir | 4 +- test/CodeGen/AMDGPU/merge-load-store.mir | 24 +- test/CodeGen/AMDGPU/mubuf-legalize-operands.mir | 30 +-- test/CodeGen/AMDGPU/nsa-vmem-hazard.mir | 10 +- test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir | 6 +- test/CodeGen/AMDGPU/optimize-if-exec-masking.mir | 48 ++-- test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir | 4 +- test/CodeGen/AMDGPU/phi-elimination-end-cf.mir | 2 +- test/CodeGen/AMDGPU/power-sched-no-instr-sunit.mir | 2 +- test/CodeGen/AMDGPU/regcoal-subrange-join-seg.mir | 2 +- test/CodeGen/AMDGPU/regcoalesce-dbg.mir | 2 +- .../rename-independent-subregs-mac-operands.mir | 8 +- ...hed-assert-dead-def-subreg-use-other-subreg.mir | 4 +- test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 8 +- test/CodeGen/AMDGPU/schedule-barrier.mir | 4 +- test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 36 +-- .../CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir | 12 +- test/CodeGen/AMDGPU/vmem-to-salu-hazard.mir | 24 +- test/CodeGen/AMDGPU/vmem-vcc-hazard.mir | 20 +- test/CodeGen/AMDGPU/waitcnt-loop-irreducible.mir | 4 +- .../MIR/AMDGPU/expected-target-index-name.mir | 2 +- .../MIR/AMDGPU/invalid-target-index-operand.mir | 2 +- test/CodeGen/MIR/AMDGPU/load-store-opt-dlc.mir | 28 +- test/CodeGen/MIR/AMDGPU/mir-canon-multi.mir | 4 +- .../MIR/AMDGPU/parse-order-reserved-regs.mir | 4 +- test/CodeGen/MIR/AMDGPU/target-index-operands.mir | 4 +- .../clang-tidy/cppcoreguidelines/BUILD.gn | 1 + 78 files changed, 888 insertions(+), 639 deletions(-)