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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/llvm-project.

from c0aa97b6327 [X86] Add cost model test cases for fmin/fmax reduction. adds 4bf015c035e [AlignmentFromAssumptions] Fix a SCEV assertion resulting f [...] adds 6dab8067123 [mlir] Add exp2 conversion to llvm.intr.exp2 adds a7115d51be0 [X86] X86CallFrameOptimization - generalize slow push code path adds 6ba63510720 [PostOrderIterator] Use SmallVector to store stack; NFC adds 49d00824bbb [VPlan] Use one VPWidenRecipe per original IR instruction. (NFC). adds b632bd88a63 [mlir] NFC: fix trivial typo in documents adds 10439f9e32e [X86][AVX] Add X86ISD::VALIGN target shuffle decode support adds da4c7db793a [X86] Rename matchShuffleAsByteRotate to matchShuffleAsElem [...] adds 7734e4b3a36 [X86][AVX] Combine 128-bit lane shuffles with a zeroable up [...] adds 1e363023b82 [InstCombine] Use replaceOperand() in a few more places adds 6f07a9e80ab [InstCombine] Erase original add when creating saddo adds 28f67bd5c56 [InstCombine] Fix worklist management in varargs transform adds 99913ef3d14 [OpenMP] set_bits iterator yields unsigned elements, no ref [...] adds 26fa33755f1 [InstCombine] Simplify select of cmpxchg transform adds b44f07045c5 Remove unnecessary empty comments from test check lines. NFC. adds 443dcc0e008 [X86][AVX] Add tests for 512-bit shuffle patterns that coul [...] adds febcb24f149 [InstCombine] make test independent of branch undef/UB; NFC adds fc3cc8a4b07 [VectorCombine] skip debug intrinsics first for efficiency adds 97bbe7ad2a9 AMDGPU: Fix typo adds 0b68ca51623 AMDGPU: Add some additional tests for v_cvt_ubyte* formation adds ab7a41069eb AMDGPU: Fix using wrong instruction for FP conversion adds d15723ef065 AMDGPU/GlobalISel: Remove redundant virtual adds cce3d96bcc6 GlobalISel: Add matcher for G_SHL adds c0955edfd6e Introduce support for lib function aligned_alloc in TLI / m [...] adds a9ddcd6411b [InstCombine] Erase old add when optimizing add overflow adds 0c871400658 [InstCombine] Use replaceOperand() in assoc cast simplification adds 4e4ea2cde44 [MLIR] Add missing asserts in interchangeLoops util, doc co [...] adds 53d209076aa [InstCombine] Use replaceOperand() in demanded elements sim [...] adds 8253a86b65c [InstCombine] Erase old mul when creating umulo adds 8206c50cdec [X86] Add isAnyZero shuffle mask helper adds fe0723dc9d4 Fix -Wdocumentation warning. NFC. adds 9c8ec99c80a [X86][AVX] Combine 128/256-bit lane shuffles with zeroable [...] adds 15f1fe1506f clang-format fixes in ClangTidyDiagnosticConsumer.cpp and D [...] adds b9d9968f63a [clangd] Handle clang-tidy suppression comments for diagnos [...] adds 854f268ca62 [MC] Move deprecation infos from MCTargetDesc to MCInstrInfo adds 6628c525cba [gn build] Port 854f268ca62 adds 7c1a6873aa5 [ARM] VMOV.64 immediate tests. NFC adds 00c76f34962 [ELF][test] Improve arm-exidx-output.s to test different ou [...] adds a5458bb0d6b Don't claim template names that name non-templates are undeclared. adds 6e0afb5f108 [ARMMVE] Create fewer temporary SmallVectors adds 2451e4c5978 [X86] Add sse4.2 command lines to min/max reduction tests. adds 24562c6588b [InstCombine] Add tests for trunc (extelt x); (NFC) Baselin [...] adds d74533a18b8 [X86] Add sse4.1 RUNs lines to the min/max reduction cost m [...] new 12f6b024f9f Revert "[libc++] NFC: Simplify substitutions by using lit r [...]

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Summary of changes: .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 87 ++- .../clang-tidy/ClangTidyDiagnosticConsumer.h | 11 +- clang-tools-extra/clangd/ParsedAST.cpp | 9 +- .../clangd/unittests/DiagnosticsTests.cpp | 29 +- clang/include/clang/AST/PrettyPrinter.h | 3 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 3 +- clang/include/clang/Sema/Sema.h | 32 +- clang/lib/Sema/SemaTemplate.cpp | 30 +- clang/test/SemaCXX/pseudo-destructors.cpp | 13 + clang/utils/TableGen/MveEmitter.cpp | 4 +- libcxx/test/lit.cfg | 2 - libcxx/utils/libcxx/test/config.py | 39 +- libcxx/utils/libcxx/test/format.py | 3 +- lld/test/ELF/arm-exidx-link.s | 25 - lld/test/ELF/arm-exidx-output.s | 34 +- llvm/include/llvm/ADT/PostOrderIterator.h | 3 +- llvm/include/llvm/Analysis/MemoryBuiltins.h | 8 + llvm/include/llvm/Analysis/TargetLibraryInfo.def | 3 + .../llvm/CodeGen/GlobalISel/MIPatternMatch.h | 6 + llvm/include/llvm/MC/MCInstrDesc.h | 14 - llvm/include/llvm/MC/MCInstrInfo.h | 23 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 2 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 26 +- llvm/lib/Analysis/TargetLibraryInfo.cpp | 2 + llvm/lib/Frontend/OpenMP/OMPContext.cpp | 16 +- llvm/lib/MC/CMakeLists.txt | 1 + llvm/lib/MC/MCInstrDesc.cpp | 11 - llvm/lib/MC/MCInstrInfo.cpp | 27 + .../Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp | 4 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 9 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 2 +- llvm/lib/Target/X86/X86CallFrameOptimization.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 75 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 60 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 16 +- .../Transforms/InstCombine/InstCombineInternal.h | 6 + .../InstCombine/InstCombineMulDivRem.cpp | 24 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 30 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 9 +- .../InstCombine/InstCombineVectorOps.cpp | 6 +- .../InstCombine/InstructionCombining.cpp | 8 +- .../Transforms/Scalar/AlignmentFromAssumptions.cpp | 5 + llvm/lib/Transforms/Utils/BuildLibCalls.cpp | 4 + llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 17 +- llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h | 5 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 3 +- llvm/lib/Transforms/Vectorize/VPlan.h | 25 +- llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 15 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 5 +- llvm/test/Analysis/CostModel/X86/reduce-fmax.ll | 19 +- llvm/test/Analysis/CostModel/X86/reduce-fmin.ll | 19 +- llvm/test/Analysis/CostModel/X86/reduce-smax.ll | 59 +- llvm/test/Analysis/CostModel/X86/reduce-smin.ll | 59 +- llvm/test/Analysis/CostModel/X86/reduce-umax.ll | 59 +- llvm/test/Analysis/CostModel/X86/reduce-umin.ll | 59 +- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 380 +++++++++- llvm/test/CodeGen/Thumb2/mve-vmovimm.ll | 797 +++++++++++++++++---- llvm/test/CodeGen/X86/atomic-idempotent.ll | 547 +++++++++++--- llvm/test/CodeGen/X86/avx-vperm2x128.ll | 10 +- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 158 ++-- llvm/test/CodeGen/X86/vector-reduce-smax.ll | 432 ++++++----- llvm/test/CodeGen/X86/vector-reduce-smin.ll | 434 ++++++----- llvm/test/CodeGen/X86/vector-reduce-umax.ll | 464 +++++++----- llvm/test/CodeGen/X86/vector-reduce-umin.ll | 422 +++++++---- llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll | 17 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 17 +- llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll | 188 ++--- .../CodeGen/X86/vector-shuffle-combining-avx2.ll | 45 +- llvm/test/CodeGen/X86/vector-shuffle-v1.ll | 10 +- .../AlignmentFromAssumptions/amdgpu-crash.ll | 33 + .../test/Transforms/DeadStoreElimination/simple.ll | 13 + .../InstCombine/pr33689_same_bitwidth.ll | 6 +- .../Transforms/InstCombine/trunc-extractelement.ll | 127 ++++ llvm/unittests/Analysis/TargetLibraryInfoTest.cpp | 1 + .../CodeGen/GlobalISel/PatternMatchTest.cpp | 8 + llvm/unittests/CodeGen/MachineInstrTest.cpp | 26 +- .../Transforms/Vectorize/VPlanHCFGTest.cpp | 26 +- llvm/utils/TableGen/AsmMatcherEmitter.cpp | 2 +- llvm/utils/TableGen/InstrInfoEmitter.cpp | 95 ++- llvm/utils/gn/secondary/llvm/lib/MC/BUILD.gn | 1 + mlir/docs/ConversionToLLVMDialect.md | 2 +- mlir/docs/CreatingADialect.md | 2 +- mlir/docs/Diagnostics.md | 4 +- mlir/docs/OpDefinitions.md | 2 +- mlir/docs/RationaleLinalgDialect.md | 2 +- mlir/include/mlir/Dialect/GPU/GPUOps.td | 2 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 3 +- .../mlir/Dialect/Linalg/IR/LinalgStructuredOps.td | 2 +- .../Linalg/IR/LinalgStructuredOpsInterface.td | 13 +- mlir/include/mlir/Dialect/Quant/QuantOps.td | 4 +- mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td | 2 +- mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td | 2 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 8 + mlir/include/mlir/Dialect/Vector/VectorOps.td | 4 +- .../mlir/Interfaces/InferTypeOpInterface.td | 3 +- mlir/include/mlir/Transforms/LoopUtils.h | 14 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 2 + mlir/lib/Transforms/Utils/LoopUtils.cpp | 45 +- .../StandardToLLVM/convert-to-llvmir.mlir | 22 +- .../StandardToSPIRV/std-types-to-spirv.mlir | 2 +- mlir/test/IR/attribute.mlir | 2 +- mlir/test/Target/llvmir-intrinsics.mlir | 9 + mlir/test/mlir-tblgen/llvm-intrinsics.td | 2 +- 103 files changed, 3720 insertions(+), 1762 deletions(-) delete mode 100644 lld/test/ELF/arm-exidx-link.s create mode 100644 llvm/lib/MC/MCInstrInfo.cpp create mode 100644 llvm/test/Transforms/AlignmentFromAssumptions/amdgpu-crash.ll create mode 100644 llvm/test/Transforms/InstCombine/trunc-extractelement.ll