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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig in repository toolchain/ci/llvm-project.

from b0ac26a6326 Revert "[InstCombine] avoid crash from deleting an instruct [...] adds bcca123bd0c Docs: Updates Sphinx Quickstart template for new contributors adds 7874db75ef4 [NFC][Codegen] Add `x u% C1 == C2` with C1 u> C2 non-tautol [...] adds 8e9e433a2af clang/Modules: Remove unused parameter from ModuleManager:: [...] adds c250ebf7bca getArgOperandNo helper function. adds 56b2aee1875 [InstCombine] avoid crash from deleting an instruction that [...] adds d115b9fd4a4 Revert "[InstCombine] avoid crash from deleting an instruct [...] adds d37db750c25 [InstCombine] Add a test case for suboptimal handling of (d [...] adds aafde063aaf [InstCombine] Turn (extractelement <1 x i64/double> (bitcas [...] adds 3d3445e3e69 Revert "Fixed a profdata file size detection on Windows system." adds 6ef63638cb8 [DirectedGraph]: Add setTargetNode member function Summary: [...] adds af5df83671b [NFC] Add one test to verify the dependency brings by Macro [...] adds 2f4fb200b6b libc++ status page: New papers and issues adopted in Belfast adds b4f46a9bb42 [clangd] Fixes colon escaping on Windows adds 06456daa9e5 [yaml2obj] - Add a way to describe the custom data that is [...] adds 84a0c8e3ae9 [AArch64][SVE] Spilling/filling of SVE callee-saves. adds a26d7b62982 [FixBB] - An attemp to fix clang-armv7-linux-build-cache builder. adds e6c9a9af398 Use MCRegister in copyPhysReg adds 6b15c5dface [FixBB] - Fix one more std::min -> std::min<uint64_t> to ma [...] adds e0012c5d6ac [TargetLowering][DAGCombine][MSP430] Shift Amount Threshold [...] adds add7f2aba7b [NFC] Add one test to verify the sign_extend of vector type. adds 41104a9406d [clangd] Fix a regression of not showing documentation from [...] adds 4197a76593a [RISCV][NFC] Add nounwind to LKK test functions adds 36937ec7fb8 [lldb] [test] Mark TestSendSignal XFAIL on NetBSD adds b1ac1f00716 Revert cdcf58e5af0 "[RISCV] enable LTO support, pass some o [...] adds e2f0b243aa0 [lldb] [test] Fix typo in TestSendSignal adds 9323ef4ecca [InstCombine] Simplify binary op when only one operand is a select adds a7244c56bdd docs: fix warning in LangRef parsing adds 8383be0f754 Remove superfluous ';' to fix Wpedantic. NFC. adds 0040c4ba1e2 Fix -Wparentheses warning. NFCI. adds b47c7cd4d6a Fix -Wcovered-switch-default warning. NFCI. adds 0cc7c29a97e AArch64FunctionInfo - fix uninitialized variable warnings. NFCI. adds 02ec6ff77eb [clangd] Use name of Macro to compute its SymbolID, NFC. adds 75af15d81ef [NFC][TEST_COMMIT] Add fullstop to comment. new 1984a27db58 [DBG][OPT] Attempt to salvage or undef debug info when remo [...] new 9f48a160dd3 Revert "[DBG][OPT] Attempt to salvage or undef debug info w [...] new 3db8a3ef86e [InstCombine] avoid crash from deleting an instruction that [...] new 29f5d1670c3 Revert "[InstCombine] avoid crash from deleting an instruct [...] new abbbf9880c2 [TargetLowering][DAGCombine][MSP430] Shift Amount Threshold [...] new 48b7068beca [libc++] Mark __call_once_proxy as hidden and internal new a7638d38498 clang-format: [JS] support null operators. new 6bcd8d4a18f clang-format: [JS] test declared fields. new f8c17fe1112 [clangd] fixes semantic highlighting test new fdf3d1766bb [PowerPC] Implementing overflow version for XO-Form instructions new 4edf0cb0e03 [clang-tidy] Add bugprone-bad-signal-to-kill-thread checker [...] new 135a493f345 Fix TestNoGPacketSupported on linux new a9a3781df81 [ObjC] Override TailCallKind when lowering objc intrinsics new 8cec7e0208f Revert "[clang-tidy] Add bugprone-bad-signal-to-kill-thread [...]

The 14 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: clang-tools-extra/clangd/AST.cpp | 4 +- clang-tools-extra/clangd/AST.h | 3 +- clang-tools-extra/clangd/CodeComplete.cpp | 2 +- .../clangd/clients/clangd-vscode/package-lock.json | 2 +- .../clangd/clients/clangd-vscode/package.json | 2 +- .../clangd-vscode/src/semantic-highlighting.ts | 42 +- .../test/semantic-highlighting.test.ts | 50 ++- clang-tools-extra/clangd/index/Merge.cpp | 16 +- clang-tools-extra/clangd/index/SymbolCollector.cpp | 6 +- clang-tools-extra/clangd/unittests/IndexTests.cpp | 13 +- clang/include/clang/Serialization/ModuleManager.h | 4 +- clang/lib/Driver/ToolChains/Clang.cpp | 89 +++++ clang/lib/Driver/ToolChains/CommonArgs.cpp | 120 ------ clang/lib/Driver/ToolChains/CommonArgs.h | 8 - clang/lib/Driver/ToolChains/RISCVToolchain.cpp | 7 - clang/lib/Driver/ToolChains/RISCVToolchain.h | 1 - clang/lib/Format/FormatToken.h | 2 + clang/lib/Format/FormatTokenLexer.cpp | 12 + clang/lib/Serialization/ASTReader.cpp | 6 +- clang/lib/Serialization/ModuleManager.cpp | 5 +- clang/test/Driver/gold-lto.c | 18 - clang/unittests/Format/FormatTestJS.cpp | 17 + libcxx/include/mutex | 2 +- libcxx/www/cxx2a_status.html | 63 ++- .../gdb_remote_client/TestNoGPacketSupported.py | 4 +- .../test/functionalities/signal/TestSendSignal.py | 1 + llvm/docs/LangRef.rst | 2 +- llvm/docs/SphinxQuickstartTemplate.rst | 103 ++--- llvm/include/llvm/ADT/DirectedGraph.h | 3 + llvm/include/llvm/CodeGen/TargetInstrInfo.h | 2 +- llvm/include/llvm/IR/InstrTypes.h | 13 + llvm/include/llvm/ObjectYAML/ELFYAML.h | 149 ++++--- llvm/include/llvm/ObjectYAML/YAML.h | 3 +- llvm/lib/Analysis/DDG.cpp | 3 +- llvm/lib/AsmParser/LLLexer.cpp | 1 + llvm/lib/AsmParser/LLParser.cpp | 4 + llvm/lib/AsmParser/LLToken.h | 1 + llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp | 26 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 15 +- llvm/lib/IR/AsmWriter.cpp | 3 + llvm/lib/ObjectYAML/ELFEmitter.cpp | 168 +++++--- llvm/lib/ObjectYAML/ELFYAML.cpp | 62 ++- llvm/lib/ObjectYAML/YAML.cpp | 12 +- .../lib/Target/AArch64/AArch64CallingConvention.td | 10 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 288 ++++++++++++-- llvm/lib/Target/AArch64/AArch64FrameLowering.h | 6 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 3 + llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 24 +- llvm/lib/Target/AArch64/AArch64InstrInfo.h | 6 +- .../Target/AArch64/AArch64MachineFunctionInfo.h | 28 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/R600InstrInfo.h | 2 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 2 +- llvm/lib/Target/ARC/ARCInstrInfo.cpp | 4 +- llvm/lib/Target/ARC/ARCInstrInfo.h | 2 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 4 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 2 +- llvm/lib/Target/ARM/Thumb1InstrInfo.cpp | 4 +- llvm/lib/Target/ARM/Thumb1InstrInfo.h | 2 +- llvm/lib/Target/ARM/Thumb2InstrInfo.cpp | 4 +- llvm/lib/Target/ARM/Thumb2InstrInfo.h | 2 +- llvm/lib/Target/AVR/AVRInstrInfo.cpp | 4 +- llvm/lib/Target/AVR/AVRInstrInfo.h | 2 +- llvm/lib/Target/BPF/BPFInstrInfo.cpp | 4 +- llvm/lib/Target/BPF/BPFInstrInfo.h | 2 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 4 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.h | 2 +- llvm/lib/Target/Lanai/LanaiInstrInfo.cpp | 4 +- llvm/lib/Target/Lanai/LanaiInstrInfo.h | 4 +- llvm/lib/Target/MSP430/MSP430InstrInfo.cpp | 4 +- llvm/lib/Target/MSP430/MSP430InstrInfo.h | 2 +- llvm/lib/Target/Mips/Mips16InstrInfo.cpp | 4 +- llvm/lib/Target/Mips/Mips16InstrInfo.h | 2 +- llvm/lib/Target/Mips/MipsSEInstrInfo.cpp | 4 +- llvm/lib/Target/Mips/MipsSEInstrInfo.h | 2 +- llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp | 4 +- llvm/lib/Target/NVPTX/NVPTXInstrInfo.h | 2 +- llvm/lib/Target/PowerPC/P9InstrResources.td | 42 +- llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 44 +-- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 14 +- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 2 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 110 ++++-- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 4 +- llvm/lib/Target/RISCV/RISCVInstrInfo.h | 2 +- llvm/lib/Target/Sparc/SparcInstrInfo.cpp | 4 +- llvm/lib/Target/Sparc/SparcInstrInfo.h | 2 +- llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp | 28 +- llvm/lib/Target/SystemZ/SystemZInstrInfo.h | 2 +- .../Target/WebAssembly/WebAssemblyInstrInfo.cpp | 4 +- llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h | 2 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 4 +- llvm/lib/Target/X86/X86InstrInfo.h | 2 +- llvm/lib/Target/XCore/XCoreInstrInfo.cpp | 4 +- llvm/lib/Target/XCore/XCoreInstrInfo.h | 2 +- llvm/lib/Transforms/IPO/Attributor.cpp | 4 +- .../InstCombine/InstCombineVectorOps.cpp | 7 + .../InstCombine/InstructionCombining.cpp | 10 + llvm/lib/Transforms/Scalar/Reassociate.cpp | 2 +- llvm/test/CodeGen/AArch64/framelayout-sve.mir | 184 +++++++++ llvm/test/CodeGen/AArch64/macro-fusion.ll | 23 ++ llvm/test/CodeGen/AArch64/urem-seteq-nonzero.ll | 247 ++++++++++++ .../test/CodeGen/AArch64/urem-seteq-vec-nonzero.ll | 118 ++++++ llvm/test/CodeGen/ARM/signext-inreg.ll | 17 + .../CodeGen/MSP430/shift-amount-threshold-b.ll | 39 +- llvm/test/CodeGen/MSP430/shift-amount-threshold.ll | 70 ++++ llvm/test/CodeGen/RISCV/srem-lkk.ll | 98 +---- llvm/test/CodeGen/RISCV/srem-vector-lkk.ll | 271 +------------ llvm/test/CodeGen/RISCV/urem-lkk.ll | 68 +--- llvm/test/CodeGen/RISCV/urem-vector-lkk.ll | 246 +----------- llvm/test/CodeGen/X86/urem-seteq-nonzero.ll | 434 +++++++++++++++++++++ llvm/test/CodeGen/X86/urem-seteq-vec-nonzero.ll | 434 +++++++++++++++++++++ .../MC/Disassembler/PowerPC/ppc64-encoding.txt | 126 ++++++ .../MC/Disassembler/PowerPC/ppc64le-encoding.txt | 126 ++++++ .../MC/PowerPC/invalid-instructions-spellcheck.s | 2 +- llvm/test/MC/PowerPC/ppc64-encoding.s | 168 ++++++-- .../Transforms/InstCombine/bitcast-vec-canon.ll | 14 +- llvm/test/Transforms/InstCombine/fmul.ll | 9 +- llvm/test/Transforms/InstCombine/mul.ll | 4 +- .../PreISelIntrinsicLowering/objc-arc.ll | 10 +- llvm/test/tools/llvm-profdata/show-prof-size.test | 2 +- llvm/test/tools/yaml2obj/custom-fill.yaml | 298 ++++++++++++++ .../tools/yaml2obj/duplicate-section-names.test | 6 +- llvm/test/tools/yaml2obj/program-header.yaml | 4 +- llvm/tools/obj2yaml/elf2yaml.cpp | 36 +- 126 files changed, 3485 insertions(+), 1393 deletions(-) create mode 100644 llvm/test/CodeGen/AArch64/macro-fusion.ll create mode 100644 llvm/test/CodeGen/AArch64/urem-seteq-nonzero.ll create mode 100644 llvm/test/CodeGen/AArch64/urem-seteq-vec-nonzero.ll create mode 100644 llvm/test/CodeGen/ARM/signext-inreg.ll create mode 100644 llvm/test/CodeGen/X86/urem-seteq-nonzero.ll create mode 100644 llvm/test/CodeGen/X86/urem-seteq-vec-nonzero.ll create mode 100644 llvm/test/tools/yaml2obj/custom-fill.yaml