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from 5ea2293 [AArch64] vreinterpret(q?), vget_(low|high), vld1(q?)_dup new 57887f7 [AArch64] Improve code generation for float16 vector code new 90d05d2 [AArch64] Add vcvt(_high)?_f32_f16 intrinsics, with BE RTL fix new 3ea4b09 [fold-const.c] Fix bigendian HFmode in native_interpret_real

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Summary of changes: gcc/ChangeLog | 35 +++++++++ gcc/config/aarch64/aarch64-simd-builtins.def | 3 +- gcc/config/aarch64/aarch64-simd.md | 102 ++++++++++++++++----------- gcc/config/aarch64/aarch64.c | 2 + gcc/config/aarch64/arm_neon.h | 16 +++-- gcc/config/aarch64/iterators.md | 25 +++++-- gcc/fold-const.c | 22 ++++-- 7 files changed, 148 insertions(+), 57 deletions(-)