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from 2c8e36132e0 [InlineCost] Find more free binary operations new ddf9b26bf89 [AMDGPU][MC] Corrected parsing of optional operands for ds_ [...] new f496aa0dc8b [X86] Improve the printing of address mode during isel matching. new 7c7ca957d2d [X86] When lowering insert_vector_elt/extract_vector_elt of [...] new 15c5ab82da5 [SelectionDAG] Reverse the order of operands in the ISD::AD [...]

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Summary of changes: lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 +- lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 4 +- lib/Target/X86/X86ISelDAGToDAG.cpp | 9 +- lib/Target/X86/X86ISelLowering.cpp | 14 +- test/CodeGen/Mips/llvm-ir/extractelement.ll | 2 +- test/CodeGen/PowerPC/variable_elem_vec_extracts.ll | 6 +- test/CodeGen/X86/avx512-insert-extract.ll | 130 ++--- test/CodeGen/X86/avx512-insert-extract_i1.ll | 3 +- test/CodeGen/X86/extractelement-index.ll | 12 +- test/CodeGen/X86/var-permute-256.ll | 270 +++++----- test/CodeGen/X86/var-permute-512.ll | 208 +++---- test/CodeGen/X86/vector-shuffle-variable-128.ll | 596 ++++++++++----------- test/MC/AMDGPU/ds.s | 4 + test/MC/Disassembler/AMDGPU/ds_vi.txt | 3 + 14 files changed, 569 insertions(+), 694 deletions(-)