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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-defconfig in repository toolchain/ci/llvm-project.

from 25895ad2836 Merging r356924: adds 79c29c6b53c Merging r355854: new aaac4e0ac6e Merging r354672: new 1cef8c24333 Merging r356198: new 257c01056b2 Merging r354808: new 25b6e82d72b Merging r354882:

The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: clang/lib/CodeGen/CGStmtOpenMP.cpp | 5 +- clang/lib/Sema/SemaOpenMP.cpp | 3 +- clang/test/OpenMP/ordered_doacross_codegen.cpp | 13 +- llvm/lib/CodeGen/TargetRegisterInfo.cpp | 6 + .../Mips/MCTargetDesc/MipsTargetStreamer.cpp | 7 +- llvm/lib/Target/Mips/MipsAsmPrinter.cpp | 3 +- llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp | 1 + llvm/lib/Target/Mips/MipsFastISel.cpp | 35 +- llvm/test/CodeGen/Mips/Fast-ISel/icmpbr1.ll | 3 +- llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll | 23 + llvm/test/CodeGen/Mips/abiflags32.ll | 8 + llvm/test/CodeGen/Mips/pseudo-jump-fill.ll | 68 ++ llvm/test/CodeGen/X86/regalloc-copy-hints.mir | 805 +++++++++++++++++++++ 13 files changed, 960 insertions(+), 20 deletions(-) create mode 100644 llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll create mode 100644 llvm/test/CodeGen/Mips/pseudo-jump-fill.ll create mode 100644 llvm/test/CodeGen/X86/regalloc-copy-hints.mir