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from 3ea4b09 [fold-const.c] Fix bigendian HFmode in native_interpret_real new 7587115 PR c++/67041 * pt.c (tsubst_copy_and_build): Handle variabl [...] new dbebdff [ARM/AArch64 Testsuite] Add float16 tests to advsimd-intrinsi [...] new 517a3d1 [ARM/AArch64 Testsuite]Add test of vcvt{,_high}_i{f32_f16,f16_f32} new d5dbc97 [ARM] Update sourcebuild.texi with testsuite/effective-target hooks new 524ef24 ARM/AArch64 Testsuite] Add float16 lane_f16_indices tests new 74fd9ec correct ChangeLog dates+address
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Summary of changes: gcc/ChangeLog | 12 ++- gcc/cp/ChangeLog | 5 + gcc/cp/pt.c | 19 ++-- gcc/doc/sourcebuild.texi | 9 +- gcc/testsuite/ChangeLog | 77 ++++++++++++++++ gcc/testsuite/g++.dg/cpp1y/lambda-var-templ1.C | 11 +++ .../advsimd-intrinsics/advsimd-intrinsics.exp | 8 +- .../aarch64/advsimd-intrinsics/arm-neon-ref.h | 93 +++++++++++++------ .../aarch64/advsimd-intrinsics/compute-ref-data.h | 16 ++++ .../gcc.target/aarch64/advsimd-intrinsics/vbsl.c | 2 +- .../aarch64/advsimd-intrinsics/vcombine.c | 14 +++ .../aarch64/advsimd-intrinsics/vcreate.c | 16 ++++ .../aarch64/advsimd-intrinsics/vcvt_f16.c | 98 ++++++++++++++++++++ .../aarch64/advsimd-intrinsics/vdup-vmov.c | 12 +-- .../aarch64/advsimd-intrinsics/vdup_lane.c | 2 +- .../gcc.target/aarch64/advsimd-intrinsics/vext.c | 2 +- .../aarch64/advsimd-intrinsics/vget_high.c | 7 ++ .../aarch64/advsimd-intrinsics/vget_low.c | 10 ++ .../gcc.target/aarch64/advsimd-intrinsics/vld1.c | 7 ++ .../aarch64/advsimd-intrinsics/vld1_dup.c | 13 +++ .../aarch64/advsimd-intrinsics/vld1_lane.c | 15 +++ ...e_u16_indices_1.c => vld2_lane_f16_indices_1.c} | 10 +- ...e_s8_indices_1.c => vld2q_lane_f16_indices_1.c} | 10 +- ...e_u16_indices_1.c => vld3_lane_f16_indices_1.c} | 10 +- ...e_s8_indices_1.c => vld3q_lane_f16_indices_1.c} | 10 +- ...e_u16_indices_1.c => vld4_lane_f16_indices_1.c} | 10 +- ...e_s8_indices_1.c => vld4q_lane_f16_indices_1.c} | 10 +- .../gcc.target/aarch64/advsimd-intrinsics/vldX.c | 102 +++++++++++++++++++-- .../aarch64/advsimd-intrinsics/vldX_dup.c | 82 +++++++++++++++-- .../aarch64/advsimd-intrinsics/vldX_lane.c | 93 +++++++++++++++++-- .../aarch64/advsimd-intrinsics/vset_lane.c | 13 +++ .../aarch64/advsimd-intrinsics/vst1_lane.c | 9 ++ ...e_u16_indices_1.c => vst2_lane_f16_indices_1.c} | 6 +- ...e_s8_indices_1.c => vst2q_lane_f16_indices_1.c} | 6 +- ...e_u16_indices_1.c => vst3_lane_f16_indices_1.c} | 6 +- ...e_s8_indices_1.c => vst3q_lane_f16_indices_1.c} | 6 +- ...e_u16_indices_1.c => vst4_lane_f16_indices_1.c} | 6 +- ...e_s8_indices_1.c => vst4q_lane_f16_indices_1.c} | 6 +- gcc/testsuite/lib/target-supports.exp | 15 +++ 39 files changed, 735 insertions(+), 123 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp1y/lambda-var-templ1.C create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvt_f16.c copy gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/{vld2_lane_u16_indices_1. [...] copy gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/{vld2_lane_s8_indices_1.c [...] copy gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/{vld2_lane_u16_indices_1. [...] copy gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/{vld2_lane_s8_indices_1.c [...] copy gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/{vld2_lane_u16_indices_1. [...] copy gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/{vld2_lane_s8_indices_1.c [...] copy gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/{vst2_lane_u16_indices_1. [...] copy gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/{vst2_lane_s8_indices_1.c [...] copy gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/{vst2_lane_u16_indices_1. [...] copy gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/{vst2_lane_s8_indices_1.c [...] copy gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/{vst2_lane_u16_indices_1. [...] copy gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/{vst2_lane_s8_indices_1.c [...]