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from 1e115dba4fb Daily bump. new 338640fbee2 RISC-V: Add xfail test case for highpart register overlap o [...] new ec78916bb37 Revert "RISC-V: Support widening register overlap for vf4/vf8"

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Summary of changes: gcc/config/riscv/vector.md | 38 ++--- .../gcc.target/riscv/rvv/base/pr112431-16.c | 68 -------- .../gcc.target/riscv/rvv/base/pr112431-17.c | 51 ------ .../gcc.target/riscv/rvv/base/pr112431-22.c | 188 +++++++++++++++++++++ .../gcc.target/riscv/rvv/base/pr112431-23.c | 119 +++++++++++++ .../gcc.target/riscv/rvv/base/pr112431-24.c | 86 ++++++++++ .../gcc.target/riscv/rvv/base/pr112431-25.c | 104 ++++++++++++ .../riscv/rvv/base/{pr112431-8.c => pr112431-26.c} | 46 ++--- .../rvv/base/{pr112431-18.c => pr112431-27.c} | 26 +-- 9 files changed, 551 insertions(+), 175 deletions(-) delete mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-16.c delete mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-17.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-22.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-23.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-24.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-25.c copy gcc/testsuite/gcc.target/riscv/rvv/base/{pr112431-8.c => pr112431-26.c} (53%) rename gcc/testsuite/gcc.target/riscv/rvv/base/{pr112431-18.c => pr112431-27.c} (52%)