This is an automated email from the git hooks/post-receive script.

unknown user pushed a change to branch master in repository llvm.

from 5963031acc4 [PowerPC][XCOFF] Verify symbol table in xcoff object files. [NFC] new 47e9ba395e3 [X86] Teach FixupBWInsts to turn MOVSX16rr8/MOVZX16rr8/MOVS [...] new 1935dd03cb1 [X86] Use MOVZX16rr8/MOVZXrm8 when extending input for i8 udivrem. new 50eeea1f07d [X86] Use MOVSX by default instead of CBW to extend i8 to A [...] new afaf30acaa0 [llvm-jitlink] Add optional slab allocator for testing loca [...] new af46d1e1e6c [ORC] Make sure RPC channel-send is called in blocking call [...]

The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: include/llvm/ExecutionEngine/Orc/RPCUtils.h | 25 +- lib/Target/X86/X86FixupBWInsts.cpp | 54 +++- lib/Target/X86/X86ISelDAGToDAG.cpp | 15 +- test/CodeGen/X86/2008-09-11-CoalescerBug2.ll | 1 - test/CodeGen/X86/2011-10-19-LegelizeLoad.ll | 12 +- test/CodeGen/X86/anyext.ll | 2 - test/CodeGen/X86/bypass-slow-division-32.ll | 7 - test/CodeGen/X86/bypass-slow-division-tune.ll | 1 - .../X86/div-rem-pair-recomposition-signed.ll | 165 +++++------- .../X86/div-rem-pair-recomposition-unsigned.ll | 33 --- test/CodeGen/X86/divrem.ll | 9 +- test/CodeGen/X86/divrem8_ext.ll | 38 +-- test/CodeGen/X86/fast-isel-divrem.ll | 8 +- test/CodeGen/X86/scalar_widen_div.ll | 35 +-- test/CodeGen/X86/urem-power-of-two.ll | 2 - test/CodeGen/X86/vector-idiv-sdiv-128.ll | 293 +++++++++------------ tools/llvm-jitlink/llvm-jitlink.cpp | 178 ++++++++++++- tools/llvm-jitlink/llvm-jitlink.h | 2 +- unittests/ExecutionEngine/Orc/QueueChannel.h | 34 ++- unittests/ExecutionEngine/Orc/RPCUtilsTest.cpp | 11 + 20 files changed, 517 insertions(+), 408 deletions(-)