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from b375c5340b5 aarch64: Avoid same input and output Z register for gather loads new b9401c3a323 vect: Add testcases for unsigned conversions [PR110018]

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Summary of changes: gcc/testsuite/gcc.target/i386/pr110018-1.c | 20 ++++++++++---------- .../gcc.target/i386/{pr110018-1.c => pr110018-2.c} | 20 ++++++++++---------- 2 files changed, 20 insertions(+), 20 deletions(-) copy gcc/testsuite/gcc.target/i386/{pr110018-1.c => pr110018-2.c} (66%)