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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig in repository toolchain/ci/gcc.

from b0ccd3922f5 compiler: add support for reading embedcfg files adds c4eec1efae0 testsuite: Fix sed script errors in complex tests adds 2ea6f4a377e tree-optimization/98685 - fix placement of extern converts adds 7432f255b70 arm: Auto-vectorization for MVE: vshl adds bfab355012c arm: Auto-vectorization for MVE: vshr adds 0411ae7f08e libatomic, libgomp, libitc: Fix bootstrap [PR70454] adds cb60334b716 testsuite/96098 - remove redundant testcase adds 1a630642009 arm: Implement vceqq_p64, vceqz_p64 and vceqzq_p64 intrinsics adds d03f14c354a testsuite/96147 - remove scanning for ! vect_hw_misalign adds e1bd80fb706 testsuite/96147 - key scanning on vect_hw_misalign adds aa4ee5798fe testsuite/96147 - scan for vectorized load adds b36c9cd0947 testsuite/96147 - align vector access adds dc8475e3348 Pytest in tests: improve adds 446703ccc2c tree-optimization/96376 - do not check alignment for invari [...] adds f1d054017ef Revert "arm: Implement vceqq_p64, vceqz_p64 and vceqzq_p64 [...] adds 63999d751df arm: Implement vceqq_p64, vceqz_p64 and vceqzq_p64 intrinsics adds f9a577927eb IBM Z: Fix linking to libatomic in target test cases new 7f6cdaa9a8d rtl-ssa: Fix a silly typo new f2cc526f47a recog: Fix insn_change_watermark destructor new 5a783f42d77 aarch64: Add a minipass for fusing CC insns [PR88836] new 492b90f33df c++: Fix langspecs with -fsyntax-only [PR98591] new 1ba71fabb78 preprocessor: Make quoting : [PR 95253] new 7d0df0aeb67 i386: Use cpp_define_formatted for __SIZEOF_FLOAT80__ definition

The 6 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: gcc/Makefile.in | 7 + gcc/config.gcc | 2 +- gcc/config/aarch64/aarch64-cc-fusion.cc | 296 +++++++++++++++++++++ gcc/config/aarch64/aarch64-passes.def | 1 + gcc/config/aarch64/aarch64-protos.h | 1 + gcc/config/aarch64/t-aarch64 | 6 + gcc/config/arm/arm_neon.h | 31 +++ gcc/config/arm/mve.md | 47 +++- gcc/config/arm/neon.md | 53 ---- gcc/config/arm/vec-common.md | 58 ++++ gcc/config/i386/i386-c.c | 9 +- gcc/cp/lang-specs.h | 40 +-- gcc/doc/install.texi | 2 +- gcc/doc/sourcebuild.texi | 4 + gcc/recog.h | 8 +- gcc/rtl-ssa/functions.h | 2 +- gcc/rtl-ssa/member-fns.inl | 2 +- gcc/testsuite/g++.dg/modules/pr98591.H | 3 + gcc/testsuite/gcc.dg/vect/bb-slp-32.c | 1 + gcc/testsuite/gcc.dg/vect/bb-slp-9.c | 2 +- gcc/testsuite/gcc.dg/vect/bb-slp-pr68892.c | 20 -- gcc/testsuite/gcc.dg/vect/bb-slp-pr98685.c | 15 ++ .../gcc.dg/vect/complex/complex-mla-template.c | 28 +- .../gcc.dg/vect/complex/complex-mls-template.c | 28 +- gcc/testsuite/gcc.dg/vect/slp-43.c | 4 +- gcc/testsuite/gcc.dg/vect/slp-45.c | 2 +- .../aarch64/advsimd-intrinsics/p64_p128.c | 46 +++- .../gcc.target/aarch64/sve/acle/general/ldff1_8.c | 32 +++ gcc/testsuite/gcc.target/aarch64/sve/ptest_1.c | 10 + gcc/testsuite/gcc.target/arm/simd/mve-vshl.c | 62 +++++ gcc/testsuite/gcc.target/arm/simd/mve-vshr.c | 59 ++++ gcc/testsuite/gcc.target/arm/simd/vceqz_p64.c | 17 ++ gcc/testsuite/gcc.target/arm/simd/vceqzq_p64.c | 17 ++ .../gcc.target/s390/md/atomic_exchange-1.c | 2 +- gcc/testsuite/gcc.target/s390/s390.exp | 4 + gcc/testsuite/lib/gcov.exp | 31 ++- gcc/tree-vect-slp.c | 11 +- gcc/tree-vect-stmts.c | 23 +- libatomic/configure.tgt | 56 ++-- libcpp/mkdeps.c | 1 - libgomp/configure.tgt | 35 ++- libitm/configure.tgt | 37 ++- 42 files changed, 888 insertions(+), 227 deletions(-) create mode 100644 gcc/config/aarch64/aarch64-cc-fusion.cc create mode 100644 gcc/testsuite/g++.dg/modules/pr98591.H delete mode 100644 gcc/testsuite/gcc.dg/vect/bb-slp-pr68892.c create mode 100644 gcc/testsuite/gcc.dg/vect/bb-slp-pr98685.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/ldff1_8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/ptest_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/mve-vshl.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/mve-vshr.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vceqz_p64.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vceqzq_p64.c