This is an automated email from the git hooks/post-receive script.

tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/llvm-project.

from a855c9403fb [NFC] Don't copy MachineFrameInfo on each invocation of HasAlias adds 25bf4a8f428 [debuginfo-test] Fix -Wunused-value adds 25f23a60398 [AsmPrinter] Make OpAsmPrinter::printFunctionalType be resi [...] adds 7510c1152f0 Update for review feedback: Inline var declaration and expa [...] adds 01a2508aa58 [PowerPC] Delete remnant isOSDarwin references adds bfa6ca07a8c [PowerPC] Delete remnant Darwin ISelLowering code adds 022cc6e3434 [PowerPC] Delete dead Lower* adds 3bfc9bb8ef2 [VE][NFC] Update comments to match the generated instructions adds dbfc1ac4d86 [X86] Update tests for znver3 adds 238dbeb1e7b [mlir][ODS] Fix missed rename of TypeParameter 'description [...] adds 7ddbe0cb905 [LV] Merge tests into a single file (NFC) adds 248e3450fb8 [LLD] [MinGW] Pass the --demangle and --no-demangle options [...] adds f4485240a21 [libcxx] Handle backslash as path separator on windows adds c3529a5b080 [mlir] Mark methods from mlir::OpState that just forward to [...] adds d2ddc694ff9 Revert "Revert "[analyzer] NFC: Move path diagnostic consum [...] adds 5471b1fa401 [gn build] Port d2ddc694ff9 adds 77db83ae997 [clang][cli] Allow users to specify a conditional to preven [...] adds c6ea4d5b2c0 [clang][cli] Implement ContainsN Google Test matcher adds d0fa7a05be9 Revert "[clang][cli] Allow users to specify a conditional t [...] adds 76f6b125cef Revert "[llvm] Use BasicBlock::phis() (NFC)" adds c9154e8fa37 [RISCV] Add vector mask arithmetic ISel patterns adds 67a4c672b02 Reapply "[clang][cli] Allow users to specify a conditional [...] adds 0877b963ef2 [clang][ASTImporter] Fix a possible assertion failure `Need [...] adds 801c7866e6d [lldb][ARM/AArch64] Update disasm flags to latest v8.7a ISA adds a828fb463ed [clang][cli] Port a CommaJoined option to the marshalling i [...] adds e5cdb6c56ed [flang][driver] Add support for `-c` and `-emit-obj` adds b6ba5983079 [clang][cli] Port getAllArgumentValues to the marshalling i [...] adds b6fb0209b6d [libc++] [CI] Install Tip-of-Trunk clang. adds 33f90f38e11 [clang][cli] Report the actual argument parsing result adds 350ab7aa1c6 [DAG] Simplify OR(X,SHL(Y,BW/2)) eq/ne 0/-1 'all/any-of' st [...] adds 7da3e3a8983 [libcxx] Mark a test as unsupported for C++03 adds 044b892c79b [libc++] Use c++20 instead of c++2a consistently. adds 10164a2e50b [mlir] Refactor translation of OpenMP dialect ops to LLVM IR adds 213329d7c64 [clangd] Add server capability advertising hot-reloading of CDBs. adds 4284afdf943 [SLP]Need shrink the load vector after reordering. adds 236129fb446 [CompilationDatabase] Pass Twine by const reference instead [...] adds 028091195d7 [DWARF] DWARFDebugLoc::dumpRawEntry - remove dead stores. NFCI. adds a9a8caf2ce2 [llvm-objdump] Pass Twine by const reference instead of by [...] adds c1d58c2b002 [mlir] Add fastmath flags support to some LLVM dialect ops adds e72cdc5ba1e [clang][cli] NFC: Ensure non-null DiagnosticsEngine in Pars [...] adds 75d63630ebb [clang][cli] NFC: Move parseSimpleArgs adds a7cbc32a916 [mlir] remove a use of deprecated OpState::setAttr adds fcd1e35e4cc [clang][cli] NFC: Make parsing macro reusable adds 01c190e907c [AArch64][CostModel]Fix gather scatter cost model adds a2957f80f87 [flang][driver] Rename driver tests (nfc) adds fa6d8977999 [Analysis] MemoryDepChecker::couldPreventStoreLoadForward - [...] adds 037b058e419 [AArch64] SVEIntrinsicOpts - use range loop and cast<> inst [...] adds b73736a4048 [flang][openacc] Enforce delcare directive restriction adds aa7968a87b6 [TableGen] Add field kind to the RecordVal class. adds 048f184ee48 [SplitEdge] Add new parameter to SplitEdge to name the newl [...] adds 8dee0b4bd63 [llvm-reduce] ReduceGlobalVarInitializers delta pass: fix h [...] adds 6be1fd6b20f [SimplifyCFG] FoldValueComparisonIntoPredecessors(): drop r [...] adds ebfe4de2c04 [DDG] Fix duplicate edge removal during pi-block formation adds 6b7d5a928f5 AMDGPU/GlobalISel: Start cleaning up calling convention lowering adds 573d5782482 [DDG] Data Dependence Graph - DOT printer tests adds f4013359b3d [SVE] Add unpacked scalable floating point ZIP/UZP/TRN patterns adds e881a25f1e1 [NFC] Removed unused prefixes in CodeGen/AMDGPU adds db33f85c712 [IR] Use LLVM_ENABLE_ABI_BREAKING_CHECKS to guard ABI changes. adds 82f5ee3c3e6 Adds argument attributes for using LLVM's sret and byval at [...] adds 59fce6b0661 [NFC] make clang/test/CodeGen/arm_neon_intrinsics.c resiste [...] adds f88fab50068 [mlir] NFC: fix trivial typos adds acbb3652931 [AST][NFC] Silence GCC warning about multiline comments adds 43043adcfbc Add element-type to the Vector TypeLoc types. adds ebcc8dcb68a [Coverage] Refactor three tests from commit rG9f2967bcfe2f adds bd78f4e9321 [mlir] revert 82f5ee3c3e601daad5 adds 41e31eac14c Fix GCC5 build, require explicit this->... in this call ins [...] adds ee57d30f448 [NFC] Removed unused prefixes from CodeGen/AMDGPU adds d0154456e61 Silence warning: comparison of integers of different signs: [...] adds cf5415c727d [PGO][PGSO] Let unroll hints take precedence over PGSO. adds c9122ddef52 CodeGen: Refactor regallocator command line and target selection adds 5c38ae36c58 [WebAssembly] Fixed byval args missing DWARF DW_AT_LOCATION adds 2230bf99c71 [mlir] replace LLVMIntegerType with built-in integer type adds 906efeec0a4 [mlir] don't match the text produced only in debug mode in [...] adds 4c7148d75cd [SLP] remove opcode identifier for reduction; NFC adds ad55d5c3f32 Simplify vectorcall argument classification of HVAs, NFC adds 6a87e9b08bf [NFC][AMDGPU] Reduce include files dependency. adds abb174bbc10 [OpenMP] Add example in Libomptarget Information docs adds 467e916d303 Fix gcc5 build failure (NFC) adds 3854b81b0fd [Clang][Driver] Fix read-after-free when using /clang: adds 9ae171bcd38 [OpenMP][Docs] Add remarks intro section adds d970a285b85 [OpenMP][Fix] Make the arch selector for x86_64 work adds 36c4dc9b42f [OpenMP][FIX] Ensure the isa trait is evaluated last adds 275f30df8ad [clang] Change builtin object size when subobject is invalid adds 6e7101530da [OpenMP][Docs] Mark finished features as done adds ce7f30b2a87 [llvm-pdbutil] Don't crash when printing unknown CodeView t [...] adds 70b841ac317 [mlir] Adds argument attributes for using LLVM's sret and b [...] adds 0b0f2e6ee0c [OpenMP][FIX] Avoid string literal comparison, use `StringR [...] adds 476db17dcb6 Fix include path for check-gdb-mlir-support to include the [...] adds 9e1aaa9943b Fix check-gdb-mlir-support build after MLIR API changed to [...] adds 1f9b6ef91ff GlobalISel: Add combine for G_UREM by power of 2 adds 63b42a05145 [NFC] clang/test/openMP/target_codegen.cpp should not depen [...] adds 85f86e8a3cf [libc++abi] Simplify __gxx_personality_v0 adds d002cd4e0f1 [test] Move coro-retcon-unreachable.ll into llvm/test adds 1a2eaebc09c [CoroSplit][NewPM] Don't call LazyCallGraph functions to sp [...] adds 3503c856819 Fixup Asserts+!AbiBreakingChecks fallout from db33f85c7124 adds 973c35d3384 [TableGen] Make CodeGenDAGPatterns::getSDNodeNamed take a S [...] adds eaadb41db62 [LLD][COFF] When using PCH.OBJ, ensure func_id records indi [...] adds 274afac9a17 lldb: Add support for DW_AT_ranges on DW_TAG_subprograms adds c01202a7efd [libc++] Fix typo in run-buildbot adds 2cbbc6e87c4 GlobalISel: Fail legalization on narrowing extload below me [...] adds f78d6af7319 [hip] Enable HIP compilation with `<complex`> on MSVC. adds 2ce16810f28 [OpenMP] Always print error messages in libomptarget CUDA plugin adds 15f59711506 [LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection adds b2dafd44ca7 [NewPM][Hexagon] Fix HexagonVectorLoopCarriedReusePass posi [...] adds ff1b6f9ff27 [libc++] Alphabetize generate_feature_test_macro_components [...] adds 9ccf13c36d1 [NewPM][NVPTX] Port NVPTX opt passes adds 087be536fea [NFC][SimplifyCFG] Add a test with cond br on constant w/ i [...] adds 16ab8e5f6db [SimplifyCFG] ConstantFoldTerminator(): handle matching des [...] adds 36593a30a40 [SimplifyCFG] ConstantFoldTerminator(): switch to non-permi [...] adds 8b9a0e6f7ed [NFC][SimlifyCFG] Add some indirectbr-of-blockaddress tests adds b3822728fae [SimplifyCFG] ConstantFoldTerminator(): switch to non-permi [...] adds 1f9b591ee66 [SimplifyCFG] TryToSimplifyUncondBranchFromEmptyBlock(): sw [...] adds f8875c313c3 [NFC][SimplifyCFG] Add test with an unreachable block with [...] adds 7600d7c7be0 [SimplifyCFG] removeUnreachableBlocks(): switch to non-perm [...] adds 6984781df9b [NFC][SimplifyCFG] Add a test with an undef cond branch to [...] adds 05adc73db05 [SimplifyCFG] changeToUnreachable(): switch to non-permissi [...] adds 66189212bbb [SimplifyCFG] MergeBlockIntoPredecessor(): switch to non-pe [...] adds be0a31d13bc [SimplifyCFG] DeleteDeadBlocks(): switch to non-permissive [...] adds f0eba8ce2d4 [SimplifyCFG] changeToCall(): switch to non-permissive DomT [...] adds d59f97bb3a6 [SimplifyCFG] removeUnwindEdge(): switch to non-permissive [...] adds f2f81c554b0 [SimplifyCFG] markAliveBlocks(): switch to non-permissive D [...] adds 946bc50e4cb [RISCV] Define the vfsqrt RVV intrinsics adds 6acfc3a7821 Fix build after eaadb41db6233cf1c9e882d74a31c1f9d6e211ff wh [...] adds 8dddcc762dd [Cloning] Copy metadata of global declarations adds 48baa7f5b11 [clang] Add powerpc64le-none-linux-gnu to gnu toolchain for PPC64 adds 658a1be76ba [builtins] Add COMPILER_RT_BUILTINS_HIDE_SYMBOLS adds b12f26733a4 Revert "Revert "Revert "[analyzer] NFC: Move path diagnosti [...] adds ab814896dc8 [gn build] Port b12f26733a4 adds 2759041786e [gn build] (manually) merge a whole bunch of libc++ header files adds f02e61a8b95 Fix MLIR DRR matching when attributes are interleaved with [...] adds b14ad90b137 [LLD][COFF] Simplify function. NFC.

No new revisions were added by this update.

Summary of changes: clang-tools-extra/clangd/ClangdLSPServer.cpp | 6 +- .../clangd/test/initialize-params.test | 3 + clang/docs/OpenMPSupport.rst | 4 +- clang/include/clang/AST/DeclOpenMP.h | 2 +- clang/include/clang/AST/TypeLoc.h | 77 +- clang/include/clang/Driver/Options.td | 88 ++- clang/include/clang/Tooling/CompilationDatabase.h | 15 +- clang/lib/AST/ASTImporter.cpp | 8 +- clang/lib/AST/ExprConstant.cpp | 6 +- clang/lib/CodeGen/TargetInfo.cpp | 62 +- clang/lib/Driver/Driver.cpp | 16 +- clang/lib/Driver/ToolChains/Flang.cpp | 19 +- clang/lib/Driver/ToolChains/Gnu.cpp | 3 +- clang/lib/Frontend/CompilerInvocation.cpp | 229 +++--- clang/lib/Headers/__clang_hip_cmath.h | 28 + clang/lib/Sema/SemaType.cpp | 11 + clang/lib/Sema/TreeTransform.h | 8 +- clang/lib/Tooling/CompilationDatabase.cpp | 6 +- clang/test/CodeGen/arm_neon_intrinsics.c | 60 +- clang/test/CodeGen/object-size.c | 10 +- clang/test/Driver/cl-options.c | 5 + clang/test/Driver/x86-march.c | 4 + clang/test/Frontend/x86-target-cpu.c | 1 + clang/test/OpenMP/begin_declare_variant_messages.c | 2 +- clang/test/OpenMP/declare_variant_ast_x86_64.c | 10 + clang/test/OpenMP/declare_variant_messages.c | 10 +- clang/test/OpenMP/declare_variant_messages.cpp | 4 +- .../OpenMP/nvptx_declare_variant_name_mangling.cpp | 10 +- clang/test/OpenMP/target_codegen.cpp | 2 +- clang/test/SemaCXX/vector.cpp | 17 + clang/unittests/AST/ASTImporterTest.cpp | 35 + clang/unittests/Basic/FileEntryTest.cpp | 2 +- .../unittests/Frontend/CompilerInvocationTest.cpp | 298 +++++--- compiler-rt/lib/builtins/CMakeLists.txt | 7 +- debuginfo-tests/CMakeLists.txt | 4 +- .../llvm-prettyprinters/gdb/llvm-support.cpp | 4 +- .../llvm-prettyprinters/gdb/mlir-support.cpp | 4 +- flang/include/flang/Frontend/FrontendActions.h | 4 + flang/include/flang/Frontend/FrontendOptions.h | 3 + flang/lib/Frontend/CompilerInvocation.cpp | 4 +- flang/lib/Frontend/FrontendActions.cpp | 7 + .../lib/FrontendTool/ExecuteCompilerInvocation.cpp | 2 + flang/lib/Semantics/check-acc-structure.cpp | 23 +- flang/lib/Semantics/resolve-directives.cpp | 80 +++ flang/test/Driver/{no_files.f90 => no-files.f90} | 0 .../Driver/{version_test.f90 => version-test.f90} | 0 flang/test/Flang-Driver/code-gen.f90 | 15 + flang/test/Flang-Driver/driver-help-hidden.f90 | 1 + flang/test/Flang-Driver/driver-help.f90 | 2 + flang/test/Flang-Driver/emit-obj.f90 | 14 - .../{macro_def_undef.f90 => macro-def-undef.f90} | 0 .../{macro_multiline.f90 => macro-multiline.f90} | 0 flang/test/Flang-Driver/phases.f90 | 20 + flang/test/Semantics/acc-clause-validity.f90 | 3 - flang/test/Semantics/acc-declare-validity.f90 | 57 ++ .../{Generic-cxx2a.cmake => Generic-cxx20.cmake} | 0 libcxx/docs/DesignDocs/FeatureTestMacros.rst | 2 +- libcxx/docs/FeatureTestMacroTable.rst | 2 +- libcxx/docs/UsingLibcxx.rst | 2 +- libcxx/include/__config | 4 +- libcxx/include/filesystem | 7 +- libcxx/include/new | 20 +- libcxx/include/string | 12 +- libcxx/include/string_view | 12 +- libcxx/include/version | 22 +- libcxx/src/filesystem/operations.cpp | 25 +- .../algorithm.version.pass.cpp | 44 +- .../support.limits.general/any.version.pass.cpp | 8 +- .../support.limits.general/array.version.pass.cpp | 26 +- .../support.limits.general/atomic.version.pass.cpp | 104 +-- .../support.limits.general/bit.version.pass.cpp | 40 +- .../support.limits.general/chrono.version.pass.cpp | 12 +- .../support.limits.general/cmath.version.pass.cpp | 12 +- .../compare.version.pass.cpp | 16 +- .../complex.version.pass.cpp | 8 +- .../concepts.version.pass.cpp | 16 +- .../cstddef.version.pass.cpp | 8 +- .../support.limits.general/deque.version.pass.cpp | 24 +- .../exception.version.pass.cpp | 8 +- .../execution.version.pass.cpp | 8 +- .../filesystem.version.pass.cpp | 20 +- .../forward_list.version.pass.cpp | 40 +- .../functional.version.pass.cpp | 60 +- .../iomanip.version.pass.cpp | 8 +- .../istream.version.pass.cpp | 16 +- .../iterator.version.pass.cpp | 34 +- .../support.limits.general/limits.version.pass.cpp | 16 +- .../support.limits.general/list.version.pass.cpp | 40 +- .../support.limits.general/locale.version.pass.cpp | 16 +- .../support.limits.general/map.version.pass.cpp | 36 +- .../support.limits.general/memory.version.pass.cpp | 68 +- .../support.limits.general/mutex.version.pass.cpp | 8 +- .../support.limits.general/new.version.pass.cpp | 24 +- .../numbers.version.pass.cpp | 16 +- .../numeric.version.pass.cpp | 36 +- .../optional.version.pass.cpp | 8 +- .../ostream.version.pass.cpp | 16 +- .../support.limits.general/regex.version.pass.cpp | 8 +- .../scoped_allocator.version.pass.cpp | 8 +- .../support.limits.general/set.version.pass.cpp | 32 +- .../shared_mutex.version.pass.cpp | 12 +- .../support.limits.general/span.version.pass.cpp | 16 +- .../support.limits.general/string.version.pass.cpp | 44 +- .../string_view.version.pass.cpp | 20 +- .../support.limits.general/tuple.version.pass.cpp | 20 +- .../type_traits.version.pass.cpp | 68 +- .../unordered_map.version.pass.cpp | 44 +- .../unordered_set.version.pass.cpp | 40 +- .../utility.version.pass.cpp | 36 +- .../variant.version.pass.cpp | 8 +- .../support.limits.general/vector.version.pass.cpp | 28 +- .../version.version.pass.cpp | 626 ++++++++-------- .../support.types/nullptr_t_integral_cast.pass.cpp | 6 +- libcxx/test/support/test_macros.h | 2 + libcxx/utils/ci/Dockerfile | 25 +- libcxx/utils/ci/buildkite-pipeline.yml | 4 +- libcxx/utils/ci/run-buildbot | 6 +- .../generate_feature_test_macro_components.py | 700 +++++++++--------- libcxxabi/src/cxa_personality.cpp | 105 +-- lld/COFF/DebugTypes.cpp | 18 +- lld/COFF/DebugTypes.h | 3 +- lld/MinGW/Driver.cpp | 5 + lld/MinGW/Options.td | 3 + lld/test/COFF/Inputs/precomp-ghash-obj1.obj | Bin 0 -> 3263 bytes lld/test/COFF/Inputs/precomp-ghash-obj2.obj | Bin 0 -> 2413 bytes lld/test/COFF/Inputs/precomp-ghash-precomp.obj | Bin 0 -> 64047 bytes lld/test/COFF/precomp-ghash.test | 53 ++ lld/test/MinGW/driver.test | 9 + lld/test/wasm/debuginfo.test | 6 +- lldb/include/lldb/Utility/ArchSpec.h | 9 + .../Disassembler/LLVMC/DisassemblerLLVMC.cpp | 19 +- .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 14 + .../SymbolFile/DWARF/DWARFDebugInfoEntry.cpp | 12 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h | 2 +- lldb/source/Utility/ArchSpec.cpp | 9 + lldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml | 24 + .../SymbolFile/DWARF/Inputs/subprogram_ranges.s | 159 +++++ .../Shell/SymbolFile/DWARF/subprogram_ranges.test | 17 + .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 6 + llvm/include/llvm/CodeGen/TargetPassConfig.h | 6 +- llvm/include/llvm/Frontend/OpenMP/OMPKinds.def | 20 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 22 +- llvm/include/llvm/IR/ValueHandle.h | 20 +- llvm/include/llvm/Option/OptParser.td | 2 + llvm/include/llvm/TableGen/Record.h | 26 +- llvm/include/llvm/Target/GlobalISel/Combine.td | 9 +- .../llvm/Transforms/Utils/BasicBlockUtils.h | 6 +- llvm/lib/Analysis/DependenceGraphBuilder.cpp | 131 ++-- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 2 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 2 + llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 7 + llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 1 + llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 22 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 9 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 61 ++ llvm/lib/CodeGen/TargetPassConfig.cpp | 20 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 1 - llvm/lib/Frontend/OpenMP/OMPContext.cpp | 10 +- llvm/lib/IR/BasicBlock.cpp | 8 +- llvm/lib/Support/AMDGPUMetadata.cpp | 1 - llvm/lib/TableGen/JSONBackend.cpp | 2 +- llvm/lib/TableGen/Record.cpp | 16 +- llvm/lib/TableGen/TGParser.cpp | 15 +- .../Target/AArch64/AArch64TargetTransformInfo.cpp | 8 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 2 + llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 2 - llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp | 15 - llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h | 15 +- llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp | 5 +- .../Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 19 +- .../Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp | 3 - llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 22 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 23 +- llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 228 +++--- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h | 16 +- llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 23 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h | 3 +- .../Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp | 5 - llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h | 3 - llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 32 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 31 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 13 +- llvm/lib/Target/AMDGPU/AMDGPUInline.cpp | 8 - .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp | 10 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h | 3 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 16 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 9 +- .../lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp | 3 - llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 3 + llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp | 18 +- llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp | 5 +- .../Target/AMDGPU/AMDGPULowerKernelArguments.cpp | 23 +- .../Target/AMDGPU/AMDGPULowerKernelAttributes.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 2 - .../Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp | 19 - llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h | 1 - llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp | 1 - llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.h | 4 - llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp | 2 - llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.h | 3 +- .../AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp | 5 - llvm/lib/Target/AMDGPU/AMDGPUPTNote.h | 7 +- llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp | 4 - llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.h | 1 - .../Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp | 7 +- .../Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp | 6 +- .../Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp | 15 +- llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 39 - .../Target/AMDGPU/AMDGPUPropagateAttributes.cpp | 8 - llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp | 9 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 2 +- .../Target/AMDGPU/AMDGPURewriteOutArguments.cpp | 19 - llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 37 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 12 +- llvm/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp | 9 +- .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 59 +- llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 35 +- .../AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUUnifyMetadata.cpp | 5 - llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp | 26 - llvm/lib/Target/AMDGPU/AMDKernelCodeT.h | 8 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 29 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 22 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 7 - llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp | 13 - llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 17 +- llvm/lib/Target/AMDGPU/GCNILPSched.cpp | 1 - llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp | 20 - llvm/lib/Target/AMDGPU/GCNIterativeScheduler.h | 6 - llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp | 13 - llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 5 - llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp | 6 - llvm/lib/Target/AMDGPU/GCNRegPressure.cpp | 17 - llvm/lib/Target/AMDGPU/GCNRegPressure.h | 8 +- llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp | 5 - .../AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp | 5 +- .../AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp | 6 - .../AMDGPU/MCTargetDesc/AMDGPUELFStreamer.cpp | 3 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUELFStreamer.h | 6 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 6 +- .../AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h | 2 +- .../AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp | 8 +- .../AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h | 12 - .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 30 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h | 18 +- .../AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp | 9 +- .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 14 - llvm/lib/Target/AMDGPU/R600AsmPrinter.cpp | 1 - llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp | 10 - .../lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp | 26 - llvm/lib/Target/AMDGPU/R600Defines.h | 2 - llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp | 17 - llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp | 13 - llvm/lib/Target/AMDGPU/R600FrameLowering.cpp | 4 - llvm/lib/Target/AMDGPU/R600FrameLowering.h | 1 - llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 34 +- llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 24 - llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp | 6 - .../AMDGPU/R600OpenCLImageTypeLoweringPass.cpp | 15 - .../Target/AMDGPU/R600OptimizeVectorRegisters.cpp | 20 - llvm/lib/Target/AMDGPU/R600Packetizer.cpp | 6 - llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/SIAddIMGInit.cpp | 7 - llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 22 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 27 - llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp | 2 - llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 8 - llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp | 6 - llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 8 +- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 1 - llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 62 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 14 +- llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 20 - llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 29 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 38 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 17 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 23 - llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 18 - llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 8 - llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp | 9 - llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 13 - llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 17 +- llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp | 19 - llvm/lib/Target/AMDGPU/SIMachineScheduler.h | 8 +- llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 21 +- llvm/lib/Target/AMDGPU/SIModeRegister.cpp | 12 - llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 6 - .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 2 - llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 27 - llvm/lib/Target/AMDGPU/SIPostRABundler.cpp | 4 - llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp | 7 - llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp | 3 - llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 28 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 19 +- .../Target/AMDGPU/SIRemoveShortExecBranches.cpp | 2 - llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 10 - llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 19 - llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp | 2 + llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h | 5 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 30 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 19 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp | 6 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h | 3 +- .../Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp | 4 +- llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.h | 2 +- .../Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 9 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 8 +- llvm/lib/Target/NVPTX/NVPTX.h | 19 + llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | 31 +- llvm/lib/Target/NVPTX/NVPTXTargetMachine.h | 2 + llvm/lib/Target/NVPTX/NVVMIntrRange.cpp | 40 +- llvm/lib/Target/NVPTX/NVVMReflect.cpp | 15 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp | 6 +- .../lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h | 1 - llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 789 +-------------------- llvm/lib/Target/PowerPC/PPCISelLowering.h | 20 +- llvm/lib/Target/PowerPC/PPCSubtarget.h | 3 - llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 15 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 33 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 42 ++ llvm/lib/Target/VE/VEAsmPrinter.cpp | 8 +- .../WebAssembly/WebAssemblyDebugValueManager.cpp | 14 +- .../WebAssembly/WebAssemblyExplicitLocals.cpp | 4 + .../WebAssembly/WebAssemblyTargetMachine.cpp | 4 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 36 +- llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp | 26 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 8 +- llvm/lib/Transforms/Utils/AMDGPUEmitPrintf.cpp | 3 - llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 29 +- llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp | 15 +- llvm/lib/Transforms/Utils/CloneModule.cpp | 15 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 8 +- llvm/lib/Transforms/Utils/Local.cpp | 136 ++-- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 1 - llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 38 +- .../AArch64/sve-getIntrinsicInstrCost-gather.ll | 12 + .../AArch64/sve-getIntrinsicInstrCost-scatter.ll | 11 + llvm/test/Analysis/DDG/print-dot-ddg.ll | 74 ++ .../CodeGen/AArch64/sve-intrinsics-perm-select.ll | 120 ++++ .../AMDGPU/GlobalISel/combine-urem-pow-2.mir | 156 ++++ .../GlobalISel/irtranslator-call-non-fixed.ll | 4 +- .../CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll | 47 +- .../AMDGPU/GlobalISel/legalize-sextload-global.mir | 20 + .../AMDGPU/GlobalISel/legalize-zextload-global.mir | 20 + llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll | 59 +- llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll | 394 +--------- llvm/test/CodeGen/AMDGPU/s_code_end.ll | 8 +- llvm/test/CodeGen/AMDGPU/saddo.ll | 6 +- llvm/test/CodeGen/AMDGPU/saddsat.ll | 6 +- llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll | 4 +- .../CodeGen/AMDGPU/schedule-regpressure-limit2.ll | 8 +- llvm/test/CodeGen/AMDGPU/scratch-simple.ll | 14 +- llvm/test/CodeGen/AMDGPU/sdiv.ll | 8 +- llvm/test/CodeGen/AMDGPU/sdwa-vop2-64bit.mir | 6 +- .../AMDGPU/select-fabs-fneg-extract-legacy.ll | 2 +- llvm/test/CodeGen/AMDGPU/select.f16.ll | 4 +- llvm/test/CodeGen/AMDGPU/sendmsg-m0-hazard.mir | 4 +- llvm/test/CodeGen/AMDGPU/setcc-fneg-constant.ll | 2 +- llvm/test/CodeGen/AMDGPU/setcc64.ll | 4 +- llvm/test/CodeGen/AMDGPU/sext-in-reg.ll | 8 +- llvm/test/CodeGen/AMDGPU/shift-i64-opts.ll | 4 +- llvm/test/CodeGen/AMDGPU/shl.ll | 6 +- llvm/test/CodeGen/AMDGPU/shl.v2i16.ll | 6 +- llvm/test/CodeGen/AMDGPU/shl_add_ptr_csub.ll | 2 +- llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll | 2 +- .../test/CodeGen/AMDGPU/shrink-add-sub-constant.ll | 8 +- llvm/test/CodeGen/AMDGPU/sibling-call.ll | 6 +- llvm/test/CodeGen/AMDGPU/sign_extend.ll | 4 +- llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll | 4 +- llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll | 2 +- llvm/test/CodeGen/AMDGPU/smrd.ll | 10 +- .../CodeGen/AMDGPU/spill-agpr-partially-undef.mir | 2 +- llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll | 2 +- llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir | 4 +- llvm/test/CodeGen/AMDGPU/ssubsat.ll | 6 +- llvm/test/CodeGen/AMDGPU/store-local.128.ll | 6 +- llvm/test/CodeGen/AMDGPU/store-local.96.ll | 6 +- llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 6 +- llvm/test/CodeGen/AMDGPU/sub.v2i16.ll | 4 +- llvm/test/CodeGen/AMDGPU/trunc-store-i1.ll | 4 +- llvm/test/CodeGen/AMDGPU/uaddsat.ll | 6 +- llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll | 4 +- .../AMDGPU/unstructured-cfg-def-use-issue.ll | 3 +- llvm/test/CodeGen/AMDGPU/unsupported-calls.ll | 4 +- llvm/test/CodeGen/AMDGPU/usubsat.ll | 6 +- llvm/test/CodeGen/AMDGPU/v_mac.ll | 6 +- llvm/test/CodeGen/AMDGPU/v_madak_f16.ll | 4 +- .../CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir | 2 +- llvm/test/CodeGen/AMDGPU/vector-alloca.ll | 10 +- llvm/test/CodeGen/AMDGPU/vgpr-spill.mir | 2 +- llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll | 4 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 4 +- llvm/test/CodeGen/AMDGPU/xnor.ll | 10 +- llvm/test/CodeGen/AMDGPU/zero_extend.ll | 4 +- llvm/test/CodeGen/NVPTX/intrinsic-old.ll | 5 + .../test/CodeGen/NVPTX/nvvm-reflect-module-flag.ll | 3 +- llvm/test/CodeGen/NVPTX/nvvm-reflect.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 512 +++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll | 698 ++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll | 479 +++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll | 113 +++ llvm/test/CodeGen/WebAssembly/dbgvalue.ll | 2 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 66 +- llvm/test/CodeGen/X86/cmp-concat.ll | 18 +- llvm/test/CodeGen/X86/movmsk-cmp.ll | 595 ++++++---------- llvm/test/MC/WebAssembly/debug-byval-struct.ll | 116 +++ llvm/test/MC/X86/x86_long_nop.s | 2 + llvm/test/Other/copy-metadata-of-declaration.ll | 10 + llvm/test/Reduce/remove-global-vars.ll | 9 + .../Coroutines}/coro-retcon-unreachable.ll | 1 + .../Transforms/LoopUnroll/unroll-opt-attribute.ll | 34 + .../dont-fold-tail-for-assumed-divisible-TC.ll | 70 -- .../dont-fold-tail-for-divisible-TC.ll | 66 ++ .../SLPVectorizer/X86/shrink_after_reorder.ll | 3 +- ...ComparisonIntoPredecessors-no-new-successors.ll | 35 + llvm/test/Transforms/SimplifyCFG/branch-fold.ll | 70 +- .../change-to-unreachable-matching-successor.ll | 16 + llvm/test/Transforms/SimplifyCFG/indirectbr.ll | 186 ++++- .../SimplifyCFG/unreachable-matching-successor.ll | 16 + llvm/test/tools/llvm-cov/Inputs/branch-c-general.c | 260 +++++++ llvm/test/tools/llvm-cov/branch-c-general.c | 311 -------- llvm/test/tools/llvm-cov/branch-c-general.test | 166 +++++ llvm/test/tools/llvm-cov/branch-export-json.test | 4 +- llvm/test/tools/llvm-cov/branch-export-lcov.test | 4 +- llvm/test/tools/llvm-cov/branch-noShowBranch.test | 4 +- .../tools/llvm-pdbutil/Inputs/unknown-record.obj | Bin 0 -> 3284 bytes llvm/test/tools/llvm-pdbutil/unknown-records.test | 3 + llvm/tools/llvm-objdump/llvm-objdump.cpp | 9 +- llvm/tools/llvm-objdump/llvm-objdump.h | 5 +- llvm/tools/llvm-pdbutil/DumpOutputStyle.cpp | 16 +- llvm/tools/llvm-pdbutil/FormatUtil.cpp | 7 +- llvm/tools/llvm-pdbutil/FormatUtil.h | 2 +- .../deltas/ReduceGlobalVarInitializers.cpp | 6 +- llvm/tools/opt/opt.cpp | 2 + llvm/unittests/Analysis/DDGTest.cpp | 154 ++++ llvm/unittests/IR/ValueHandleTest.cpp | 5 +- llvm/unittests/Option/OptionMarshallingTest.cpp | 6 +- llvm/unittests/Support/DataExtractorTest.cpp | 3 +- llvm/utils/TableGen/CodeEmitterGen.cpp | 2 +- llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 2 +- llvm/utils/TableGen/CodeGenDAGPatterns.h | 2 +- llvm/utils/TableGen/FixedLenDecoderEmitter.cpp | 2 +- llvm/utils/TableGen/OptParserEmitter.cpp | 4 + llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 53 +- mlir/docs/ConversionToLLVMDialect.md | 2 +- mlir/docs/Dialects/LLVM.md | 12 +- mlir/docs/LLVMDialectMemRefConvention.md | 56 +- mlir/docs/SPIRVToLLVMDialectConversion.md | 140 ++-- mlir/docs/Tutorials/Toy/Ch-6.md | 26 +- mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp | 12 +- mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp | 12 +- mlir/include/mlir-c/Support.h | 2 +- .../mlir/Conversion/SPIRVToLLVM/SPIRVToLLVMPass.h | 2 +- .../StandardToLLVM/ConvertStandardToLLVM.h | 18 +- mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td | 4 +- mlir/include/mlir/Dialect/Async/IR/AsyncOps.td | 2 +- mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt | 2 + mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h | 16 + mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td | 6 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 105 ++- .../mlir/Dialect/LLVMIR/LLVMOpsInterfaces.td | 30 + mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h | 52 +- mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 4 +- mlir/include/mlir/Dialect/SCF/SCFOps.td | 4 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td | 2 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 2 +- .../mlir/Dialect/StandardOps/Transforms/Passes.td | 2 +- mlir/include/mlir/Dialect/Tosa/Utils/QuantUtils.h | 2 +- mlir/include/mlir/Dialect/Vector/VectorOps.td | 2 +- mlir/include/mlir/IR/ImplicitLocOpBuilder.h | 4 +- mlir/include/mlir/IR/OpDefinition.h | 85 ++- mlir/include/mlir/IR/OpImplementation.h | 12 +- mlir/include/mlir/Pass/PassRegistry.h | 6 +- mlir/include/mlir/Support/IndentedOstream.h | 2 +- .../include/mlir/Target/LLVMIR/ModuleTranslation.h | 16 +- mlir/include/mlir/Target/LLVMIR/TypeTranslation.h | 2 +- mlir/include/mlir/Transforms/Bufferize.h | 2 +- .../Dialect/LLVMIR/CPU/X86/test-inline-asm.mlir | 8 +- .../LLVMIR/CPU/test-vector-reductions-fp.mlir | 16 +- .../LLVMIR/CPU/test-vector-reductions-int.mlir | 62 +- mlir/lib/Analysis/AffineStructures.cpp | 2 +- mlir/lib/Bindings/Python/IRModules.cpp | 2 +- mlir/lib/CAPI/Transforms/Passes.cpp | 2 +- mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp | 34 +- .../GPUCommon/ConvertKernelFuncToBlob.cpp | 2 +- .../GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp | 18 +- mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h | 4 +- .../GPUCommon/IndexIntrinsicsOpLowering.h | 13 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 12 +- .../GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp | 27 +- mlir/lib/Conversion/PDLToPDLInterp/Predicate.h | 2 +- .../SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp | 4 +- mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp | 11 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 49 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 16 +- .../Dialect/Async/Transforms/AsyncParallelFor.cpp | 2 +- mlir/lib/Dialect/LLVMIR/CMakeLists.txt | 1 + mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 189 ++++- mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp | 50 +- mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp | 59 +- mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp | 7 +- mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp | 8 +- mlir/lib/Dialect/LLVMIR/IR/TypeDetail.h | 25 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 5 +- .../Dialect/Linalg/Transforms/Sparsification.cpp | 2 +- mlir/lib/Dialect/PDL/IR/PDL.cpp | 2 +- mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp | 2 +- .../Linking/ModuleCombiner/ModuleCombiner.cpp | 10 +- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 3 +- .../Dialect/StandardOps/Transforms/ExpandOps.cpp | 4 +- .../Tosa/Transforms/TosaMakeBroadcastable.cpp | 2 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 2 +- mlir/lib/ExecutionEngine/JitRunner.cpp | 8 +- mlir/lib/IR/AsmPrinter.cpp | 36 +- mlir/lib/IR/Operation.cpp | 24 + mlir/lib/IR/Value.cpp | 5 - mlir/lib/Rewrite/ByteCode.h | 2 +- mlir/lib/TableGen/TypeDef.cpp | 2 +- mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp | 8 +- mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 202 +++--- mlir/lib/Target/LLVMIR/TypeTranslation.cpp | 14 +- mlir/lib/Target/SPIRV/Serialization.cpp | 2 +- mlir/lib/Transforms/BufferUtils.cpp | 2 +- mlir/lib/Transforms/Utils/FoldUtils.cpp | 6 +- mlir/lib/Transforms/Utils/LoopUtils.cpp | 3 +- mlir/lib/Transforms/Utils/RegionUtils.cpp | 2 +- mlir/test/Bindings/Python/ir_attributes.py | 2 +- mlir/test/Bindings/Python/ir_operation.py | 6 +- .../lower-launch-func-to-gpu-runtime-calls.mlir | 10 +- .../Conversion/GPUCommon/memory-attrbution.mlir | 76 +- mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 70 +- mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir | 58 +- .../test/Conversion/GPUToVulkan/invoke-vulkan.mlir | 40 +- .../Conversion/OpenMPToLLVM/convert-to-llvmir.mlir | 18 +- .../SPIRVToLLVM/arithmetic-ops-to-llvm.mlir | 14 +- .../SPIRVToLLVM/bitwise-ops-to-llvm.mlir | 222 +++--- .../Conversion/SPIRVToLLVM/cast-ops-to-llvm.mlir | 20 +- .../SPIRVToLLVM/comparison-ops-to-llvm.mlir | 20 +- .../SPIRVToLLVM/constant-op-to-llvm.mlir | 10 +- .../SPIRVToLLVM/control-flow-ops-to-llvm.mlir | 32 +- .../Conversion/SPIRVToLLVM/func-ops-to-llvm.mlir | 8 +- .../Conversion/SPIRVToLLVM/glsl-ops-to-llvm.mlir | 4 +- .../SPIRVToLLVM/logical-ops-to-llvm.mlir | 12 +- .../SPIRVToLLVM/lower-host-to-llvm-calls.mlir | 8 +- .../Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir | 40 +- .../Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir | 22 +- .../Conversion/SPIRVToLLVM/shift-ops-to-llvm.mlir | 36 +- .../StandardToLLVM/calling-convention.mlir | 14 +- .../StandardToLLVM/convert-argattrs.mlir | 4 +- .../StandardToLLVM/convert-dynamic-memref-ops.mlir | 284 ++++---- .../Conversion/StandardToLLVM/convert-funcs.mlir | 14 +- .../StandardToLLVM/convert-static-memref-ops.mlir | 220 +++--- .../StandardToLLVM/convert-to-llvmir.mlir | 622 ++++++++-------- .../StandardToLLVM/standard-to-llvm.mlir | 42 +- .../VectorToLLVM/vector-mask-to-llvm.mlir | 14 +- .../Conversion/VectorToLLVM/vector-to-llvm.mlir | 378 +++++----- mlir/test/Dialect/GPU/outlining.mlir | 4 +- mlir/test/Dialect/LLVMIR/dialect-cast.mlir | 14 +- mlir/test/Dialect/LLVMIR/func.mlir | 56 +- mlir/test/Dialect/LLVMIR/global.mlir | 78 +- mlir/test/Dialect/LLVMIR/invalid.mlir | 220 +++--- mlir/test/Dialect/LLVMIR/legalize-for-export.mlir | 12 +- mlir/test/Dialect/LLVMIR/nvvm.mlir | 74 +- mlir/test/Dialect/LLVMIR/rocdl.mlir | 150 ++-- mlir/test/Dialect/LLVMIR/roundtrip.mlir | 286 ++++---- mlir/test/Dialect/LLVMIR/terminator.mlir | 2 +- mlir/test/Dialect/LLVMIR/types-invalid.mlir | 13 +- mlir/test/Dialect/LLVMIR/types.mlir | 32 +- mlir/test/Dialect/Linalg/llvm.mlir | 62 +- mlir/test/Dialect/OpenMP/ops.mlir | 12 +- mlir/test/Dialect/SPIRV/IR/types.mlir | 4 +- mlir/test/Target/arm-sve.mlir | 6 +- mlir/test/Target/avx512.mlir | 16 +- mlir/test/Target/import.ll | 84 +-- mlir/test/Target/llvmir-intrinsics.mlir | 84 +-- mlir/test/Target/llvmir-invalid.mlir | 13 + mlir/test/Target/llvmir-types.mlir | 24 +- mlir/test/Target/llvmir.mlir | 716 ++++++++++--------- mlir/test/Target/nvvmir.mlir | 50 +- mlir/test/Target/openmp-llvm.mlir | 60 +- mlir/test/Target/rocdl.mlir | 86 +-- mlir/test/Transforms/test-convert-call-op.mlir | 6 +- mlir/test/lib/Transforms/TestConvertCallOp.cpp | 3 +- mlir/test/mlir-cpu-runner/bare_ptr_call_conv.mlir | 2 +- mlir/test/mlir-cpu-runner/simple.mlir | 24 +- mlir/test/mlir-tblgen/rewriter-indexing.td | 3 + mlir/tools/mlir-tblgen/RewriterGen.cpp | 12 +- openmp/docs/design/Runtimes.rst | 79 +++ openmp/docs/remarks/OptimizationRemarks.rst | 25 + openmp/libomptarget/plugins/cuda/src/rtl.cpp | 123 ++-- 604 files changed, 11002 insertions(+), 9022 deletions(-) create mode 100644 clang/test/OpenMP/declare_variant_ast_x86_64.c rename flang/test/Driver/{no_files.f90 => no-files.f90} (100%) rename flang/test/Driver/{version_test.f90 => version-test.f90} (100%) create mode 100644 flang/test/Flang-Driver/code-gen.f90 delete mode 100644 flang/test/Flang-Driver/emit-obj.f90 rename flang/test/Flang-Driver/{macro_def_undef.f90 => macro-def-undef.f90} (100%) rename flang/test/Flang-Driver/{macro_multiline.f90 => macro-multiline.f90} (100%) create mode 100644 flang/test/Flang-Driver/phases.f90 create mode 100644 flang/test/Semantics/acc-declare-validity.f90 rename libcxx/cmake/caches/{Generic-cxx2a.cmake => Generic-cxx20.cmake} (100%) create mode 100644 lld/test/COFF/Inputs/precomp-ghash-obj1.obj create mode 100644 lld/test/COFF/Inputs/precomp-ghash-obj2.obj create mode 100644 lld/test/COFF/Inputs/precomp-ghash-precomp.obj create mode 100644 lld/test/COFF/precomp-ghash.test create mode 100644 lldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml create mode 100644 lldb/test/Shell/SymbolFile/DWARF/Inputs/subprogram_ranges.s create mode 100644 lldb/test/Shell/SymbolFile/DWARF/subprogram_ranges.test create mode 100644 llvm/test/Analysis/DDG/print-dot-ddg.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll create mode 100644 llvm/test/MC/WebAssembly/debug-byval-struct.ll create mode 100644 llvm/test/Other/copy-metadata-of-declaration.ll rename {clang/test/CodeGenCoroutines => llvm/test/Transforms/Coroutines}/coro-retc [...] delete mode 100644 llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-assumed-d [...] create mode 100644 llvm/test/Transforms/SimplifyCFG/FoldValueComparisonIntoPredece [...] create mode 100644 llvm/test/Transforms/SimplifyCFG/change-to-unreachable-matching [...] create mode 100644 llvm/test/Transforms/SimplifyCFG/unreachable-matching-successor.ll create mode 100644 llvm/test/tools/llvm-cov/Inputs/branch-c-general.c delete mode 100644 llvm/test/tools/llvm-cov/branch-c-general.c create mode 100644 llvm/test/tools/llvm-cov/branch-c-general.test create mode 100644 llvm/test/tools/llvm-pdbutil/Inputs/unknown-record.obj create mode 100644 llvm/test/tools/llvm-pdbutil/unknown-records.test create mode 100644 mlir/include/mlir/Dialect/LLVMIR/LLVMOpsInterfaces.td