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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_sq/llvm-master-aarch64-cpu2017-Os in repository toolchain/ci/llvm-project.

from 88c4a4a6beb5 [flang] Update the release notes adds bdfe556dd837 [clang][dataflow] Implement functionality for flow conditi [...] adds 869385b11c32 [flang][driver] Add support for `-O{0|1|2|3}` adds 7de277d684fd [llvm-ar] Improve MRI script CREATE command handling adds c06f01ffee86 [mlir][bufferization] Add `memory_space` op attribute adds 5830da1f8625 [AArch64] Define __FP_FAST_FMA[F] adds ba9d886db4fb [mlir][bufferization][NFC] Bufferize with PostOrder traversal adds 0b998053db7c [X86] combineConcatVectorOps - IsConcatFree must check ext [...] adds a83aa33d1bf9 [IR] Move vector.insert/vector.extract out of experimental [...] adds 94fbb147c8ce [STACKMAPS] Document+test UINT64_MAX stack size. adds 480f3e022839 [AMDGPU][GFX9][DOC][NFC] Update assembler syntax description adds 19efb84c7a03 [mlir][shape][bufferize][NFC] Bufferize block terminators [...] adds 4588b6fd2662 Fix clang docs build; NFC adds 8871c3c56269 [AMDGPU] Regenerate MIR checks. NFC. adds 7ebf70d85d63 [mlir][SCF][bufferize][NFC] Bufferize parallel_insert_slic [...] adds 8e691e1f245a [mlir][SCF][bufferize] Bufferize scf.if/execute_region ter [...] adds 3ff93f838ebd [mlir][SCF][bufferize][NFC] Bufferize scf.for terminator s [...] adds 0d0a94a792c0 [mlir][bufferization][NFC] Fix typo in AllocTensorOp builders adds 5d50f51c970f [mlir][bufferization][NFC] Add error handling to getBuffer adds a0f843fdafa7 [SCF] Add thread_dim_mapping attribute to scf.foreach_thread adds b611376e7eb5 [clang][dataflow] Singleton pointer values for null pointers. adds 656b8d6c0193 [flang][NFC] Add array lowering tests adds 92df8c273669 [libc++] Improve Lit's buildhost=XXXX feature on a few platforms adds 633d1d0df766 [libc++] Use bounded iterators in std::span when the debug [...] adds e84674f7acea [gn build] Port 633d1d0df766 adds 97ed2fbc5f64 MIR: Fix parse error on empty CustomRegMask adds cfb4c1a735e9 [IndVars] Add test for PR56242 (NFC) adds 69ae441e4ce7 ARM: don't try to load function pointer before long call. adds bd90155df4a4 [flang][NFC] Add IO lowering tests adds 70a5c525349b [ARM][Thumb] Command-line option to ensure AAPCS compliant [...] adds 1466d65d9bbf [SPARC] Don't do leaf optimization on procedures with inli [...] adds f39c2a114283 [mlir][llvm] Add vector insert/extract intrinsics adds d6bfedd8ba73 [libc++] Remove dummy command in Dockerfile adds ca47ab128bf3 [Clang] Remove unused function declaration after 77475ffd2 [...] adds ac65403a21be [libc++][NFC] Remove trailing whitespace adds f5d781d6273c [X86] Support `_Float16` on SSE2 and up adds 45b995cda461 [mlir][bufferize][NFC] Change signature of allocateTensorF [...] adds 13fb97d68821 tsan: add missing guard for DumpProcessMap call adds c0b0b6a00a2c [mlir][bufferize] Infer memory space in all bufferization [...] adds 771c46ad291c [GlobalOpt] Add tests for memset with non-zero value (NFC) adds 8fa2e67979e5 [mlir][complex] complex.arg op to calculate the angle of c [...] adds f65c88c42fdd [GlobalOpt] Fix memset handling in global ctor evaluation [...] adds f164814f2f18 [mlir][SCF][bufferize] Small simplification and more comments adds 48eb2bc608e2 [flang][driver] Use `-O{0|1|2|3}` to define LLVM backend p [...] adds b4f2d7cde54c [lldb] [llgs] Support "t" vCont action adds 8322fe200d60 Adding support for target in_reduction adds aa89bb3435e0 [Driver][test] Add libclang_rt.profile{{.*}}.a tests for NetBSD adds b5818e4eb439 [AMDGPU] Cluster stores as well as loads for GFX11 adds e7d1cc923ee3 [libc++][doc] Fixes a broken table entry. adds 92d31a7cdffa Silence some format specifier warnings adds 92fd2eb74f5b [Clang][OpenMP] Claim nowait clause on taskwait adds 9878e17624d8 Silence an "illegal conversion" diagnostic adds 6a1e5f5a7111 [llvm-ar] Fix MRI ADDLIB command when used with thin archives adds fe80829289bf [lldb] [llgs] Skip new vCont test on Windows adds 3a1a404ae2d3 [memprof] Return an error for unsupported symbolization. adds 856056d1b0b3 [mlir][LLVMIR] Add support for va_start/copy/end intrinsics adds fc7f7260a609 [mlir][LLVMIR] Memorize compatible LLVM types adds a2c1603206a4 [libc++] Add a few missing min/max macro push/pop adds becbbb7e3c81 Round up zero-sized symbols to 1 byte in `.debug_aranges` [...] adds 9bdb7e573427 [lldb] Add a log dump command adds 62b5aa984e84 llvm-reduce: Check shouldKeep before trying to reduce operands adds 049e107139a3 [NFC][SVE] Add more tests of vector compares and selects t [...] adds c4302e4fc201 [BOLT][NFC] Use llvm::less_first adds 0d477f63b0ea [BOLT][NFC] Add aliases for ICP flags adds 535845708949 [libc][docs] Added fmod performance results. adds c7243f21d3f1 [OpenMP] Only strip runtime attributes if needed adds ee0dd2ec112b [Docs] Update clang & llvm release notes for HLSL adds eb5af0acf054 [Symbolize] Add log markup --filter to llvm-symbolizer. adds 03859994b373 [gn build] Port eb5af0acf054 adds 057e33ef36d0 [mlir][sparse]Add more integration tests for sparse_tensor.unary adds d58b5a06147e [BOLT] Restrict icp-inline to callsites adds 7598a42e2abc [Symbolize] Fix llvm-symbolizer --filter-markup test on Windows. adds d3ff32720dbe [Symbolize] Fix MarkupFilter tests for Windows. adds 15d1cb45204f [mlir][sparse]more integration test cases for sparse_tenso [...] adds aab7e2fa05c0 [MLIR][Parser] Fix AffineParser colliding bare identifiers [...] adds 4db52450c1a4 [mlir][sparse] remove redundant whitespace adds fa34210fa69f [clang][dataflow] Do not allow substitution of true/false [...] adds ae90bc846758 [clang][dataflow] Add `buildAndSubstituteFlowCondition` to [...] adds 6678f8e505b1 [ubsan] Using metadata instead of prologue data for functi [...] adds e2e9e708e5c2 [Coroutine] Remove the '!func_sanitize' metadata for split [...] adds 6e2b3cc6caac Fix sphinx docs build adds ef5510d81b64 [NFC][lldb] Correct Module::FindFunctions documentation adds 11b414463dc2 [test] Add workaround for flaky error we see on Windows bots adds cb471241797b [mlir][bufferize] Improve to_tensor/to_memref folding adds 8f7cca90af6e Revert "[X86] Support `_Float16` on SSE2 and up" adds aadc9d26a361 [RISCV] Cost model for scalable reductions adds 0533b6e2f605 [RISCV] Remove a use of getMinVLen in favor of getRealMinVLen adds 80baa56c467a [libc++][lit][AIX] Port tests for money format to AIX adds 339e824bcae0 [libc++][lit][AIX] Port tests for getting time to AIX adds d2dad6287cb3 Add wait for child processe(s) to exit. (amended+clang-formatted) adds 20dd3297b1c0 [LV] Allow scalable vectorization with vscale = 1 adds 9afa5b8da228 [RISCV] Add tests for (load (add X, [2048,4094])). NFC adds 87077c7eb53c [RISCV] Remove repeated calls to getSExtValue. NFC adds 1bdbf1374620 [Sanitizer][Darwin] atos does not show line numbers for globals adds cdfa15da94f0 Revert "[clang] Introduce -fstrict-flex-arrays=<n> for str [...] adds 62a71cc5ef3f [Sanitizer][Darwin] Mark test UNSUPPORTED instead of XFAIL adds df18167ac56d [docs] Restore missing blank line adds dacfa24f75c3 Delete 'llvm.asan.globals' for global metadata. adds 6824eee94203 [asan] Add missing dependency on Demangle adds c1b07d617705 Have CommandObjectParsed check for "commands that take no [...] adds 85eaecbe8e54 [pseudo] Check follow-sets instead of tying reduce actions [...] adds 6ec465ab8ff2 [libc] add printf oct conversion adds 0103d4da740c [Clang][OpenMP] Don't overload "extension" in status doc adds 53217ecb882c [lld][WebAssembly] Don't apply data relocations at static [...] adds 7b2355277950 Fix-forward ASan on Windows. adds 92bdc5c3e55f [mlir][ods] Add convertFromStorage field to parameters adds ca479dac514d Mark ASan global-location-nodebug test as unspported on win. adds 14d3021c10d0 [lit][test] relaxed GTEST_TOTAL_SHARDS checking for some g [...] adds a630ea3003de Reland [Metadata] Add a resize capability to MDNodes and a [...] adds e06a88cbe9cb [lldb] Use assertState in TestIgnoredExceptions adds efd90ffbfc42 [test] Add -fsanitize=array-bounds test for pseudo flexibl [...] adds 84b2e04aea1f [docs] Remove outdated status update for FreeBSD adds 261075590b2b llvm-reduce: Handle reducing FP values to nan adds 9f94d63a6a7e Add missing (void) for function declarations in C adds ea1b86127814 [RISCV] Fix misleading formatting and remove a dead getNod [...] adds de4a57cb21a1 [libc++] Re-add transitive includes that had been removed [...] adds f1e27716cf21 [LiveInterval] Simplify with partition_point. NFC adds 17a36c7c40e9 [RISCV] Zero extend immediate for vget/vset builtins to ma [...] adds 1919adb19b4a [RISCV] Fix the problem of parsing long version numbers adds 1178992c72b0 [RISCV] Optimize 2x SELECT for floating-point types adds f1dcc6af30d9 [lldb] [test] Mark test_vCont_supports_t llgs-only adds b941857b40ed [LoopInterchange] New cost model for loop interchange adds fa596c692115 [mlir][Vector] Fix reordering of floating point adds durin [...]

No new revisions were added by this update.

Summary of changes: bolt/lib/Core/BinaryFunctionProfile.cpp | 4 + bolt/lib/Core/DebugData.cpp | 15 +- bolt/lib/Passes/IndirectCallPromotion.cpp | 40 +- bolt/lib/Passes/LongJmp.cpp | 6 +- clang-tools-extra/clangd/CompileCommands.cpp | 2 +- .../pseudo/include/clang-pseudo/grammar/LRTable.h | 70 +- clang-tools-extra/pseudo/lib/GLR.cpp | 25 +- clang-tools-extra/pseudo/lib/grammar/LRTable.cpp | 37 +- .../pseudo/lib/grammar/LRTableBuild.cpp | 71 +- clang-tools-extra/pseudo/test/lr-build-basic.test | 10 +- .../pseudo/test/lr-build-conflicts.test | 18 +- clang-tools-extra/pseudo/unittests/GLRTest.cpp | 98 +- clang-tools-extra/pseudo/unittests/LRTableTest.cpp | 74 +- clang/docs/ClangCommandLineReference.rst | 6 - clang/docs/LanguageExtensions.rst | 1 + clang/docs/OpenMPSupport.rst | 198 +- clang/docs/ReleaseNotes.rst | 9 +- clang/include/clang/AST/Expr.h | 10 - .../FlowSensitive/DataflowAnalysisContext.h | 51 + .../Analysis/FlowSensitive/DataflowEnvironment.h | 14 + clang/include/clang/Basic/LangOptions.def | 1 - clang/include/clang/Basic/riscv_vector.td | 10 +- clang/include/clang/Driver/Options.td | 26 +- .../StaticAnalyzer/Core/PathSensitive/MemRegion.h | 1 - clang/lib/AST/Expr.cpp | 85 - clang/lib/AST/ExprConstant.cpp | 7 - .../FlowSensitive/DataflowAnalysisContext.cpp | 91 + .../Analysis/FlowSensitive/DataflowEnvironment.cpp | 4 + clang/lib/Analysis/FlowSensitive/Transfer.cpp | 10 + clang/lib/Basic/Targets/AArch64.cpp | 4 + clang/lib/CodeGen/BackendUtil.cpp | 1 - clang/lib/CodeGen/CGCall.cpp | 7 +- clang/lib/CodeGen/CGExpr.cpp | 51 +- clang/lib/CodeGen/CGExprScalar.cpp | 8 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 3 +- clang/lib/CodeGen/CGStmtOpenMP.cpp | 102 +- clang/lib/CodeGen/CodeGenFunction.cpp | 36 +- clang/lib/CodeGen/CodeGenFunction.h | 10 +- clang/lib/CodeGen/CodeGenModule.cpp | 16 + clang/lib/CodeGen/CodeGenModule.h | 5 + clang/lib/CodeGen/SanitizerMetadata.cpp | 46 - clang/lib/CodeGen/SanitizerMetadata.h | 6 - clang/lib/Driver/SanitizerArgs.cpp | 13 + clang/lib/Driver/ToolChains/Arch/ARM.cpp | 9 + clang/lib/Driver/ToolChains/Clang.cpp | 2 - clang/lib/Driver/ToolChains/Flang.cpp | 10 + clang/lib/Sema/SemaChecking.cpp | 54 +- clang/lib/Sema/SemaOpenMP.cpp | 3 +- clang/lib/StaticAnalyzer/Core/MemRegion.cpp | 3 - .../CodeGen/RISCV/rvv-intrinsics-overloaded/vget.c | 120 +- .../RISCV/rvv-intrinsics-overloaded/vlmul.c | 480 +-- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vset.c | 120 +- .../CodeGen/RISCV/rvv-intrinsics/vget-vset-ice.cpp | 4 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vget.c | 533 +-- clang/test/CodeGen/RISCV/rvv-intrinsics/vlmul.c | 540 +-- clang/test/CodeGen/RISCV/rvv-intrinsics/vset.c | 533 +-- ...4-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c | 12 +- ...sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp | 10 +- .../aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c | 4 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c | 60 +- clang/test/CodeGen/aarch64-sve-vls-arith-ops.c | 832 ++--- clang/test/CodeGen/aarch64-sve-vls-bitwise-ops.c | 198 +- clang/test/CodeGen/aarch64-sve-vls-compare-ops.c | 432 +-- clang/test/CodeGen/aarch64-sve-vls-shift-ops.c | 224 +- clang/test/CodeGen/aarch64-sve-vls-subscript-ops.c | 18 +- .../acle_neon_sve_bridge_dup_neonq.c | 50 +- .../acle_neon_sve_bridge_get_neonq.c | 48 +- .../acle_neon_sve_bridge_set_neonq.c | 48 +- clang/test/CodeGen/asan-globals.cpp | 76 +- .../CodeGen/attr-arm-sve-vector-bits-bitcast.c | 48 +- clang/test/CodeGen/attr-arm-sve-vector-bits-call.c | 2 +- clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c | 10 +- .../CodeGen/attr-arm-sve-vector-bits-codegen.c | 26 +- .../CodeGen/attr-arm-sve-vector-bits-globals.c | 24 +- clang/test/CodeGen/bounds-checking-fam.c | 34 + clang/test/CodeGen/bounds-checking-fma.c | 42 - clang/test/CodeGen/bounds-checking.c | 5 +- clang/test/CodeGen/hwasan-globals.cpp | 25 +- clang/test/CodeGen/memtag-globals.cpp | 23 - clang/test/CodeGen/object-size-flex-array.c | 106 - clang/test/CodeGen/sanitize-init-order.cpp | 12 - clang/test/CodeGen/ubsan-function.cpp | 5 +- clang/test/CodeGenCXX/catch-undef-behavior.cpp | 37 +- clang/test/CodeGenCXX/ubsan-function-noexcept.cpp | 6 +- clang/test/CodeGenObjC/ubsan-array-bounds.m | 43 + clang/test/Driver/coverage-ld.c | 9 + clang/test/Driver/fsanitize.c | 3 + clang/test/Driver/instrprof-ld.c | 19 + clang/test/OpenMP/target_in_reduction_codegen.cpp | 668 ++++ clang/test/Preprocessor/init-aarch64.c | 14 +- clang/test/Sema/array-bounds-ptr-arith.c | 39 +- .../SemaCXX/array-bounds-strict-flex-arrays.cpp | 19 - .../FlowSensitive/DataflowAnalysisContextTest.cpp | 196 + .../Analysis/FlowSensitive/TransferTest.cpp | 87 + compiler-rt/lib/tsan/rtl/tsan_rtl.cpp | 2 + .../test/asan/TestCases/Posix/coverage-fork.cpp | 5 + .../asan/TestCases/Windows/recalloc_sanity.cpp | 3 + compiler-rt/test/asan/TestCases/debug_locate.cpp | 4 +- .../test/asan/TestCases/describe_address.cpp | 2 +- .../test/asan/TestCases/global-demangle.cpp | 4 +- .../asan/TestCases/global-location-nodebug.cpp | 9 +- .../test/asan/TestCases/global-location.cpp | 6 +- .../sanitizer_common/TestCases/symbolize_stack.cpp | 2 +- flang/include/flang/Frontend/CodeGenOptions.def | 22 + flang/include/flang/Frontend/CodeGenOptions.h | 52 + flang/include/flang/Frontend/CompilerInvocation.h | 7 + flang/include/flang/Frontend/FrontendActions.h | 5 + flang/lib/Frontend/CMakeLists.txt | 1 + flang/lib/Frontend/CodeGenOptions.cpp | 23 + flang/lib/Frontend/CompilerInvocation.cpp | 15 + flang/lib/Frontend/FrontendActions.cpp | 101 +- flang/test/Driver/default-backend-pipelines.f90 | 25 + .../test/Driver/default-optimization-pipelines.f90 | 27 + flang/test/Driver/driver-help.f90 | 2 + flang/test/Driver/flang_f_opts.f90 | 14 + flang/test/Lower/array-derived-assignments.f90 | 104 + flang/test/Lower/array-derived.f90 | 141 + .../Lower/array-elemental-calls-char-byval.f90 | 198 + flang/test/Lower/array-elemental-calls-char.f90 | 267 ++ flang/test/Lower/array-elemental-subroutines.f90 | 64 + flang/test/Lower/array-expression-assumed-size.f90 | 303 ++ flang/test/Lower/array-expression-slice-1.f90 | 413 ++ flang/test/Lower/array-temp.f90 | 413 ++ flang/test/Lower/io-implied-do-fixes.f90 | 49 + flang/test/Lower/io-item-list.f90 | 2 +- flang/test/Lower/io-statement-1.f90 | 23 +- flang/test/Lower/io-statement-big-unit-checks.f90 | 315 ++ flang/test/Lower/io-statement-clean-ups.f90 | 6 +- libc/docs/math.rst | 10 +- libc/src/stdio/printf_core/CMakeLists.txt | 1 + libc/src/stdio/printf_core/converter.cpp | 2 +- libc/src/stdio/printf_core/converter_atlas.h | 1 + libc/src/stdio/printf_core/oct_converter.h | 111 + libc/test/src/stdio/printf_core/converter_test.cpp | 46 +- libc/test/src/stdio/sprintf_test.cpp | 121 + .../caches/Generic-no-transitive-includes.cmake | 2 + libcxx/docs/ReleaseNotes.rst | 22 +- libcxx/docs/Status/RangesIssues.csv | 2 +- libcxx/include/CMakeLists.txt | 1 + libcxx/include/__algorithm/ranges_minmax.h | 5 + libcxx/include/__config | 2 - libcxx/include/__iterator/bounded_iter.h | 229 ++ libcxx/include/__ranges/drop_view.h | 5 + libcxx/include/algorithm | 6 + libcxx/include/any | 4 + libcxx/include/array | 6 + libcxx/include/atomic | 4 + libcxx/include/bit | 4 + libcxx/include/charconv | 4 + libcxx/include/coroutine | 4 + libcxx/include/deque | 6 + libcxx/include/experimental/simd | 5 + libcxx/include/experimental/unordered_map | 8 + libcxx/include/ext/hash_map | 4 + libcxx/include/ext/hash_set | 4 + libcxx/include/forward_list | 6 + libcxx/include/functional | 4 + libcxx/include/future | 4 + libcxx/include/iterator | 8 + libcxx/include/list | 6 + libcxx/include/locale | 4 + libcxx/include/map | 6 + libcxx/include/memory | 5 + libcxx/include/module.modulemap.in | 1 + libcxx/include/mutex | 4 + libcxx/include/numeric | 5 + libcxx/include/optional | 15 + libcxx/include/ostream | 4 + libcxx/include/queue | 4 + libcxx/include/random | 4 + libcxx/include/regex | 5 + libcxx/include/set | 5 + libcxx/include/span | 78 +- libcxx/include/stack | 4 + libcxx/include/string | 10 + libcxx/include/string_view | 6 + libcxx/include/thread | 5 + libcxx/include/tuple | 22 +- libcxx/include/typeindex | 6 + libcxx/include/unordered_map | 6 + libcxx/include/unordered_set | 5 + libcxx/include/utility | 4 + libcxx/include/valarray | 5 + libcxx/include/variant | 5 + libcxx/include/vector | 6 + .../containers/associative/undef_min_max.pass.cpp | 19 - .../views.span/debug.iterator-indexing.pass.cpp | 97 + .../views.span/span.elem/assert.back.pass.cpp | 39 + .../views.span/span.elem/assert.front.pass.cpp | 39 + .../views.span/span.elem/assert.op_idx.pass.cpp | 39 + .../views.span/span.sub/assert.first.pass.cpp | 40 + .../views/views.span/span.sub/assert.last.pass.cpp | 40 + .../views.span/span.sub/assert.subspan.pass.cpp | 57 + .../iterators/bounded_iter/arithmetic.pass.cpp | 112 + .../iterators/bounded_iter/comparison.pass.cpp | 77 + .../iterators/bounded_iter/dereference.pass.cpp | 86 + .../iterators/bounded_iter/pointer_traits.pass.cpp | 60 + .../iterators/bounded_iter/types.compile.pass.cpp | 48 + libcxx/test/libcxx/nasty_macros.compile.pass.cpp | 4 + .../libcxx/numerics/c.math/undef_min_max.pass.cpp | 13 - libcxx/test/libcxx/private_headers.verify.cpp | 1 + libcxx/test/libcxx/transitive_includes.sh.cpp | 7 +- .../libcxx/transitive_includes/expected.algorithm | 4 + .../test/libcxx/transitive_includes/expected.any | 4 + .../test/libcxx/transitive_includes/expected.array | 15 + .../libcxx/transitive_includes/expected.atomic | 3 + .../libcxx/transitive_includes/expected.barrier | 4 + .../test/libcxx/transitive_includes/expected.bit | 1 + .../libcxx/transitive_includes/expected.bitset | 11 + .../libcxx/transitive_includes/expected.ccomplex | 11 + .../libcxx/transitive_includes/expected.charconv | 1 + .../libcxx/transitive_includes/expected.codecvt | 11 + .../libcxx/transitive_includes/expected.complex | 11 + .../expected.condition_variable | 11 + .../libcxx/transitive_includes/expected.coroutine | 1 + .../libcxx/transitive_includes/expected.ctgmath | 11 + .../test/libcxx/transitive_includes/expected.deque | 11 + .../expected.experimental_algorithm | 4 + .../expected.experimental_coroutine | 4 + .../expected.experimental_deque | 10 + .../expected.experimental_forward_list | 10 + .../expected.experimental_functional | 6 + .../expected.experimental_iterator | 2 + .../transitive_includes/expected.experimental_list | 10 + .../transitive_includes/expected.experimental_map | 9 + .../expected.experimental_memory_resource | 3 + .../expected.experimental_regex | 9 + .../transitive_includes/expected.experimental_set | 9 + .../transitive_includes/expected.experimental_simd | 18 + .../expected.experimental_string | 10 + .../expected.experimental_unordered_map | 8 + .../expected.experimental_unordered_set | 9 + .../expected.experimental_utility | 1 + .../expected.experimental_vector | 5 + .../transitive_includes/expected.ext_hash_map | 4 + .../transitive_includes/expected.ext_hash_set | 4 + .../libcxx/transitive_includes/expected.filesystem | 11 + .../libcxx/transitive_includes/expected.format | 8 + .../transitive_includes/expected.forward_list | 11 + .../libcxx/transitive_includes/expected.fstream | 11 + .../libcxx/transitive_includes/expected.functional | 6 + .../libcxx/transitive_includes/expected.future | 11 + .../libcxx/transitive_includes/expected.iomanip | 11 + .../test/libcxx/transitive_includes/expected.ios | 11 + .../libcxx/transitive_includes/expected.iostream | 11 + .../libcxx/transitive_includes/expected.istream | 11 + .../libcxx/transitive_includes/expected.iterator | 2 + .../test/libcxx/transitive_includes/expected.latch | 3 + .../test/libcxx/transitive_includes/expected.list | 11 + .../libcxx/transitive_includes/expected.locale | 11 + .../test/libcxx/transitive_includes/expected.map | 10 + .../libcxx/transitive_includes/expected.memory | 4 + .../test/libcxx/transitive_includes/expected.mutex | 11 + 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| 48 +- .../AMDGPU/GlobalISel/combine-foldable-fneg.mir | 160 +- .../AMDGPU/GlobalISel/combine-lshr-narrow.mir | 108 +- .../AMDGPU/GlobalISel/combine-or-redundant.mir | 68 +- .../AMDGPU/GlobalISel/combine-redundant-and.mir | 60 +- .../AMDGPU/GlobalISel/combine-redundant-neg.mir | 28 +- .../test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir | 20 +- .../AMDGPU/GlobalISel/combine-sext-inreg.mir | 177 +- .../combine-shift-imm-chain-illegal-types.mir | 222 +- .../GlobalISel/combine-shift-imm-chain-shlsat.mir | 114 +- .../combine-shift-of-shifted-logic-shlsat.mir | 266 +- .../combine-shl-from-extend-narrow.postlegal.mir | 254 +- .../combine-shl-from-extend-narrow.prelegal.mir | 178 +- .../AMDGPU/GlobalISel/combine-shl-narrow.mir | 108 +- .../AMDGPU/GlobalISel/combine-trunc-shl.mir | 33 +- .../AMDGPU/GlobalISel/combine-zext-trunc.mir | 112 +- .../test/CodeGen/AMDGPU/GlobalISel/global-value.ll | 84 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-abs.mir | 50 +- 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+- .../CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir | 40 +- .../CodeGen/AMDGPU/GlobalISel/legalize-add.mir | 120 +- .../AMDGPU/GlobalISel/legalize-addrspacecast.mir | 232 +- .../GlobalISel/legalize-amdgcn.rsq.clamp.mir | 44 +- .../GlobalISel/legalize-amdgcn.wavefrontsize.mir | 4 +- .../GlobalISel/legalize-amdgcn.workitem.id.mir | 24 +- .../CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 76 +- .../CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir | 132 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 384 +- .../legalize-atomic-cmpxchg-with-success.mir | 20 +- .../AMDGPU/GlobalISel/legalize-atomic-cmpxchg.mir | 24 +- .../AMDGPU/GlobalISel/legalize-atomicrmw-add.mir | 16 +- .../AMDGPU/GlobalISel/legalize-atomicrmw-and.mir | 16 +- .../AMDGPU/GlobalISel/legalize-atomicrmw-max.mir | 16 +- .../AMDGPU/GlobalISel/legalize-atomicrmw-min.mir | 16 +- .../AMDGPU/GlobalISel/legalize-atomicrmw-or.mir | 16 +- .../AMDGPU/GlobalISel/legalize-atomicrmw-sub.mir | 16 +- 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.../AMDGPU/GlobalISel/legalize-ptrtoint.mir | 48 +- .../AMDGPU/GlobalISel/legalize-rotl-rotr.mir | 533 +-- .../CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir | 16 +- .../CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir | 32 +- .../CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir | 132 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sbfx.mir | 44 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir | 144 +- .../CodeGen/AMDGPU/GlobalISel/legalize-select.mir | 180 +- .../AMDGPU/GlobalISel/legalize-sext-inreg.mir | 336 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sext.mir | 132 +- .../legalize-sextload-constant-32bit.mir | 24 +- .../AMDGPU/GlobalISel/legalize-sextload-flat.mir | 48 +- .../AMDGPU/GlobalISel/legalize-sextload-global.mir | 152 +- .../AMDGPU/GlobalISel/legalize-sextload-local.mir | 24 +- .../GlobalISel/legalize-sextload-private.mir | 24 +- .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 372 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir | 764 ++-- .../CodeGen/AMDGPU/GlobalISel/legalize-smax.mir | 120 +- .../CodeGen/AMDGPU/GlobalISel/legalize-smin.mir | 120 +- .../CodeGen/AMDGPU/GlobalISel/legalize-smulh.mir | 584 +-- .../CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir | 698 ++-- .../CodeGen/AMDGPU/GlobalISel/legalize-srem.mir | 144 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir | 132 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ssube.mir | 16 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir | 32 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir | 132 +- .../AMDGPU/GlobalISel/legalize-store-global.mir | 1904 +++++++--- .../CodeGen/AMDGPU/GlobalISel/legalize-store.mir | 272 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sub.mir | 120 +- .../CodeGen/AMDGPU/GlobalISel/legalize-trunc.mir | 80 +- .../CodeGen/AMDGPU/GlobalISel/legalize-uadde.mir | 16 +- .../CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir | 32 +- .../CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir | 132 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ubfx.mir | 64 +- .../CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir | 144 +- .../CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir | 666 ++-- .../CodeGen/AMDGPU/GlobalISel/legalize-umax.mir | 120 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umin.mir | 120 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir | 80 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir | 80 +- .../AMDGPU/GlobalISel/legalize-unmerge-values.mir | 124 +- .../CodeGen/AMDGPU/GlobalISel/legalize-urem.mir | 144 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir | 132 +- .../CodeGen/AMDGPU/GlobalISel/legalize-usube.mir | 16 +- .../CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir | 32 +- .../CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir | 132 +- .../GlobalISel/legalize-vector-args-gfx7.mir | 20 +- .../GlobalISel/legalize-vector-args-gfx8-plus.mir | 40 +- .../CodeGen/AMDGPU/GlobalISel/legalize-xor.mir | 76 +- .../CodeGen/AMDGPU/GlobalISel/legalize-zext.mir | 132 +- .../legalize-zextload-constant-32bit.mir | 24 +- .../AMDGPU/GlobalISel/legalize-zextload-flat.mir | 48 +- .../AMDGPU/GlobalISel/legalize-zextload-global.mir | 152 +- .../AMDGPU/GlobalISel/legalize-zextload-local.mir | 24 +- .../GlobalISel/legalize-zextload-private.mir | 24 +- .../AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll | 70 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll | 70 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll | 140 +- .../GlobalISel/postlegalizer-combiner-divrem.mir | 148 +- .../GlobalISel/postlegalizercombiner-and.mir | 143 +- .../GlobalISel/prelegalizer-combiner-divrem.mir | 344 +- .../regbankcombiner-clamp-minmax-const.mir | 4 +- .../AMDGPU/GlobalISel/regbankcombiner-smed3.mir | 62 +- .../AMDGPU/GlobalISel/regbankcombiner-umed3.mir | 62 +- .../AMDGPU/GlobalISel/regbankselect-add.s16.mir | 66 +- .../AMDGPU/GlobalISel/regbankselect-add.s32.mir | 36 +- .../AMDGPU/GlobalISel/regbankselect-add.v2s16.mir | 58 +- .../GlobalISel/regbankselect-amdgcn-exp-compr.mir | 20 +- .../AMDGPU/GlobalISel/regbankselect-amdgcn-exp.mir | 32 +- .../GlobalISel/regbankselect-amdgcn.ballot.i64.mir | 33 +- .../GlobalISel/regbankselect-amdgcn.class.mir | 40 +- .../GlobalISel/regbankselect-amdgcn.cvt.pkrtz.mir | 40 +- .../GlobalISel/regbankselect-amdgcn.div.fmas.mir | 90 +- .../GlobalISel/regbankselect-amdgcn.div.scale.mir | 40 +- .../GlobalISel/regbankselect-amdgcn.ds.append.mir | 12 +- .../regbankselect-amdgcn.ds.bpermute.mir | 11 +- .../GlobalISel/regbankselect-amdgcn.ds.consume.mir | 12 +- .../regbankselect-amdgcn.ds.gws.init.mir | 36 +- .../regbankselect-amdgcn.ds.gws.sema.v.mir | 12 +- .../regbankselect-amdgcn.ds.ordered.add.mir | 40 +- .../regbankselect-amdgcn.ds.ordered.swap.mir | 40 +- .../GlobalISel/regbankselect-amdgcn.ds.permute.mir | 11 +- .../GlobalISel/regbankselect-amdgcn.ds.swizzle.mir | 7 +- .../GlobalISel/regbankselect-amdgcn.else.32.mir | 6 +- .../GlobalISel/regbankselect-amdgcn.else.64.mir | 6 +- .../GlobalISel/regbankselect-amdgcn.fcmp.mir | 40 +- .../regbankselect-amdgcn.fmul.legacy.mir | 40 +- .../GlobalISel/regbankselect-amdgcn.icmp.mir | 40 +- .../GlobalISel/regbankselect-amdgcn.interp.mov.mir | 16 +- .../regbankselect-amdgcn.interp.p1.f16.mir | 20 +- .../GlobalISel/regbankselect-amdgcn.interp.p1.mir | 36 +- .../regbankselect-amdgcn.interp.p2.f16.mir | 28 +- .../GlobalISel/regbankselect-amdgcn.interp.p2.mir | 28 +- .../GlobalISel/regbankselect-amdgcn.kill.mir | 32 +- .../regbankselect-amdgcn.lds.direct.load.mir | 12 +- .../regbankselect-amdgcn.lds.param.load.mir | 12 +- .../GlobalISel/regbankselect-amdgcn.live.mask.mir | 2 +- .../GlobalISel/regbankselect-amdgcn.mfma.mir | 560 +-- .../GlobalISel/regbankselect-amdgcn.ps.live.mir | 2 +- .../regbankselect-amdgcn.readfirstlane.mir | 14 +- .../GlobalISel/regbankselect-amdgcn.readlane.mir | 92 +- .../GlobalISel/regbankselect-amdgcn.s.sendmsg.mir | 14 +- .../regbankselect-amdgcn.s.sendmsghalt.mir | 14 +- .../GlobalISel/regbankselect-amdgcn.wqm.demote.mir | 32 +- .../AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.mir | 14 +- .../GlobalISel/regbankselect-amdgcn.wqm.vote.mir | 34 +- .../GlobalISel/regbankselect-amdgcn.writelane.mir | 60 +- .../AMDGPU/GlobalISel/regbankselect-amdgcn.wwm.mir | 14 +- .../GlobalISel/regbankselect-amdgpu-ffbh-u32.mir | 12 +- .../GlobalISel/regbankselect-amdgpu-ffbl-b32.mir | 12 +- .../AMDGPU/GlobalISel/regbankselect-and-s1.mir | 188 +- .../AMDGPU/GlobalISel/regbankselect-and.mir | 448 ++- .../AMDGPU/GlobalISel/regbankselect-anyext.mir | 152 +- .../AMDGPU/GlobalISel/regbankselect-ashr.mir | 174 +- .../GlobalISel/regbankselect-atomic-cmpxchg.mir | 48 +- .../GlobalISel/regbankselect-atomicrmw-add.mir | 36 +- .../GlobalISel/regbankselect-atomicrmw-and.mir | 36 +- .../GlobalISel/regbankselect-atomicrmw-fadd.mir | 12 +- .../GlobalISel/regbankselect-atomicrmw-max.mir | 36 +- .../GlobalISel/regbankselect-atomicrmw-min.mir | 36 +- .../GlobalISel/regbankselect-atomicrmw-or.mir | 36 +- .../GlobalISel/regbankselect-atomicrmw-sub.mir | 36 +- .../GlobalISel/regbankselect-atomicrmw-umax.mir | 36 +- .../GlobalISel/regbankselect-atomicrmw-umin.mir | 36 +- .../GlobalISel/regbankselect-atomicrmw-xchg.mir | 36 +- .../GlobalISel/regbankselect-atomicrmw-xor.mir | 36 +- .../AMDGPU/GlobalISel/regbankselect-bitcast.mir | 12 +- .../AMDGPU/GlobalISel/regbankselect-bitreverse.mir | 30 +- .../AMDGPU/GlobalISel/regbankselect-block-addr.mir | 2 +- .../AMDGPU/GlobalISel/regbankselect-brcond.mir | 129 +- .../AMDGPU/GlobalISel/regbankselect-bswap.mir | 14 +- .../regbankselect-build-vector-trunc.mir | 62 +- .../regbankselect-build-vector-trunc.v2s16.mir | 62 +- .../GlobalISel/regbankselect-build-vector.mir | 175 +- .../GlobalISel/regbankselect-concat-vector.mir | 98 +- .../AMDGPU/GlobalISel/regbankselect-constant.mir | 12 +- .../AMDGPU/GlobalISel/regbankselect-copy.mir | 82 +- .../GlobalISel/regbankselect-ctlz-zero-undef.mir | 42 +- .../AMDGPU/GlobalISel/regbankselect-ctpop.mir | 38 +- .../GlobalISel/regbankselect-cttz-zero-undef.mir | 42 +- .../AMDGPU/GlobalISel/regbankselect-default.mir | 2 +- .../GlobalISel/regbankselect-dyn-stackalloc.mir | 360 +- .../regbankselect-extract-vector-elt.mir | 1948 +++++----- .../AMDGPU/GlobalISel/regbankselect-extract.mir | 32 +- .../AMDGPU/GlobalISel/regbankselect-fabs.mir | 16 +- .../AMDGPU/GlobalISel/regbankselect-fadd.mir | 40 +- .../GlobalISel/regbankselect-fcanonicalize.mir | 18 +- .../AMDGPU/GlobalISel/regbankselect-fceil.mir | 14 +- .../AMDGPU/GlobalISel/regbankselect-fcmp.mir | 36 +- .../AMDGPU/GlobalISel/regbankselect-fexp2.mir | 14 +- .../AMDGPU/GlobalISel/regbankselect-flog2.mir | 14 +- .../AMDGPU/GlobalISel/regbankselect-fma.mir | 104 +- .../AMDGPU/GlobalISel/regbankselect-fmul.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-fneg.mir | 16 +- .../AMDGPU/GlobalISel/regbankselect-fpext.mir | 14 +- .../AMDGPU/GlobalISel/regbankselect-fptosi.mir | 14 +- .../AMDGPU/GlobalISel/regbankselect-fptoui.mir | 14 +- .../AMDGPU/GlobalISel/regbankselect-fptrunc.mir | 14 +- .../AMDGPU/GlobalISel/regbankselect-freeze.mir | 280 +- .../AMDGPU/GlobalISel/regbankselect-frint.mir | 14 +- .../AMDGPU/GlobalISel/regbankselect-fshr.mir | 104 +- .../AMDGPU/GlobalISel/regbankselect-fsqrt.mir | 18 +- .../AMDGPU/GlobalISel/regbankselect-fsub.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-icmp.mir | 364 +- .../AMDGPU/GlobalISel/regbankselect-icmp.s16.mir | 56 +- .../GlobalISel/regbankselect-insert-vector-elt.mir | 938 ++--- .../AMDGPU/GlobalISel/regbankselect-insert.mir | 96 +- .../GlobalISel/regbankselect-intrinsic-trunc.mir | 14 +- .../AMDGPU/GlobalISel/regbankselect-inttoptr.mir | 12 +- .../AMDGPU/GlobalISel/regbankselect-load.mir | 152 +- .../AMDGPU/GlobalISel/regbankselect-lshr.mir | 178 +- .../AMDGPU/GlobalISel/regbankselect-mad_64_32.mir | 104 +- .../GlobalISel/regbankselect-merge-values.mir | 62 +- .../AMDGPU/GlobalISel/regbankselect-mul.mir | 36 +- .../CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir | 576 +-- .../AMDGPU/GlobalISel/regbankselect-phi-s1.mir | 2036 +++++----- .../AMDGPU/GlobalISel/regbankselect-phi.mir | 3328 +++++++++-------- .../AMDGPU/GlobalISel/regbankselect-ptr-add.mir | 44 +- .../AMDGPU/GlobalISel/regbankselect-ptrmask.mir | 44 +- .../AMDGPU/GlobalISel/regbankselect-ptrtoint.mir | 12 +- .../GlobalISel/regbankselect-reg-sequence.mir | 40 +- .../AMDGPU/GlobalISel/regbankselect-sadde.mir | 176 +- .../AMDGPU/GlobalISel/regbankselect-sbfx.mir | 266 +- .../AMDGPU/GlobalISel/regbankselect-select.mir | 2016 +++++----- .../AMDGPU/GlobalISel/regbankselect-sext-inreg.mir | 138 +- .../AMDGPU/GlobalISel/regbankselect-sext.mir | 178 +- .../AMDGPU/GlobalISel/regbankselect-sextload.mir | 48 +- .../AMDGPU/GlobalISel/regbankselect-shl.mir | 170 +- .../GlobalISel/regbankselect-shuffle-vector.mir | 36 +- .../AMDGPU/GlobalISel/regbankselect-sitofp.mir | 14 +- .../AMDGPU/GlobalISel/regbankselect-smax.mir | 158 +- .../AMDGPU/GlobalISel/regbankselect-smin.mir | 162 +- .../AMDGPU/GlobalISel/regbankselect-smulh.mir | 76 +- .../regbankselect-split-scalar-load-metadata.mir | 8 +- .../AMDGPU/GlobalISel/regbankselect-ssube.mir | 176 +- .../AMDGPU/GlobalISel/regbankselect-sub.mir | 36 +- .../AMDGPU/GlobalISel/regbankselect-trunc.mir | 36 +- .../AMDGPU/GlobalISel/regbankselect-uadde.mir | 176 +- .../AMDGPU/GlobalISel/regbankselect-uaddo.mir | 38 +- .../AMDGPU/GlobalISel/regbankselect-ubfx.mir | 264 +- .../AMDGPU/GlobalISel/regbankselect-uitofp.mir | 14 +- .../AMDGPU/GlobalISel/regbankselect-umax.mir | 166 +- .../AMDGPU/GlobalISel/regbankselect-umin.mir | 166 +- .../AMDGPU/GlobalISel/regbankselect-umulh.mir | 76 +- .../regbankselect-uniform-load-noclobber.mir | 172 +- .../GlobalISel/regbankselect-unmerge-values.mir | 30 +- .../AMDGPU/GlobalISel/regbankselect-usube.mir | 176 +- .../AMDGPU/GlobalISel/regbankselect-usubo.mir | 38 +- .../regbankselect-widen-scalar-loads.mir | 558 +-- .../AMDGPU/GlobalISel/regbankselect-xor.mir | 594 +-- .../AMDGPU/GlobalISel/regbankselect-zext.mir | 172 +- .../AMDGPU/GlobalISel/regbankselect-zextload.mir | 48 +- .../CodeGen/AMDGPU/GlobalISel/regbankselect.mir | 66 +- llvm/test/CodeGen/AMDGPU/agpr-copy-propagation.mir | 32 +- llvm/test/CodeGen/AMDGPU/bundle-latency.mir | 20 +- llvm/test/CodeGen/AMDGPU/call-waw-waitcnt.mir | 29 +- llvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir | 52 +- llvm/test/CodeGen/AMDGPU/cluster_stores.ll | 119 + .../coalesce-identity-copies-undef-subregs.mir | 313 +- .../CodeGen/AMDGPU/coalescer-remat-dead-use.mir | 44 +- ...alescer-removepartial-extend-undef-subrange.mir | 57 +- .../AMDGPU/coalescer-subranges-prune-kill-copy.mir | 24 +- .../coalescing-subreg-was-undef-but-became-def.mir | 22 +- .../AMDGPU/coalescing_makes_lanes_undef.mir | 32 +- llvm/test/CodeGen/AMDGPU/collapse-endcf-broken.mir | 32 +- llvm/test/CodeGen/AMDGPU/collapse-endcf2.mir | 98 +- llvm/test/CodeGen/AMDGPU/commute-vop3.mir | 46 +- .../test/CodeGen/AMDGPU/copy-overlap-vgpr-kill.mir | 46 +- llvm/test/CodeGen/AMDGPU/copy_phys_vgpr64.mir | 476 ++- .../CodeGen/AMDGPU/couldnt-join-subrange-3.mir | 93 +- .../CodeGen/AMDGPU/early-tailduplicator-nophis.mir | 33 +- .../AMDGPU/extend-phi-subrange-not-in-parent.mir | 64 +- .../CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll | 30 +- llvm/test/CodeGen/AMDGPU/fast-ra-kills-vcc.mir | 24 +- llvm/test/CodeGen/AMDGPU/fast-regalloc-bundles.mir | 10 +- .../AMDGPU/fastregalloc-illegal-subreg-physreg.mir | 7 +- .../AMDGPU/fastregalloc-self-loop-heuristic.mir | 138 +- llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi.mir | 18 +- llvm/test/CodeGen/AMDGPU/fold-cndmask-wave32.mir | 5 +- llvm/test/CodeGen/AMDGPU/fold-fi-mubuf.mir | 86 +- .../test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir | 70 +- .../fold-immediate-operand-shrink-with-carry.mir | 42 +- .../AMDGPU/fold-immediate-operand-shrink.mir | 325 +- .../AMDGPU/fold-operands-remove-m0-redef.mir | 197 +- llvm/test/CodeGen/AMDGPU/fold_16bit_imm.mir | 20 +- .../AMDGPU/greedy-alloc-fail-sgpr1024-spill.mir | 196 +- .../CodeGen/AMDGPU/greedy-global-heuristic.mir | 214 +- llvm/test/CodeGen/AMDGPU/gws-hazards.mir | 92 +- .../AMDGPU/hazard-recognizer-meta-insts.mir | 20 +- llvm/test/CodeGen/AMDGPU/i1-copies-rpo.mir | 38 +- .../AMDGPU/i1_copy_phi_with_phi_incoming_value.mir | 118 +- .../CodeGen/AMDGPU/indirect-addressing-term.ll | 188 +- .../CodeGen/AMDGPU/insert-skips-flat-vmem-ds.mir | 60 +- llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir | 40 +- llvm/test/CodeGen/AMDGPU/licm-regpressure.mir | 132 +- llvm/test/CodeGen/AMDGPU/loop_header_nopred.mir | 58 +- .../lower-control-flow-other-terminators.mir | 215 +- ...er-i1-copies-implicit-def-unstructured-loop.mir | 162 +- llvm/test/CodeGen/AMDGPU/lower-term-opcodes.mir | 90 +- .../AMDGPU/machine-cse-commute-target-flags.mir | 37 +- .../test/CodeGen/AMDGPU/move-load-addr-to-valu.mir | 420 ++- ...optimize-exec-copies-extra-insts-after-copy.mir | 35 +- .../AMDGPU/optimize-exec-masking-pre-ra.mir | 106 +- ...optimize-exec-masking-strip-terminator-bits.mir | 31 +- .../CodeGen/AMDGPU/partial-forwarding-hazards.mir | 310 +- .../CodeGen/AMDGPU/peephole-opt-regseq-removal.mir | 16 +- .../AMDGPU/pei-build-spill-partial-agpr.mir | 370 +- .../AMDGPU/post-ra-sched-kill-bundle-use-inst.mir | 23 +- llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir | 24 +- .../AMDGPU/regcoalesce-cannot-join-failures.mir | 62 +- ...esce-keep-valid-lanes-implicit-def-bug39602.mir | 32 +- ...oalescer-resolve-lane-conflict-by-subranges.mir | 128 +- llvm/test/CodeGen/AMDGPU/remat-sop.mir | 336 +- .../remove-short-exec-branches-gpr-idx-mode.mir | 84 +- ...ve-short-exec-branches-special-instructions.mir | 122 +- .../test/CodeGen/AMDGPU/return-with-successors.mir | 22 +- .../CodeGen/AMDGPU/s_add_co_pseudo_lowering.mir | 41 +- .../CodeGen/AMDGPU/schedule-barrier-fpmode.mir | 56 +- .../AMDGPU/scheduler-handle-move-bundle.mir | 29 +- llvm/test/CodeGen/AMDGPU/sgpr-phys-copy.mir | 302 +- .../CodeGen/AMDGPU/shrink-instructions-flags.mir | 9 +- .../CodeGen/AMDGPU/shrink-insts-scalar-bit-ops.mir | 11 +- llvm/test/CodeGen/AMDGPU/si-i1-copies.mir | 14 +- llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir | 349 +- .../CodeGen/AMDGPU/skip-branch-taildup-ret.mir | 166 +- llvm/test/CodeGen/AMDGPU/soft-clause-dbg-value.mir | 31 +- .../CodeGen/AMDGPU/spill-sgpr-csr-live-ins.mir | 7 +- llvm/test/CodeGen/AMDGPU/spill-to-agpr-partial.mir | 128 +- llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir | 430 +-- .../CodeGen/AMDGPU/splitkit-copy-live-lanes.mir | 649 ++-- .../CodeGen/AMDGPU/splitkit-nolivesubranges.mir | 25 +- llvm/test/CodeGen/AMDGPU/swdev282079.mir | 50 +- llvm/test/CodeGen/AMDGPU/tail-dup-bundle.mir | 24 +- .../AMDGPU/unallocatable-bundle-regression.mir | 159 +- .../CodeGen/AMDGPU/unexpected-reg-unit-state.mir | 15 +- .../CodeGen/AMDGPU/verify-duplicate-literal.mir | 14 +- llvm/test/CodeGen/AMDGPU/vgpr-remat.mir | 32 +- llvm/test/CodeGen/AMDGPU/vgpr-spill.mir | 39 +- .../AMDGPU/virtregrewrite-undef-identity-copy.mir | 32 +- .../CodeGen/AMDGPU/waitcnt-meta-instructions.mir | 32 +- llvm/test/CodeGen/AMDGPU/waitcnt-overflow.mir | 24 +- .../CodeGen/AMDGPU/waitcnt-preexisting-vscnt.mir | 104 +- llvm/test/CodeGen/AMDGPU/waitcnt-preexisting.mir | 149 +- llvm/test/CodeGen/AMDGPU/waitcnt-vmem-waw.mir | 30 +- llvm/test/CodeGen/ARM/fast-isel-call.ll | 11 +- llvm/test/CodeGen/ARM/frame-chain-reserved-fp.ll | 25 + llvm/test/CodeGen/ARM/frame-chain.ll | 223 ++ .../CodeGen/MIR/AMDGPU/empty-custom-regmask.mir | 18 + llvm/test/CodeGen/RISCV/mem.ll | 35 + llvm/test/CodeGen/RISCV/mem64.ll | 35 + llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll | 126 +- .../RISCV/rvv/fixed-vectors-extract-subvector.ll | 86 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 82 +- llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll | 114 +- llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll | 20 +- llvm/test/CodeGen/RISCV/rvv/vpload.ll | 8 +- .../test/CodeGen/RISCV/select-optimize-multiple.ll | 76 + .../CodeGen/SPARC/LeonSMACUMACInstructionUT.ll | 4 +- llvm/test/CodeGen/SPARC/inlineasm-v9.ll | 4 +- llvm/test/CodeGen/SPARC/inlineasm.ll | 34 +- llvm/test/CodeGen/SPARC/leafproc.ll | 22 + .../CodeGen/SystemZ/stackmap-dynamic-alloca.ll | 30 + llvm/test/CodeGen/Thumb/frame-access.ll | 206 +- llvm/test/CodeGen/Thumb/frame-chain-reserved-fp.ll | 27 + llvm/test/CodeGen/Thumb/frame-chain.ll | 274 ++ .../X86/dwarf-aranges-available-externally.ll | 71 + llvm/test/CodeGen/X86/dwarf-aranges-zero-size.ll | 39 + llvm/test/CodeGen/X86/func-sanitizer.ll | 18 + llvm/test/CodeGen/X86/stackmap-dynamic-alloca.ll | 30 + llvm/test/CodeGen/X86/vselect-avx.ll | 63 + .../DebugInfo/symbolize-filter-markup-color.test | 33 + .../symbolize-filter-markup-error-location.test | 17 + .../DebugInfo/symbolize-filter-markup-symbol.test | 10 + .../DebugInfo/symbolize-filter-markup-tag.test | 10 + .../AddressSanitizer/global_metadata.ll | 11 +- .../AddressSanitizer/global_metadata_array.ll | 10 - .../AddressSanitizer/global_with_comdat.ll | 9 - .../AddressSanitizer/instrument_global.ll | 6 +- .../instrument_initializer_metadata.ll | 11 +- .../AddressSanitizer/win-string-literal.ll | 11 +- .../SanitizerCoverage/tracing-comdat.ll | 2 +- llvm/test/Transforms/Coroutines/coro-split-00.ll | 12 +- llvm/test/Transforms/GlobalOpt/ctor-memset.ll | 55 +- llvm/test/Transforms/IndVarSimplify/pr56242.ll | 49 + .../AArch64/sve-intrinsic-opts-cmpne.ll | 62 +- .../InstCombine/canonicalize-vector-extract.ll | 36 +- .../InstCombine/canonicalize-vector-insert.ll | 34 +- .../test/Transforms/InstSimplify/extract-vector.ll | 18 +- llvm/test/Transforms/InstSimplify/insert-vector.ll | 26 +- .../AArch64/sve-interleaved-accesses.ll | 132 +- llvm/test/Transforms/LICM/lnicm.ll | 234 +- .../LoopInterchange/call-instructions.ll | 3 +- .../LoopInterchange/currentLimitation.ll | 7 +- llvm/test/Transforms/LoopInterchange/debuginfo.ll | 3 +- .../inner-indvar-depend-on-outer-indvar.ll | 2 +- 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