This is an automated email from the git hooks/post-receive script.

unknown user pushed a change to branch master in repository llvm.

from d8ebe2971a8 AMDGPU: Set hasSideEffects 0 on _term instructions new 5a21fcdefdf [AArch64] Prefer "mov" over "orr" to materialize constants. new 84bcf68f02e AMDGPU: Make collapse-endcf test more useful new 70b19478024 AMDGPU: Remove unnecessary check for isFullCopy

The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: lib/Target/AArch64/AArch64ExpandImm.cpp | 7 +- lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 2 +- test/CodeGen/AArch64/arm64-aapcs.ll | 2 +- test/CodeGen/AArch64/arm64-abi.ll | 2 +- test/CodeGen/AArch64/arm64-abi_align.ll | 6 +- test/CodeGen/AArch64/arm64-addrmode.ll | 6 +- test/CodeGen/AArch64/arm64-build-vector.ll | 2 +- test/CodeGen/AArch64/arm64-ccmp.ll | 4 +- test/CodeGen/AArch64/arm64-coalescing-MOVi32imm.ll | 4 +- test/CodeGen/AArch64/arm64-csel.ll | 24 +++---- test/CodeGen/AArch64/arm64-fast-isel-call.ll | 8 +-- test/CodeGen/AArch64/arm64-fast-isel-fcmp.ll | 2 +- test/CodeGen/AArch64/arm64-fast-isel.ll | 4 +- test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll | 20 +++--- test/CodeGen/AArch64/arm64-inline-asm.ll | 2 +- test/CodeGen/AArch64/arm64-memcpy-inline.ll | 2 +- .../AArch64/arm64-misaligned-memcpy-inline.ll | 2 +- test/CodeGen/AArch64/arm64-movi.ll | 6 +- .../AArch64/arm64-neon-compare-instructions.ll | 6 +- .../AArch64/arm64-patchpoint-webkit_jscc.ll | 28 ++++---- test/CodeGen/AArch64/atomic-ops-lse.ll | 16 ++--- test/CodeGen/AArch64/branch-relax-asm.ll | 2 +- test/CodeGen/AArch64/branch-relax-bcc.ll | 2 +- test/CodeGen/AArch64/bswap-known-bits.ll | 8 +-- test/CodeGen/AArch64/cmpxchg-idioms.ll | 10 +-- test/CodeGen/AArch64/cond-sel-value-prop.ll | 12 ++-- test/CodeGen/AArch64/cond-sel.ll | 2 +- test/CodeGen/AArch64/dag-combine-invaraints.ll | 4 +- test/CodeGen/AArch64/extract-bits.ll | 46 ++++++------- test/CodeGen/AArch64/extract-lowbits.ll | 36 +++++----- test/CodeGen/AArch64/fabs.ll | 4 +- test/CodeGen/AArch64/fast-isel-addressing-modes.ll | 8 +-- test/CodeGen/AArch64/fast-isel-gep.ll | 4 +- test/CodeGen/AArch64/fold-global-offsets.ll | 2 +- test/CodeGen/AArch64/funnel-shift.ll | 14 ++-- test/CodeGen/AArch64/i128-align.ll | 4 +- test/CodeGen/AArch64/isinf.ll | 4 +- test/CodeGen/AArch64/known-never-nan.ll | 2 +- test/CodeGen/AArch64/ldst-paired-aliasing.ll | 2 +- test/CodeGen/AArch64/machine-outliner-tail.ll | 8 +-- test/CodeGen/AArch64/machine-outliner-thunk.ll | 16 ++--- test/CodeGen/AArch64/machine-outliner.ll | 10 +-- .../AArch64/machine_cse_impdef_killflags.ll | 6 +- test/CodeGen/AArch64/madd-combiner.ll | 2 +- test/CodeGen/AArch64/movw-consts.ll | 24 +++---- test/CodeGen/AArch64/neon-compare-instructions.ll | 6 +- test/CodeGen/AArch64/optimize-imm.ll | 2 +- .../AArch64/redundant-copy-elim-empty-mbb.ll | 2 +- test/CodeGen/AArch64/sadd_sat.ll | 6 +- test/CodeGen/AArch64/sadd_sat_vec.ll | 8 +-- test/CodeGen/AArch64/sdivpow2.ll | 2 +- test/CodeGen/AArch64/seh-finally.ll | 8 +-- test/CodeGen/AArch64/selectcc-to-shiftand.ll | 2 +- test/CodeGen/AArch64/signed-truncation-check.ll | 2 +- test/CodeGen/AArch64/ssub_sat.ll | 6 +- test/CodeGen/AArch64/ssub_sat_vec.ll | 8 +-- test/CodeGen/AArch64/swifterror.ll | 76 +++++++++++----------- test/CodeGen/AArch64/tst-br.ll | 4 +- test/CodeGen/AArch64/urem-seteq.ll | 4 +- test/CodeGen/AArch64/vec_cttz.ll | 4 +- .../CodeGen/AArch64/vecreduce-fmax-legalization.ll | 2 +- test/CodeGen/AArch64/wineh-try-catch-cbz.ll | 2 +- test/CodeGen/AArch64/wineh-try-catch.ll | 4 +- test/CodeGen/AMDGPU/collapse-endcf.ll | 26 ++++++-- 64 files changed, 288 insertions(+), 273 deletions(-)