[gcc] branch master updated (a15bdc66d2a -> 0a44e22df9a) - Tcwg-commits

29 Aug 2025


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unknown user pushed a change to branch master
in repository gcc.
from  a15bdc66d2a Daily bump.
       new  50064b2898e Fix _Decimal128 arithmetic error under FE_UPWARD.
       new  44054e62064 RISC-V: Combine vec_duplicate + vnmsac.vv to vnmsac.vx on G [...]
       new  52d5fc64a4f RISC-V: Add test for vec_duplicate + vnmsac.vv signed combi [...]
       new  0a44e22df9a RISC-V: Add test for vec_duplicate + vnmsac.vv unsigned com [...]
The 4 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
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Summary of changes:
 gcc/config/riscv/autovec-opt.md                    |  22 +
 gcc/config/riscv/vector.md                         |  96 ++++
 gcc/testsuite/gcc.target/i386/pr120691.c           |  18 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c   |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c   |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c   |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c   |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c   |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c   |   1 +
 .../riscv/rvv/autovec/vx_vf/vx_ternary.h           |   2 +
 .../riscv/rvv/autovec/vx_vf/vx_ternary_data.h      | 368 ++++++++++++++
 ...{vx_vmacc-run-1-i16.c => vx_vnmsac-run-1-i16.c} |   4 +-
 ...{vx_vmacc-run-1-i32.c => vx_vnmsac-run-1-i32.c} |   4 +-
 ...{vx_vmacc-run-1-i64.c => vx_vnmsac-run-1-i64.c} |   4 +-
 .../{vx_vmacc-run-1-i8.c => vx_vnmsac-run-1-i8.c}  |   4 +-
 ...{vx_vmacc-run-1-u16.c => vx_vnmsac-run-1-u16.c} |   4 +-
 ...{vx_vmacc-run-1-u32.c => vx_vnmsac-run-1-u32.c} |   4 +-
 ...{vx_vmacc-run-1-u64.c => vx_vnmsac-run-1-u64.c} |   4 +-
 .../{vx_vmacc-run-1-u8.c => vx_vnmsac-run-1-u8.c}  |   4 +-
 libgcc/config/libbid/bid128_div.c                  | 135 +++++-
 libgcc/config/libbid/bid128_rem.c                  |  34 ++
 libgcc/config/libbid/bid128_sqrt.c                 |  43 +-
 libgcc/config/libbid/bid64_div.c                   | 530 +++++++++++++--------
 libgcc/config/libbid/bid64_sqrt.c                  |  41 +-
 42 files changed, 1114 insertions(+), 231 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr120691.c
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmacc-run-1-i16.c => vx_ [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmacc-run-1-i32.c => vx_ [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmacc-run-1-i64.c => vx_ [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmacc-run-1-i8.c => vx_v [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmacc-run-1-u16.c => vx_ [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmacc-run-1-u32.c => vx_ [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmacc-run-1-u64.c => vx_ [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmacc-run-1-u8.c => vx_v [...]
 mode change 100644 => 100755 libgcc/config/libbid/bid128_div.c
 mode change 100644 => 100755 libgcc/config/libbid/bid128_rem.c
 mode change 100644 => 100755 libgcc/config/libbid/bid128_sqrt.c
 mode change 100644 => 100755 libgcc/config/libbid/bid64_div.c
 mode change 100644 => 100755 libgcc/config/libbid/bid64_sqrt.c
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