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from 5ccdfd0870b [Patch 6/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins new 3d18a528bfd RISC-V: Support RVV VFNCVT.X.F.W rounding mode intrinsic API new 72fc7e9d6ae RISC-V: Support RVV VFNCVT.XU.F.W rounding mode intrinsic API new 20e1db413ee RISC-V: Support RVV VFNCVT.F.{X|XU|F}.W rounding mode intri [...] new 3d903a26d7b RISC-V: Support RVV VFREDUSUM.VS rounding mode intrinsic API new 3a68ef2cccb RISC-V: Support RVV VFREDOSUM.VS rounding mode intrinsic API new c6259c4975e RISC-V: Support RVV VFWREDOSUM.VS rounding mode intrinsic API

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Summary of changes: gcc/config/riscv/riscv-vector-builtins-bases.cc | 41 ++++++++++-- gcc/config/riscv/riscv-vector-builtins-bases.h | 6 ++ .../riscv/riscv-vector-builtins-functions.def | 11 +++ gcc/config/riscv/riscv-vector-builtins-shapes.cc | 78 ++++++++++++++++++++++ gcc/config/riscv/riscv-vector-builtins-shapes.h | 2 + .../gcc.target/riscv/rvv/base/float-point-ncvt-f.c | 69 +++++++++++++++++++ .../gcc.target/riscv/rvv/base/float-point-ncvt-x.c | 29 ++++++++ .../riscv/rvv/base/float-point-ncvt-xu.c | 29 ++++++++ .../riscv/rvv/base/float-point-redosum.c | 33 +++++++++ .../riscv/rvv/base/float-point-redusum.c | 33 +++++++++ .../riscv/rvv/base/float-point-wredosum.c | 33 +++++++++ 11 files changed, 360 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/float-point-ncvt-f.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/float-point-ncvt-x.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/float-point-ncvt-xu.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/float-point-redosum.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/float-point-redusum.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/float-point-wredosum.c