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from 7fd3d3499a0 [llvm-exegesis] Pull out LLVMTargetMachine to simplify debu [...] new 2acef23b4c3 [IRCE] Only check for NSW on equality predicates new 793b714ddcf [AMDGPU] Fix issues for backend divergence tracking

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Summary of changes: lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 1 + lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 13 +++++-- .../Scalar/InductiveRangeCheckElimination.cpp | 43 +++++++--------------- test/CodeGen/AMDGPU/diverge-extra-formal-args.ll | 30 +++++++++++++++ test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll | 34 +++++++++++++++++ test/Transforms/IRCE/stride_more_than_1.ll | 24 +++++++++--- 6 files changed, 106 insertions(+), 39 deletions(-) create mode 100644 test/CodeGen/AMDGPU/diverge-extra-formal-args.ll create mode 100644 test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll