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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig in repository toolchain/ci/llvm-project.

from 24ee9c84962 Don't mark MIPS TRAP as isTerminator adds 1544cf2d7ce [mlir] Fix errors in release & no-assert adds 70c98671fa7 [clang-format] Add option for not breaking line before ObjC params adds c03349e40f2 [Sema] Remove a -Wrange warning from -Wall adds 943b5561d6a [LegalizeTypes][X86] Add a new strategy for type legalizing [...] adds 234f3b16918 Add ThinLtoJIT example adds d975910c50f [X86] Don't exit from foldOffsetIntoAddress if the Offset i [...] adds a57dd66d5e1 [X86] In X86FastEmitSSESelect, fall back to SelectionDAG if [...] adds 268e57bd35d [clang][driver] Remove an unused parameter. NFC. adds ba8110161df AMDGPU/GFX10: Fix NSA reassign pass when operands are undef adds d82e993cd34 [ADT] 'PointerUnion::is' returns 'bool' adds 5932f7b8f2c [PatchableFunction] Use an empty DebugLoc adds c4b4c0c47c9 [mlir] Expand shape functions in ShapeInference doc adds ecd2aaee064 [DebugInfo] Merge DebugInfoFinder::{processDeclare,processV [...] adds ba3a1774a90 [Transforms] Simplify with make_early_inc_range adds d50e188a072 Revert "[ARM][MVE] VPT Blocks: findVCMPToFoldIntoVPS" adds 4dba14cf37a [NFC] Refactor TableGen for attributes adds 2ff5602cb52 [WIP] Build assume from call adds ff1b9add2ff [NFC] Factor out function to detect if an attribute has an [...] adds d431c5d9af2 Revert "[NFC] Factor out function to detect if an attribute [...] adds d591bdce6d6 [clang-tidy] Fixed crash 44745 in readability-else-after-return adds 0adda3df924 Revert "[WIP] Build assume from call" adds 89d3b070c1e Revert "[NFC] Refactor TableGen for attributes" adds cfe87a4a16b [NFC] Refactor TableGen for attributes adds a9ab01a330f Remove superfluous space from -Wrange-loop-construct message

No new revisions were added by this update.

Summary of changes: .../readability/ElseAfterReturnCheck.cpp | 4 + .../checkers/readability-else-after-return.cpp | 13 + clang/docs/ClangFormatStyleOptions.rst | 23 + clang/docs/ReleaseNotes.rst | 5 +- clang/include/clang/Basic/DiagnosticGroups.td | 8 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 8 +- clang/include/clang/Format/Format.h | 25 + clang/lib/Driver/ToolChains/Clang.cpp | 17 +- clang/lib/Format/ContinuationIndenter.cpp | 9 +- clang/lib/Format/Format.cpp | 3 + clang/test/Misc/warning-wall.c | 5 +- clang/test/SemaCXX/warn-range-loop-analysis.cpp | 2 +- clang/unittests/Format/FormatTestObjC.cpp | 31 + llvm/examples/CMakeLists.txt | 1 + llvm/examples/ThinLtoJIT/CMakeLists.txt | 18 + .../examples/ThinLtoJIT/ThinLtoDiscoveryThread.cpp | 65 + llvm/examples/ThinLtoJIT/ThinLtoDiscoveryThread.h | 57 + .../ThinLtoJIT/ThinLtoInstrumentationLayer.cpp | 225 +++ .../ThinLtoJIT/ThinLtoInstrumentationLayer.h | 77 + llvm/examples/ThinLtoJIT/ThinLtoJIT.cpp | 333 ++++ llvm/examples/ThinLtoJIT/ThinLtoJIT.h | 111 ++ llvm/examples/ThinLtoJIT/ThinLtoModuleIndex.cpp | 268 +++ llvm/examples/ThinLtoJIT/ThinLtoModuleIndex.h | 94 + llvm/examples/ThinLtoJIT/bench | 100 + llvm/examples/ThinLtoJIT/main.cpp | 83 + llvm/include/llvm/ADT/PointerUnion.h | 2 +- llvm/include/llvm/CodeGen/TargetLowering.h | 9 +- llvm/include/llvm/IR/Attributes.h | 3 +- llvm/include/llvm/IR/DebugInfo.h | 9 +- llvm/lib/CodeGen/PatchableFunction.cpp | 11 +- .../CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 395 ++++ .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 15 + llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp | 22 + llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 42 + .../CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | 1 + .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 2 + .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 11 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 17 +- llvm/lib/IR/Attributes.cpp | 43 +- llvm/lib/IR/AttributesCompatFunc.td | 1 - llvm/lib/IR/CMakeLists.txt | 4 - llvm/lib/IR/Core.cpp | 10 +- llvm/lib/IR/DebugInfo.cpp | 27 +- llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 11 +- llvm/lib/Target/ARM/MVEVPTBlockPass.cpp | 72 +- llvm/lib/Target/X86/X86FastISel.cpp | 2 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 37 +- llvm/lib/Target/X86/X86ISelLowering.h | 2 + llvm/lib/Transforms/Scalar/EarlyCSE.cpp | 147 +- llvm/lib/Transforms/Scalar/LowerAtomic.cpp | 13 +- .../Transforms/Scalar/MergedLoadStoreMotion.cpp | 10 +- .../AArch64/patchable-function-entry-empty.mir | 31 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll | 43 + llvm/test/CodeGen/ARM/O3-pipeline.ll | 1 - .../CodeGen/Thumb2/mve-vpt-2-blocks-1-pred.mir | 6 +- llvm/test/CodeGen/Thumb2/mve-vpt-block-optnone.mir | 5 +- llvm/test/CodeGen/X86/atomic-non-integer.ll | 186 +- llvm/test/CodeGen/X86/avx512-insert-extract.ll | 104 +- llvm/test/CodeGen/X86/avx512-masked_memop-16-8.ll | 366 ++-- llvm/test/CodeGen/X86/avx512-vec-cmp.ll | 66 +- llvm/test/CodeGen/X86/fmf-flags.ll | 13 +- llvm/test/CodeGen/X86/half.ll | 311 +-- llvm/test/CodeGen/X86/mxcsr-reg-usage.ll | 1 - llvm/test/CodeGen/X86/pr31088.ll | 210 +- llvm/test/CodeGen/X86/pr38533.ll | 40 +- llvm/test/CodeGen/X86/pr44749.ll | 56 + llvm/test/CodeGen/X86/shuffle-extract-subvector.ll | 32 +- llvm/test/CodeGen/X86/vec_fp_to_int.ll | 58 +- llvm/test/CodeGen/X86/vector-half-conversions.ll | 2008 ++++++++++---------- llvm/utils/TableGen/Attributes.cpp | 112 +- mlir/docs/ShapeInference.md | 223 +++ mlir/lib/Transforms/DialectConversion.cpp | 77 +- 72 files changed, 4328 insertions(+), 2124 deletions(-) create mode 100644 llvm/examples/ThinLtoJIT/CMakeLists.txt create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoDiscoveryThread.cpp create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoDiscoveryThread.h create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoInstrumentationLayer.cpp create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoInstrumentationLayer.h create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoJIT.cpp create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoJIT.h create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoModuleIndex.cpp create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoModuleIndex.h create mode 100755 llvm/examples/ThinLtoJIT/bench create mode 100644 llvm/examples/ThinLtoJIT/main.cpp delete mode 100644 llvm/lib/IR/AttributesCompatFunc.td create mode 100644 llvm/test/CodeGen/X86/pr44749.ll