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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig in repository toolchain/ci/llvm-project.

from 4dbb3f57c6f [clang] Add llvm-strip to test dependencies adds 03d249396d6 [mlir] Enhance mlir-opt show-dialects test case adds 41d06095b0d [SelectionDAG] Teach isConstOrConstSplat about ISD::SPLAT_VECTOR adds b02eab9058e [RISCV] Add scalable vector icmp ISel patterns adds e2e82c9983f [CodeGenModule] Drop dso_local on function declarations for [...] adds 9f452fbf2fe Recommit D91678 after fixing the test breakage. adds 1198478c420 [lld/mac] remove redundant null check adds 59908fc06ac [RISCV] Use uint16_t instead of unsigned for opcodes in the [...] adds 6fc7a92eeeb [RISCV] Change ConstraintMask in RISCVII enum to be shifted [...] adds b41b743d461 [test] Improve weakref & weak_import tests adds 9f2d9364b04 [CodeGen] Update transformations to use poison for shufflev [...] adds a92248600ec [mlir] NFC - Drop spurious assertion on symbols during `pro [...] adds 47991a15d19 [lld/mac] llvm style fix: no else after return adds c701f85c455 [STLExtras] Use return type from operator* of the wrapped iter. adds bdb748a0ab2 [ConstantFold] Add tests for fptoi.sat (NFC) adds 1ecae1e62ad [ConstantFold] Fold fptoi.sat intrinsics adds 9850d3b10a1 [CodeGen, DebugInfo] Use llvm::find_if (NFC) adds 1d10a1d5b1f [MemorySSA] Remove unused dominatesUse (NFC) adds e3d3dbd3393 [llvm] Ensure newlines at the end of files (NFC) adds 0aa75fb12fa [SLP] put verifyFunction call behind EXPENSIVE_CHECKS adds 3f09c77d33d [SLP] fix typo in assert

No new revisions were added by this update.

Summary of changes: clang/lib/CodeGen/CodeGenModule.cpp | 27 +- clang/test/CodeGen/attr-weak-import.c | 8 +- clang/test/CodeGen/attr-weakref.c | 7 +- clang/test/CodeGen/attr-weakref2.c | 4 +- clang/test/CodeGen/dso-local-executable.c | 4 +- lld/MachO/Driver.cpp | 2 +- lld/MachO/Writer.cpp | 6 +- llvm/include/llvm/ADT/STLExtras.h | 2 +- .../llvm/Analysis/FunctionPropertiesAnalysis.h | 2 +- .../llvm/Analysis/InlineSizeEstimatorAnalysis.h | 2 +- llvm/include/llvm/Analysis/MLInlineAdvisor.h | 2 +- llvm/include/llvm/Analysis/MemorySSA.h | 1 - llvm/include/llvm/Target/CGPassBuilderOption.h | 2 +- llvm/lib/Analysis/ConstantFolding.cpp | 17 +- llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp | 2 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 5 +- llvm/lib/Analysis/MemorySSA.cpp | 17 - llvm/lib/CodeGen/CodeGenPrepare.cpp | 9 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 2 +- llvm/lib/CodeGen/InterleavedAccessPass.cpp | 19 +- llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp | 6 +- llvm/lib/CodeGen/LiveIntervalCalc.cpp | 2 +- llvm/lib/CodeGen/MIRCanonicalizerPass.cpp | 6 +- llvm/lib/CodeGen/RegisterScavenging.cpp | 9 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 12 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 3 + llvm/lib/CodeGen/SwiftErrorValueTracking.cpp | 4 +- llvm/lib/DebugInfo/DWARF/DWARFGdbIndex.cpp | 4 +- llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp | 7 +- llvm/lib/IR/AutoUpgrade.cpp | 8 +- llvm/lib/Target/AArch64/AArch64InstrGISel.td | 2 +- llvm/lib/Target/Mips/MipsInstrInfo.cpp | 2 +- llvm/lib/Target/PowerPC/PPCCCState.cpp | 2 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 12 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 86 + llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 8 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 4 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 5 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 3 +- .../InstCombine/InstructionCombining.cpp | 4 +- .../Transforms/Utils/PromoteMemoryToRegister.cpp | 12 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 6 +- .../sve-intrinsics-int-compares-with-imm.ll | 6 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll | 3128 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll | 2981 +++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv32.ll | 8 +- .../DebugInfo/llvm-symbolizer-bbsections-test.s | 595 ++++ llvm/test/Transforms/InstSimplify/fptoi-sat.ll | 612 ++++ .../X86/interleave-load-extract-shuffle-changes.ll | 19 +- llvm/unittests/ADT/STLExtrasTest.cpp | 73 + mlir/lib/Dialect/Affine/IR/AffineOps.cpp | 12 +- mlir/test/mlir-opt/commandline.mlir | 41 +- 53 files changed, 7670 insertions(+), 160 deletions(-) create mode 100644 llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll create mode 100644 llvm/test/DebugInfo/llvm-symbolizer-bbsections-test.s create mode 100644 llvm/test/Transforms/InstSimplify/fptoi-sat.ll