This is an automated email from the git hooks/post-receive script.

tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig in repository toolchain/ci/llvm-project.

from e4c5b6d9bdd [X86][SSE] Add SimplifyDemandedVectorElts HADD/HSUB handling. adds a10f016006c [NFC] yaml2obj/yam2elf.cpp whitespace changes: dos2unix rem [...] adds 6b10fde69b8 [CostModel][X86] Add min/max reduction costs for all SSE targets adds 6f7c62d70ff [X86] Add avx512f tests for boolean reduction adds 91e697c145a [X86] Add scalar shl+lshr -> shift+mask tests (PR40758) adds 73e8b674382 Revert rL360499 and rL360464 from cfe/trunk: Reject attempt [...] adds 0303e8a3fd8 [CommandLine] Add long option flag for cl::ParseCommandLine [...] adds 3fa632a1123 [X86] Updated shift-mask test targets for D61830 adds 605a840747b [DAG] Add SimplifyDemandedBits support for BITREVERSE adds fda6bffd3bf [X86][SSE] SimplifyDemandedBits - call PEXTRB/PEXTRW Simpli [...] adds 91ab86fd29b [utils] update_test_checks.py: allow opt-8, opt-9 adds d3d6f4f65c7 Fix handling of objects under construction during constant [...] adds debad6460b6 Reject attempts to call non-static member functions on obje [...] adds ab8cde446b5 make -ftime-trace also print template arguments adds de7a30cb0a0 [clang-tidy] new check: bugprone-unhandled-self-assignment new a09e6868218 [DAGCombiner] try to move bitcast after extract_subvector new 2de619099a6 [LoopVectorizer] add tests for FP minmax; NFC new a7fc7630829 [X86][AVX] Split VZEXT_MOVL ymm/zmm if the upper elements a [...]

The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .../clang-tidy/bugprone/BugproneTidyModule.cpp | 3 + .../clang-tidy/bugprone/CMakeLists.txt | 1 + .../bugprone/UnhandledSelfAssignmentCheck.cpp | 99 +++ .../bugprone/UnhandledSelfAssignmentCheck.h | 36 ++ clang-tools-extra/docs/ReleaseNotes.rst | 7 + .../checks/bugprone-unhandled-self-assignment.rst | 116 ++++ clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../bugprone-unhandled-self-assignment.cpp | 579 ++++++++++++++++++ clang/include/clang/AST/Redeclarable.h | 7 + clang/lib/CodeGen/CodeGenModule.cpp | 9 +- clang/lib/Sema/SemaTemplateInstantiate.cpp | 6 +- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 6 +- llvm/include/llvm/Support/CommandLine.h | 3 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 24 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 10 + llvm/lib/Support/CommandLine.cpp | 60 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 19 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 96 ++- .../Analysis/CostModel/X86/reduce-smax-widen.ll | 156 ++--- llvm/test/Analysis/CostModel/X86/reduce-smax.ll | 124 ++-- .../Analysis/CostModel/X86/reduce-smin-widen.ll | 154 ++--- llvm/test/Analysis/CostModel/X86/reduce-smin.ll | 124 ++-- .../Analysis/CostModel/X86/reduce-umax-widen.ll | 156 ++--- llvm/test/Analysis/CostModel/X86/reduce-umax.ll | 124 ++-- .../Analysis/CostModel/X86/reduce-umin-widen.ll | 156 ++--- llvm/test/Analysis/CostModel/X86/reduce-umin.ll | 124 ++-- llvm/test/CodeGen/AMDGPU/bitreverse.ll | 3 +- llvm/test/CodeGen/X86/bitcast-vector-bool.ll | 73 ++- llvm/test/CodeGen/X86/combine-bitreverse.ll | 2 - llvm/test/CodeGen/X86/extractelement-fp.ll | 6 +- .../CodeGen/X86/horizontal-shuffle-demanded.ll | 22 +- llvm/test/CodeGen/X86/insertelement-zero.ll | 2 - llvm/test/CodeGen/X86/madd.ll | 43 +- llvm/test/CodeGen/X86/masked_store.ll | 82 +-- llvm/test/CodeGen/X86/oddshuffles.ll | 71 ++- llvm/test/CodeGen/X86/sad.ll | 18 +- llvm/test/CodeGen/X86/shift-mask.ll | 536 ++++++++++++++++ llvm/test/CodeGen/X86/vector-fshl-256.ll | 4 +- llvm/test/CodeGen/X86/vector-fshl-rot-256.ll | 4 +- llvm/test/CodeGen/X86/vector-fshr-256.ll | 4 +- llvm/test/CodeGen/X86/vector-fshr-rot-256.ll | 4 +- llvm/test/CodeGen/X86/vector-reduce-and-bool.ll | 532 +++++++++++++--- llvm/test/CodeGen/X86/vector-reduce-or-bool.ll | 527 +++++++++++++--- llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll | 680 +++++++++++++++++---- llvm/test/CodeGen/X86/vector-rotate-256.ll | 4 +- llvm/test/CodeGen/X86/vector-shift-ashr-256.ll | 2 +- llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll | 8 +- .../LoopVectorize/float-minmax-instruction-flag.ll | 161 +++++ .../SLPVectorizer/X86/horizontal-minmax.ll | 90 +-- llvm/tools/yaml2obj/yaml2elf.cpp | 64 +- llvm/unittests/Support/CommandLineTest.cpp | 73 +++ llvm/utils/update_test_checks.py | 3 +- 52 files changed, 4078 insertions(+), 1140 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/bugprone/UnhandledSelfAssignmentCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/bugprone/UnhandledSelfAssignmentCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/bugprone-unhandled-sel [...] create mode 100644 clang-tools-extra/test/clang-tidy/bugprone-unhandled-self-assig [...] create mode 100644 llvm/test/CodeGen/X86/shift-mask.ll create mode 100644 llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll