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from ac2df64c27b Fix tests added in r331924 so that they work on Windows. new c31146b1794 [X86] ptwrite intrinsic new 0f6b0335f94 [mips] Correct the predicates of cvt.fmt.fmt instructions new b82663119e7 [DWARF] Rework debug line parsing to use llvm::Error and callbacks new b83e520deee [InstCombine] Only propagate known leading zeros from udiv [...] new 74080eb9446 [CFLGraph] Fixed Select instruction handling new 290ef8aa416 Fix signed/unsigned comparison warning and print format new b50edb96e4a [DWARF] DWARFDebugLineTest: fix a few more signed/unsigned [...] new 1886be969a5 [DWARF] dwarfgen::LineTable::writeData(): pacify -Wcovered- [...] new f1d346e4c5d [DWARF] DwarfGenerator.h LineTable: explicitly mark DG as unused new e72f853489c [DAG] Avoid using deleted node in rebuildSetCC new 6340f7f814b [DWARF] Remove unused member and fix(?) the unit-tests on b [...] new e21fc646bed Don't redefine a bunch of defines from llvm-config.h in config.h. new d948fa6f180 [x86] add tests for maxnum/minnum intrinsics with nnan; NFC new f9bd414b6dd [x86] fix test names; NFC new 0ccb7f4a4d9 [PR37339] Fix assertion in FunctionComparator::cmpInlineAsm new 88b5ce0eea8 [DSE] Teach the pass about partial overwrite of atomic memo [...] new 2a96212ada6 [x86] fix fmaxnum/fminnum with nnan new 9d9bed7ba9d [llvm-objcopy] Add tests for help messages new 316c9702852 [mips] Accept 32-bit offsets for lh and lhu commands new 34b34574ba1 [mips] Accept 32-bit offsets for ld/sd/lld commands new ae65e14fbd5 [InstCombine] regenerate full checks; NFC new a5819b50a23 [X86] Split WriteVecALU/WriteVecLogic/WriteShuffle/WriteVar [...] new 004b1c902d2 [X86][SNB] Fix typo in PEXTRDmr instregex, was missing VPEXTRDmr. new d681e1aa7b3 [PM/LoopUnswitch] Avoid pointlessly creating an exit block set. new 70b76a172d4 [WebAssembly] Create section start symbols automatically fo [...] new 318896f049c [X86][Znver1] Remove unnecessary SchedWritePMULLD InstRW ov [...] new 8d1235ff266 [WebAsembly] Update default triple in test files to wasm32- [...] new 42400512520 [LLVM-C] Move DIBuilder Bindings For Temporary MDNodes new aaea1bf6a17 [LLVM-C] Add Accessors for Common DIType and DILocation Properties new 48ccf8506ac [CGP] Split large data structres to sink more GEPs new 8bd2392fe8e Add regression test for r331976 new 8b40a2e52b4 [X86] Convert/Merge more instregex patterns to reduce Instr [...] new 5e8c19b5ff7 [X86] Initialize HasPTWRITE member of X86Subtarget new 5dc9b6a1fdf [InstCombine] add minnum/maxnum tests (PR37404, PR37405); NFC new 55a66360d5e [InstCombine] Moving overflow computation logic from InstCo [...] new 3dc44a9d48d [DWARF] Fixing a bug in DWARF v5 string offsets tables wher [...] new 87d94cc8a79 [InstCombine] add folds for minnum(-a, -b) --> -maxnum(a, b) new 70d549800ca AMDGPU/GlobalISel: Enable TableGen'd instruction selector new 07e5114430d [LLVM-C] Consolidate llgo's DIBuilder Bindings new ce448553221 AMDGPU/GlobalISel: Implement select() for G_BITCAST s32 <-- [...] new c86ac9aca98 Revert "[InstCombine] snprintf optimizations" new fd645d3d089 [X86] Add new patterns for masked scalar load/store to matc [...] new 04cf0d7c9c3 [WebAssembly] Initial Disassembler. new ff56eb4dc5c [InstCombine] Replace an 'if' that should always be true wi [...] new fd0a9c3d8a0 [LIT] Move xunit tests tests into their own location, and a [...] new 48fd38c5734 [STLExtras] Add distance() for ranges, pred_size(), and suc [...] new f2885f72974 [SampleFDO] Don't treat warm callsite with inline instance [...] new 9470bd67fab Refactor xunit test case builder to not use as much str addition new fcfa4b82779 Support Unsupported Tests in xunit output new a88573cfc24 [InstCombine] Add tests for cases where we don't recognize [...] new 3d02bd7c77a Register NetBSD/i386 in AddressSanitizer.cpp new dcf0b3b7b3e [sanitizer-coverage] don't instrument a function if it's en [...] new fae67c2efe6 [Support] Add docs for 'openFileFor{Write,Read}' new dcb2807d870 [Coroutines] PR34897: Fix incorrect elisions new f3684c59a8a [llvm-objcopy] Update remove-section.test new e12166f8ad8 [X86] Remove and autoupgrade the avx512.mask.store.ss intrinsic. new 3e6c331c766 [llvm-strip] Add support for -remove-section new a915f005cd6 AMDGPU/GlobalISel: Implement select() for 32-bit G_FPTOUI new 4ced77c3680 [IRTests] Verify PDT instead of DT new 5b80d9d3cd3 [APFloat] Set losesInfo on no-op convert new fb6b06bda18 [X86] Added scheduler helper classes to split move/load/sto [...] new dd5223777fd [InstCombine] Unify handling of atomic memtransfer with non [...] new 8e53f98c8b6 [X86] Split WriteF/WriteVec Move/Load/Store scheduler class [...] new e0189536931 [X86][SLM] Vector stores only use the MEC port. new a884ad2442c [mips] Enable disassembly of fused (negative) multiply add/ [...] new d40f63039be Remove unused SyncExecutor and make it clearer that the who [...] new b75b6479e7f [Reassociate] Prevent infinite loops when processing PHIs. new a345b842f8b Use iteration instead of recursion in CFIInserter new 74d22cb9f51 [mips] Rename Filler to MipsDelaySlotFiller and initialize [...] new 14a7c1a0624 [AArch64] Fix performPostLD1Combine to check for constant l [...] new a1da9452e7e [X86][MMX] Tag MMX Move/Load/Store as WriteVec schedule classes new d2bdcd6f8ae [Analysis] Validate the return type of s(n)printf like libcalls new 0d102410ca8 [RISCV] Support .option rvc and norvc assembler directives new 8ab14800c3f [X86][BtVer2] Model ymm move as double pumped instructions new 5905ca8b1ef [InstCombine] snprintf optimizations new d92ec5fa040 make add_llvm_fuzzer calls slightly more consisten with oth [...] new 29909981224 [LIT] replace output escapes wit a cdata block new f6585e9bd31 [DAGCombiner] Factor out duplicated logic for an extload co [...] new bdb4eca65ea [DAGCombiner] Set the right SDLoc on a newly-created sextlo [...] new c230f0300b2 [DAGCombiner] Set the right SDLoc on extended SETCC uses (7/N) new 4343791f3ea Move standard library inclusions to after internal inclusions. new e65f74fb3ee [InstCombine] Handle atomic memset in the same way as regul [...] new c4c7b41b7ca [DAG] reduce code duplication; NFCI new 3d133176355 [AMDGPU] Fix compilation failure when IR contains comdat new 9d11c652b08 [Split GEP] handle trunc() in separate-const-offset-from-gep pass. new c36d516fd6b [X86] Remove and autoupgrade a bunch of FMA instrinsics tha [...] new 52d265c4ad0 AMDGPU/SI: Don't promote alloca to vector for AddrSpaceCast [...] new b7c28298e2d Overhaul unicode handling in xunit output new 1dd3afa36a6 [DAG] clean up flag propagation for binops; NFCI new a09145e6dda [CodeExtractor] Allow extracting blocks with exception handling new 8e3c0384fdf [MemorySSA] getIncomingValueForBlock should return a MemoryAccess. new 6269b4f3a65 AMDGPU/GlobalISel: Implement select() for >32-bit G_STORE new 8d4503a87fc [DAG] add convenience function to propagate FMF; NFC new 9a50c9b3df7 Add the message attribute to skipped new 7e911dad6c8 Requirements can have & in them! new cf1a1cbbf12 [AMDGPU] Fix amdgpu-waves-per-eu accounting in scheduler new 105e762f2a6 [IDF] Enforce the returned blocks to be sorted. new 0daa661eb92 Reapply "[PR16756] Use SSAUpdaterBulk in JumpThreading." new 57cc768ae7a [X86] Remove some unused masked conversion intrinsics that [...] new d96a720ead4 [mips] Initialize the long branch pass for testing purposes new 974a7014d8b [X86] Add WriteFCMOV scheduler class for x87 CMOVs new db69401678c llc: don't call llvm_shutdown twice new c1d2340df22 [NFC] Remove inaccurate comment new d9314d95a57 Clear converters map after X86 Domain Reassignment to avoid [...] new a9453146341 [x86] Remove a comment obviated by r330269. Should have del [...] new fbe091db86b [X86] Remove and autoupgrade cvtsi2ss/cvtsi2sd intrinsics t [...] new 3d518c82963 [X86] Remove an autoupgrade legacy cvtss2sd intrinsics. new e44514734fd [X86] Remove some unused CHECK lines from tests. new 44156e3f614 [X86] Add some load folding patterns for cvtsi2ss/sd into i [...] new d8ca4dd7115 [NFC] MIR-Canon: switching to a stable string sorting of in [...] new 0ff8dbe4d6c Fixing build bot error: adding const qualifiers to std::sor [...] new f3c5d2fc2e1 AMDGPU: Make undef legal for v2i16/v2f16 new 0d44e5b362f AMDGPU: Rename OpenCL lowering pass to be R600 specific. new 094f39bdd5b Follow-up to rL332176 by adding a test case for PR37264. new e6d357b0ce9 [X86] Remove and autoupgrade masked vpermd/vpermps intrinsics. new 03e25daf22f [X86] Add missing test for the InstCombines of pclmulqdq. new 4105bd514aa [X86] Extend instcombine folds for pclmuldq intrinsics to t [...] new dc05051a07a [X86] Add fast-isel test cases for _mm_cvtu32_sd, _mm_cvtu6 [...] new 4aa6763ade3 [X86] Add patterns for combining movss+uint_to_fp into the [...] new d4541505a59 [X86] Remove and autoupgrade the cvtusi2sd intrinsic. Use u [...] new 3d2aa2d1309 [X86] Cleanup a multiclass that doesn't need as many parame [...] new 711dd879a41 [X86] Add fast isel test cases for the clang output for 512 [...] new 558d7248e08 Correct compatibility with the GNU Assembler's handling of [...] new 426849be4f6 [llvm-ar] Make PositionalArgs static. new b5e7dcccf93 [LLVM-C] Add Bindings For Module Flags new bd7040f0a75 Test commit access.
The 126 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: bindings/go/llvm/DIBuilderBindings.cpp | 30 - bindings/go/llvm/DIBuilderBindings.h | 40 -- bindings/go/llvm/IRBindings.cpp | 13 - bindings/go/llvm/IRBindings.h | 5 +- bindings/go/llvm/dibuilder.go | 17 +- bindings/go/llvm/ir.go | 13 - include/llvm-c/Core.h | 109 ++++ include/llvm-c/DebugInfo.h | 115 ++++ include/llvm-c/Types.h | 5 + include/llvm/ADT/STLExtras.h | 7 + include/llvm/Analysis/MemorySSA.h | 2 +- include/llvm/Analysis/ProfileSummaryInfo.h | 6 + include/llvm/Analysis/ValueTracking.h | 15 + include/llvm/CodeGen/AsmPrinter.h | 3 + include/llvm/CodeGen/SelectionDAGNodes.h | 15 +- include/llvm/CodeGen/TargetLowering.h | 5 + include/llvm/Config/config.h.cmake | 33 -- include/llvm/DebugInfo/DWARF/DWARFContext.h | 9 +- include/llvm/DebugInfo/DWARF/DWARFDebugLine.h | 92 ++- include/llvm/DebugInfo/DWARF/DWARFUnit.h | 1 + include/llvm/IR/CFG.h | 6 + include/llvm/IR/IntrinsicsX86.td | 172 +----- include/llvm/Support/FileSystem.h | 29 + include/llvm/Transforms/Utils/CodeExtractor.h | 14 +- lib/Analysis/BranchProbabilityInfo.cpp | 3 +- lib/Analysis/CFLGraph.h | 7 +- lib/Analysis/IteratedDominanceFrontier.cpp | 16 +- lib/Analysis/LazyCallGraph.cpp | 7 +- lib/Analysis/LoopInfo.cpp | 2 +- lib/Analysis/ProfileSummaryInfo.cpp | 12 + lib/Analysis/TargetLibraryInfo.cpp | 6 +- lib/Analysis/ValueTracking.cpp | 83 +++ lib/AsmParser/LLParser.cpp | 4 +- lib/Bitcode/Writer/ValueEnumerator.cpp | 2 +- lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 5 + lib/CodeGen/AsmPrinter/DwarfFile.cpp | 4 +- lib/CodeGen/CFIInstrInserter.cpp | 41 +- lib/CodeGen/CodeGenPrepare.cpp | 265 ++++++++- lib/CodeGen/ImplicitNullChecks.cpp | 3 +- lib/CodeGen/MIRCanonicalizerPass.cpp | 10 +- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 179 +++--- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 68 +-- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 2 +- lib/DebugInfo/DWARF/DWARFContext.cpp | 112 ++-- lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 206 +++++-- lib/DebugInfo/DWARF/DWARFUnit.cpp | 9 +- lib/IR/AutoUpgrade.cpp | 157 ++++- lib/IR/Core.cpp | 104 ++++ lib/IR/DebugInfo.cpp | 70 +++ lib/IR/Value.cpp | 4 +- lib/MC/MCContext.cpp | 13 +- lib/MC/MCExpr.cpp | 22 +- lib/MC/MCObjectFileInfo.cpp | 26 +- lib/MC/MCWasmStreamer.cpp | 1 + lib/MC/WasmObjectWriter.cpp | 21 +- lib/Support/APFloat.cpp | 4 +- lib/Support/Host.cpp | 5 + lib/Support/ManagedStatic.cpp | 3 - lib/Support/Parallel.cpp | 19 +- lib/Support/Windows/Path.inc | 12 +- lib/Target/AArch64/AArch64ISelLowering.cpp | 16 +- lib/Target/AArch64/AArch64ISelLowering.h | 2 + lib/Target/AMDGPU/AMDGPU.h | 2 +- lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 2 - lib/Target/AMDGPU/AMDGPUGISel.td | 46 ++ lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 91 ++- lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 32 +- lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 1 - lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 2 +- lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 3 +- lib/Target/AMDGPU/CMakeLists.txt | 5 +- lib/Target/AMDGPU/GCNIterativeScheduler.cpp | 3 +- lib/Target/AMDGPU/GCNSchedStrategy.cpp | 7 +- ...ass.cpp => R600OpenCLImageTypeLoweringPass.cpp} | 14 +- lib/Target/AMDGPU/SIISelLowering.cpp | 3 + lib/Target/AMDGPU/SIRegisterInfo.cpp | 27 + lib/Target/AMDGPU/SIRegisterInfo.h | 3 + lib/Target/Mips/MicroMipsInstrFPU.td | 59 +- lib/Target/Mips/MicroMipsInstrInfo.td | 4 +- lib/Target/Mips/Mips.h | 3 + lib/Target/Mips/Mips64InstrInfo.td | 6 +- lib/Target/Mips/Mips64r6InstrInfo.td | 2 +- lib/Target/Mips/MipsDelaySlotFiller.cpp | 67 ++- lib/Target/Mips/MipsInstrFPU.td | 70 +-- lib/Target/Mips/MipsInstrInfo.td | 4 +- lib/Target/Mips/MipsLongBranch.cpp | 8 +- lib/Target/Mips/MipsTargetMachine.cpp | 2 + lib/Target/PowerPC/PPCLoopPreIncPrep.cpp | 3 +- lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 78 ++- lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp | 3 + lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h | 3 + .../RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp | 12 +- .../RISCV/MCTargetDesc/RISCVTargetStreamer.cpp | 14 + .../RISCV/MCTargetDesc/RISCVTargetStreamer.h | 15 + lib/Target/WebAssembly/CMakeLists.txt | 1 + .../Disassembler/WebAssemblyDisassembler.cpp | 126 ++++- .../InstPrinter/WebAssemblyInstPrinter.cpp | 14 +- lib/Target/WebAssembly/WebAssembly.td | 8 + lib/Target/WebAssembly/WebAssemblyInstrControl.td | 4 + lib/Target/X86/X86.td | 16 +- lib/Target/X86/X86DomainReassignment.cpp | 3 +- lib/Target/X86/X86FlagsCopyLowering.cpp | 5 - lib/Target/X86/X86ISelLowering.cpp | 22 +- lib/Target/X86/X86InstrAVX512.td | 416 +++++++++----- lib/Target/X86/X86InstrFPStack.td | 2 +- lib/Target/X86/X86InstrInfo.td | 1 + lib/Target/X86/X86InstrMMX.td | 12 +- lib/Target/X86/X86InstrSSE.td | 310 +++++----- lib/Target/X86/X86InstrSystem.td | 17 +- lib/Target/X86/X86InstrXOP.td | 4 +- lib/Target/X86/X86IntrinsicsInfo.h | 44 -- lib/Target/X86/X86SchedBroadwell.td | 93 ++- lib/Target/X86/X86SchedHaswell.td | 208 +++---- lib/Target/X86/X86SchedSandyBridge.td | 221 ++------ lib/Target/X86/X86SchedSkylakeClient.td | 198 +++---- lib/Target/X86/X86SchedSkylakeServer.td | 234 +++----- lib/Target/X86/X86Schedule.td | 85 ++- lib/Target/X86/X86ScheduleAtom.td | 43 +- lib/Target/X86/X86ScheduleBtVer2.td | 26 +- lib/Target/X86/X86ScheduleSLM.td | 31 +- lib/Target/X86/X86ScheduleZnver1.td | 66 +-- lib/Target/X86/X86Subtarget.cpp | 1 + lib/Target/X86/X86Subtarget.h | 4 + lib/Transforms/Coroutines/CoroElide.cpp | 50 +- lib/Transforms/IPO/PartialInlining.cpp | 11 +- lib/Transforms/IPO/SampleProfile.cpp | 101 ++-- lib/Transforms/InstCombine/InstCombineAddSub.cpp | 42 -- lib/Transforms/InstCombine/InstCombineCalls.cpp | 194 +++---- lib/Transforms/InstCombine/InstCombineCasts.cpp | 13 +- lib/Transforms/InstCombine/InstCombineInternal.h | 39 +- .../InstCombine/InstCombineMulDivRem.cpp | 41 -- .../InstCombine/InstCombineSimplifyDemanded.cpp | 15 +- .../Instrumentation/AddressSanitizer.cpp | 3 + lib/Transforms/Instrumentation/MemorySanitizer.cpp | 6 - .../Instrumentation/SanitizerCoverage.cpp | 2 + lib/Transforms/Scalar/DeadStoreElimination.cpp | 25 +- lib/Transforms/Scalar/GVNHoist.cpp | 2 +- lib/Transforms/Scalar/JumpThreading.cpp | 63 ++- lib/Transforms/Scalar/MergedLoadStoreMotion.cpp | 3 +- lib/Transforms/Scalar/Reassociate.cpp | 9 +- lib/Transforms/Scalar/RewriteStatepointsForGC.cpp | 4 +- .../Scalar/SeparateConstOffsetFromGEP.cpp | 9 +- lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 23 +- lib/Transforms/Utils/CloneFunction.cpp | 4 +- lib/Transforms/Utils/CodeExtractor.cpp | 118 +++- lib/Transforms/Utils/FunctionComparator.cpp | 2 +- lib/Transforms/Utils/Local.cpp | 5 +- lib/Transforms/Utils/PromoteMemoryToRegister.cpp | 2 +- lib/Transforms/Utils/SimplifyCFG.cpp | 8 +- lib/Transforms/Vectorize/VPlan.cpp | 2 +- .../CFLAliasAnalysis/Steensgaard/const-exprs.ll | 30 + test/Bindings/llvm-c/debug_info.ll | 61 +- test/Bindings/llvm-c/echo.ll | 4 + .../CodeGen/AArch64/arm64-indexed-vector-ldst-2.ll | 22 + test/CodeGen/AArch64/arm64-ldp-cluster.ll | 12 +- .../AMDGPU/GlobalISel/inst-select-bitcast.mir | 26 + .../AMDGPU/GlobalISel/inst-select-fptoui.mir | 36 ++ test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 45 ++ .../AMDGPU/GlobalISel/inst-select-store-flat.mir | 23 +- test/CodeGen/AMDGPU/comdat.ll | 19 + test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll | 5 +- test/CodeGen/AMDGPU/schedule-regpressure-limit3.ll | 591 +++++++++++++++++++ test/CodeGen/AMDGPU/vector-alloca-addrspacecast.ll | 27 + test/CodeGen/MIR/AArch64/mirCanonIdempotent.mir | 7 +- test/CodeGen/RISCV/option-norvc.ll | 15 + test/CodeGen/RISCV/option-rvc.ll | 15 + test/CodeGen/WebAssembly/address-offsets.ll | 2 +- test/CodeGen/WebAssembly/byval.ll | 2 +- test/CodeGen/WebAssembly/call.ll | 2 +- test/CodeGen/WebAssembly/cfg-stackify.ll | 2 +- test/CodeGen/WebAssembly/cfi.ll | 2 +- test/CodeGen/WebAssembly/comparisons_f32.ll | 2 +- test/CodeGen/WebAssembly/comparisons_f64.ll | 2 +- test/CodeGen/WebAssembly/comparisons_i32.ll | 2 +- test/CodeGen/WebAssembly/comparisons_i64.ll | 2 +- test/CodeGen/WebAssembly/conv-trap.ll | 2 +- test/CodeGen/WebAssembly/conv.ll | 2 +- test/CodeGen/WebAssembly/copysign-casts.ll | 2 +- test/CodeGen/WebAssembly/cpus.ll | 8 +- test/CodeGen/WebAssembly/custom-sections.ll | 2 +- test/CodeGen/WebAssembly/dbgvalue.ll | 2 +- test/CodeGen/WebAssembly/dead-vreg.ll | 2 +- test/CodeGen/WebAssembly/divrem-constant.ll | 2 +- test/CodeGen/WebAssembly/exception.ll | 2 +- test/CodeGen/WebAssembly/f16.ll | 2 +- test/CodeGen/WebAssembly/f32.ll | 2 +- test/CodeGen/WebAssembly/f64.ll | 2 +- test/CodeGen/WebAssembly/fast-isel-i24.ll | 2 +- test/CodeGen/WebAssembly/fast-isel-noreg.ll | 2 +- test/CodeGen/WebAssembly/fast-isel.ll | 2 +- test/CodeGen/WebAssembly/frem.ll | 2 +- test/CodeGen/WebAssembly/func.ll | 2 +- .../WebAssembly/function-bitcasts-varargs.ll | 2 +- test/CodeGen/WebAssembly/function-bitcasts.ll | 2 +- test/CodeGen/WebAssembly/global.ll | 2 +- test/CodeGen/WebAssembly/globl.ll | 2 +- test/CodeGen/WebAssembly/i128-returned.ll | 2 +- test/CodeGen/WebAssembly/i128.ll | 2 +- .../WebAssembly/i32-load-store-alignment.ll | 2 +- test/CodeGen/WebAssembly/i32.ll | 2 +- .../WebAssembly/i64-load-store-alignment.ll | 2 +- test/CodeGen/WebAssembly/i64.ll | 2 +- test/CodeGen/WebAssembly/ident.ll | 2 +- test/CodeGen/WebAssembly/immediates.ll | 2 +- test/CodeGen/WebAssembly/implicit-def.ll | 2 +- test/CodeGen/WebAssembly/import-module.ll | 2 +- test/CodeGen/WebAssembly/inline-asm-m.ll | 2 +- test/CodeGen/WebAssembly/inline-asm.ll | 2 +- test/CodeGen/WebAssembly/irreducible-cfg.ll | 2 +- test/CodeGen/WebAssembly/legalize.ll | 2 +- test/CodeGen/WebAssembly/libcalls.ll | 2 +- test/CodeGen/WebAssembly/load-ext-atomic.ll | 2 +- test/CodeGen/WebAssembly/load-ext.ll | 2 +- test/CodeGen/WebAssembly/load-store-i1.ll | 2 +- test/CodeGen/WebAssembly/load.ll | 2 +- .../CodeGen/WebAssembly/lower-em-ehsjlj-options.ll | 2 +- .../WebAssembly/lower-em-exceptions-whitelist.ll | 2 +- test/CodeGen/WebAssembly/lower-em-exceptions.ll | 2 +- test/CodeGen/WebAssembly/lower-em-sjlj.ll | 2 +- test/CodeGen/WebAssembly/lower-global-dtors.ll | 2 +- test/CodeGen/WebAssembly/main-declaration.ll | 2 +- test/CodeGen/WebAssembly/main.ll | 2 +- test/CodeGen/WebAssembly/mem-intrinsics.ll | 2 +- test/CodeGen/WebAssembly/memory-addr32.ll | 2 +- test/CodeGen/WebAssembly/non-executable-stack.ll | 2 +- test/CodeGen/WebAssembly/offset-atomics.ll | 2 +- test/CodeGen/WebAssembly/offset-folding.ll | 2 +- test/CodeGen/WebAssembly/offset.ll | 2 +- test/CodeGen/WebAssembly/phi.ll | 2 +- test/CodeGen/WebAssembly/reg-stackify.ll | 2 +- test/CodeGen/WebAssembly/return-int32.ll | 2 +- test/CodeGen/WebAssembly/return-void.ll | 2 +- test/CodeGen/WebAssembly/returned.ll | 2 +- test/CodeGen/WebAssembly/select.ll | 2 +- test/CodeGen/WebAssembly/signext-arg.ll | 2 +- test/CodeGen/WebAssembly/signext-inreg.ll | 2 +- test/CodeGen/WebAssembly/signext-zeroext.ll | 2 +- test/CodeGen/WebAssembly/simd-arith.ll | 2 +- test/CodeGen/WebAssembly/stack-alignment.ll | 2 +- test/CodeGen/WebAssembly/store-trunc.ll | 2 +- test/CodeGen/WebAssembly/store.ll | 2 +- test/CodeGen/WebAssembly/switch.ll | 2 +- test/CodeGen/WebAssembly/tls.ll | 2 +- test/CodeGen/WebAssembly/umulo-i64.ll | 2 +- test/CodeGen/WebAssembly/unreachable.ll | 2 +- .../WebAssembly/unsupported-function-bitcasts.ll | 2 +- test/CodeGen/WebAssembly/unused-argument.ll | 2 +- test/CodeGen/WebAssembly/userstack.ll | 2 +- test/CodeGen/WebAssembly/varargs.ll | 2 +- test/CodeGen/WebAssembly/vtable.ll | 2 +- test/CodeGen/X86/3dnow-schedule.ll | 4 +- test/CodeGen/X86/avx-schedule.ll | 8 +- test/CodeGen/X86/avx2-fma-fneg-combine.ll | 20 +- test/CodeGen/X86/avx2-schedule.ll | 26 +- test/CodeGen/X86/avx512-insert-extract.ll | 8 +- test/CodeGen/X86/avx512-intrinsics-fast-isel.ll | 184 ++++++ test/CodeGen/X86/avx512-intrinsics-upgrade.ll | 11 + test/CodeGen/X86/avx512-intrinsics.ll | 11 - test/CodeGen/X86/avx512-load-store.ll | 153 +++++ test/CodeGen/X86/avx512-schedule.ll | 64 +-- test/CodeGen/X86/avx512-shuffle-schedule.ll | 316 +++++------ test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll | 184 ++++++ test/CodeGen/X86/avx512vl-intrinsics.ll | 184 ------ test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir | 17 + test/CodeGen/X86/extend-set-cc-uses-dbg.ll | 48 ++ test/CodeGen/X86/fma-fneg-combine.ll | 16 +- test/CodeGen/X86/fmaxnum.ll | 82 +++ test/CodeGen/X86/fminnum.ll | 83 +++ test/CodeGen/X86/fold-sext-trunc.ll | 65 ++- test/CodeGen/X86/known-signbits-vector.ll | 10 +- test/CodeGen/X86/pr32284.ll | 54 +- test/CodeGen/X86/pr36602.ll | 30 + test/CodeGen/X86/pr37264.ll | 12 + test/CodeGen/X86/ptwrite32-intrinsic.ll | 56 ++ test/CodeGen/X86/ptwrite64-intrinsic.ll | 25 + test/CodeGen/X86/sse-intrinsics-x86-upgrade.ll | 10 + test/CodeGen/X86/sse-intrinsics-x86.ll | 24 - test/CodeGen/X86/sse-intrinsics-x86_64-upgrade.ll | 24 + test/CodeGen/X86/sse-intrinsics-x86_64.ll | 33 -- test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll | 51 +- test/CodeGen/X86/sse2-intrinsics-x86.ll | 97 +--- test/CodeGen/X86/sse2-intrinsics-x86_64-upgrade.ll | 28 + test/CodeGen/X86/sse2-intrinsics-x86_64.ll | 25 - test/CodeGen/X86/sse_partial_update.ll | 9 +- test/CodeGen/X86/stack-folding-fp-sse42.ll | 16 +- test/CodeGen/X86/vec_ss_load_fold.ll | 16 +- test/CodeGen/X86/vector-shuffle-variable-128.ll | 528 +++++++++-------- test/CodeGen/X86/vector-shuffle-variable-256.ll | 16 +- test/CodeGen/X86/widen_arith-4.ll | 12 +- test/CodeGen/X86/widen_arith-5.ll | 12 +- test/CodeGen/X86/xop-schedule.ll | 6 +- test/DebugInfo/WebAssembly/dbg-declare.ll | 6 +- test/DebugInfo/WebAssembly/dbg-loop-loc.ll | 2 +- test/DebugInfo/X86/dwarfdump-bogus-LNE.s | 97 ---- .../X86/dwarfdump-str-offsets-invalid-3.s | 4 +- .../X86/dwarfdump-str-offsets-invalid-4.s | 2 +- .../X86/dwarfdump-str-offsets-invalid-6.s | 4 +- test/DebugInfo/X86/dwarfdump-str-offsets-macho.s | 12 +- test/DebugInfo/X86/dwarfdump-str-offsets.s | 16 +- test/DebugInfo/X86/string-offsets-multiple-cus.ll | 2 +- test/DebugInfo/X86/string-offsets-table.ll | 6 +- test/Instrumentation/MemorySanitizer/vector_cvt.ll | 22 - .../SanitizerCoverage/abort-in-entry-block.ll | 17 + test/MC/AsmParser/altmacro_string.s | 2 +- test/MC/AsmParser/directive_space.s | 18 +- test/MC/AsmParser/exprs.s | 12 +- .../Disassembler/Mips/micromips32r3/valid-el.txt | 8 + .../Mips/micromips32r3/valid-fp64-el.txt | 2 + .../Disassembler/Mips/micromips32r3/valid-fp64.txt | 2 + test/MC/Disassembler/Mips/micromips32r3/valid.txt | 8 + test/MC/Disassembler/WebAssembly/lit.local.cfg | 3 + test/MC/Disassembler/WebAssembly/wasm.txt | 33 ++ test/MC/Mips/micromips-expansions.s | 18 + test/MC/Mips/micromips-fpu-instructions.s | 17 +- test/MC/Mips/micromips/invalid.s | 8 +- test/MC/Mips/micromips/valid-fp64.s | 4 + test/MC/Mips/micromips32r6/invalid.s | 8 +- test/MC/Mips/mips-expansions.s | 18 + test/MC/Mips/mips3/valid.s | 30 +- test/MC/Mips/mips32r6/invalid.s | 8 +- test/MC/Mips/mips4/valid.s | 30 +- test/MC/Mips/mips5/valid.s | 30 +- test/MC/Mips/mips64-expansions.s | 32 ++ test/MC/Mips/mips64/valid.s | 30 +- test/MC/Mips/mips64r2/valid.s | 30 +- test/MC/Mips/mips64r3/valid.s | 30 +- test/MC/Mips/mips64r5/valid.s | 30 +- test/MC/Mips/mips64r6/invalid.s | 20 +- test/MC/RISCV/option-invalid.s | 17 + test/MC/RISCV/option-rvc.s | 90 +++ test/MC/WebAssembly/array-fill.ll | 2 +- test/MC/WebAssembly/basic-assembly.s | 2 +- test/MC/WebAssembly/blockaddress.ll | 2 +- test/MC/WebAssembly/bss.ll | 2 +- test/MC/WebAssembly/comdat.ll | 2 +- test/MC/WebAssembly/custom-code-section.ll | 2 +- test/MC/WebAssembly/custom-sections.ll | 2 +- test/MC/WebAssembly/debug-info.ll | 2 +- test/MC/WebAssembly/dwarfdump.ll | 2 +- test/MC/WebAssembly/explicit-sections.ll | 2 +- test/MC/WebAssembly/external-data.ll | 2 +- test/MC/WebAssembly/external-func-address.ll | 2 +- test/MC/WebAssembly/file-headers.ll | 2 +- test/MC/WebAssembly/func-address.ll | 2 +- test/MC/WebAssembly/global-ctor-dtor.ll | 2 +- test/MC/WebAssembly/libcall.ll | 2 +- test/MC/WebAssembly/offset.ll | 2 +- test/MC/WebAssembly/reloc-code.ll | 2 +- test/MC/WebAssembly/reloc-data.ll | 2 +- test/MC/WebAssembly/sections.ll | 2 +- test/MC/WebAssembly/stack-ptr.ll | 2 +- test/MC/WebAssembly/unnamed-data.ll | 2 +- test/MC/WebAssembly/visibility.ll | 2 +- test/MC/WebAssembly/weak-alias.ll | 2 +- test/MC/WebAssembly/weak.ll | 2 +- test/Object/Inputs/trivial.ll | 2 +- test/Transforms/CodeExtractor/inline_eh.ll | 52 ++ test/Transforms/CodeExtractor/inline_eh_1.ll | 56 ++ .../CodeGenPrepare/AArch64/large-offset-gep.ll | 147 +++++ test/Transforms/Coroutines/coro-heap-elide.ll | 33 ++ .../DeadStoreElimination/OverwriteStoreBegin.ll | 24 +- .../DeadStoreElimination/OverwriteStoreEnd.ll | 18 +- test/Transforms/InstCombine/X86/clmulqdq.ll | 266 +++++++++ test/Transforms/InstCombine/X86/x86-fma.ll | 233 -------- .../InstCombine/element-atomic-memcpy-to-loads.ll | 94 --- .../InstCombine/element-atomic-memintrins.ll | 338 +++++++++-- test/Transforms/InstCombine/maxnum.ll | 374 +++++++----- test/Transforms/InstCombine/minnum.ll | 407 ++++++++----- test/Transforms/InstCombine/rotate.ll | 107 ++++ test/Transforms/InstCombine/sprintf-void.ll | 21 + test/Transforms/MergeFunc/inline-asm.ll | 53 ++ test/Transforms/Reassociate/infloop-deadphi.ll | 28 + .../SampleProfile/Inputs/warm-inline-instance.prof | 11 + test/Transforms/SampleProfile/function_metadata.ll | 2 +- test/Transforms/SampleProfile/inline.ll | 4 +- .../{inline.ll => warm-inline-instance.ll} | 80 +-- .../NVPTX/split-gep-and-gvn.ll | 10 +- .../SeparateConstOffsetFromGEP/NVPTX/split-gep.ll | 39 +- .../X86/Inputs/debug_line_malformed.s | 190 +++++++ .../X86/Inputs/debug_line_reserved_length.s | 57 ++ .../llvm-dwarfdump/X86/debug_line_invalid.test | 91 +++ test/tools/llvm-mca/X86/BtVer2/resources-avx1.s | 26 +- test/tools/llvm-mca/X86/BtVer2/resources-mmx.s | 6 +- test/tools/llvm-mca/X86/BtVer2/resources-sse1.s | 4 +- test/tools/llvm-mca/X86/SLM/resources-mmx.s | 4 +- test/tools/llvm-mca/X86/SLM/resources-sse1.s | 10 +- test/tools/llvm-mca/X86/SLM/resources-sse2.s | 16 +- .../llvm-mca/X86/SandyBridge/resources-avx1.s | 10 +- test/tools/llvm-nm/wasm/local-symbols.ll | 2 +- test/tools/llvm-objcopy/help-message.test | 19 +- test/tools/llvm-objcopy/remove-section.test | 9 + test/tools/llvm-objcopy/strip-all-and-remove.test | 49 ++ ...trip-debug.test => strip-debug-and-remove.test} | 44 +- test/tools/llvm-objcopy/strip-debug.test | 4 - test/tools/llvm-objdump/Inputs/trivial.ll | 2 +- .../llvm-objdump/WebAssembly/relocations.test | 2 +- test/tools/llvm-readobj/Inputs/trivial.ll | 2 +- tools/dsymutil/DwarfLinker.cpp | 5 +- tools/llc/llc.cpp | 1 - tools/llvm-ar/llvm-ar.cpp | 2 +- tools/llvm-as-fuzzer/CMakeLists.txt | 4 +- tools/llvm-c-test/debuginfo.c | 20 +- tools/llvm-c-test/echo.cpp | 13 + tools/llvm-demangle-fuzzer/CMakeLists.txt | 3 +- tools/llvm-isel-fuzzer/CMakeLists.txt | 6 +- tools/llvm-mc-assemble-fuzzer/CMakeLists.txt | 4 +- tools/llvm-mc-disassemble-fuzzer/CMakeLists.txt | 4 +- tools/llvm-mca/RetireControlUnit.h | 6 +- tools/llvm-objcopy/StripOpts.td | 6 + tools/llvm-objcopy/llvm-objcopy.cpp | 4 + tools/llvm-opt-fuzzer/CMakeLists.txt | 6 +- tools/llvm-special-case-list-fuzzer/CMakeLists.txt | 3 +- unittests/ADT/IteratorTest.cpp | 8 + unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp | 629 ++++++++++++++++++++- unittests/DebugInfo/DWARF/DwarfGenerator.cpp | 237 +++++++- unittests/DebugInfo/DWARF/DwarfGenerator.h | 77 ++- unittests/IR/BasicBlockTest.cpp | 7 +- unittests/IR/DominatorTreeBatchUpdatesTest.cpp | 4 +- unittests/IR/DominatorTreeTest.cpp | 70 +++ unittests/MC/Disassembler.cpp | 45 +- utils/TableGen/CMakeLists.txt | 1 + utils/TableGen/DisassemblerEmitter.cpp | 9 + utils/TableGen/WebAssemblyDisassemblerEmitter.cpp | 116 ++++ utils/TableGen/WebAssemblyDisassemblerEmitter.h | 30 + utils/lit/lit/Test.py | 32 +- utils/lit/lit/main.py | 12 +- .../{test-data => xunit-output}/bad&name.ini | 2 +- .../{test-data => xunit-output}/dummy_format.py | 0 .../Inputs/{test-data => xunit-output}/lit.cfg | 0 utils/lit/tests/shtest-xunit-output.py | 17 +- utils/lit/tests/test-output.py | 8 +- utils/lit/tests/xunit-output.py | 8 +- 432 files changed, 10177 insertions(+), 4522 deletions(-) delete mode 100644 bindings/go/llvm/DIBuilderBindings.cpp delete mode 100644 bindings/go/llvm/DIBuilderBindings.h create mode 100644 lib/Target/AMDGPU/AMDGPUGISel.td rename lib/Target/AMDGPU/{AMDGPUOpenCLImageTypeLoweringPass.cpp => R600OpenCLImage [...] create mode 100644 test/Analysis/CFLAliasAnalysis/Steensgaard/const-exprs.ll create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-bitcast.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir create mode 100644 test/CodeGen/AMDGPU/comdat.ll create mode 100644 test/CodeGen/AMDGPU/schedule-regpressure-limit3.ll create mode 100644 test/CodeGen/AMDGPU/vector-alloca-addrspacecast.ll create mode 100644 test/CodeGen/RISCV/option-norvc.ll create mode 100644 test/CodeGen/RISCV/option-rvc.ll create mode 100644 test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir create mode 100644 test/CodeGen/X86/extend-set-cc-uses-dbg.ll create mode 100644 test/CodeGen/X86/pr36602.ll create mode 100644 test/CodeGen/X86/pr37264.ll create mode 100644 test/CodeGen/X86/ptwrite32-intrinsic.ll create mode 100644 test/CodeGen/X86/ptwrite64-intrinsic.ll create mode 100644 test/CodeGen/X86/sse-intrinsics-x86_64-upgrade.ll create mode 100644 test/CodeGen/X86/sse2-intrinsics-x86_64-upgrade.ll create mode 100644 test/Instrumentation/SanitizerCoverage/abort-in-entry-block.ll create mode 100644 test/MC/Disassembler/WebAssembly/lit.local.cfg create mode 100644 test/MC/Disassembler/WebAssembly/wasm.txt create mode 100644 test/MC/RISCV/option-invalid.s create mode 100644 test/MC/RISCV/option-rvc.s create mode 100644 test/Transforms/CodeExtractor/inline_eh.ll create mode 100644 test/Transforms/CodeExtractor/inline_eh_1.ll create mode 100644 test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll create mode 100644 test/Transforms/InstCombine/X86/clmulqdq.ll delete mode 100644 test/Transforms/InstCombine/element-atomic-memcpy-to-loads.ll create mode 100644 test/Transforms/InstCombine/sprintf-void.ll create mode 100644 test/Transforms/MergeFunc/inline-asm.ll create mode 100644 test/Transforms/Reassociate/infloop-deadphi.ll create mode 100644 test/Transforms/SampleProfile/Inputs/warm-inline-instance.prof copy test/Transforms/SampleProfile/{inline.ll => warm-inline-instance.ll} (60%) create mode 100644 test/tools/llvm-dwarfdump/X86/Inputs/debug_line_malformed.s create mode 100644 test/tools/llvm-dwarfdump/X86/Inputs/debug_line_reserved_length.s create mode 100644 test/tools/llvm-dwarfdump/X86/debug_line_invalid.test create mode 100644 test/tools/llvm-objcopy/strip-all-and-remove.test copy test/tools/llvm-objcopy/{strip-debug.test => strip-debug-and-remove.test} (58%) create mode 100644 utils/TableGen/WebAssemblyDisassemblerEmitter.cpp create mode 100644 utils/TableGen/WebAssemblyDisassemblerEmitter.h rename utils/lit/tests/Inputs/{test-data => xunit-output}/bad&name.ini (61%) copy utils/lit/tests/Inputs/{test-data => xunit-output}/dummy_format.py (100%) copy utils/lit/tests/Inputs/{test-data => xunit-output}/lit.cfg (100%)