[gcc] branch master updated (ac9fec014df -> b3a32804beb) - Tcwg-commits

6 May 2025


      This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch master
in repository gcc.
from  ac9fec014df libstdc++: Add noexcept to some std::counted_iterator operations
       new  17c1602d5e7 RISC-V: Add new option --param=gpr2vr-cost= for rvv insn
       new  9e9eb78bf4b RISC-V: Add gr2vr cost helper function
       new  2b5baada614 RISC-V: Combine vec_duplicate + vadd.vv to vadd.vx on GR2VR cost
       new  1276430a48e RISC-V: Add testcases for vec_duplicate + vadd.vv combine w [...]
       new  c10491efc10 RISC-V: Add testcases for vec_duplicate + vadd.vv combine w [...]
       new  b3a32804beb RISC-V: Add testcases for vec_duplicate + vadd.vv combine w [...]
The 6 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 gcc/config/riscv/autovec-opt.md                    |  23 ++
 gcc/config/riscv/riscv-opts.h                      |   2 +
 gcc/config/riscv/riscv-protos.h                    |   1 +
 gcc/config/riscv/riscv-vector-costs.cc             |   2 +-
 gcc/config/riscv/riscv.cc                          |  54 ++-
 gcc/config/riscv/riscv.opt                         |   4 +
 gcc/config/riscv/vector-iterators.md               |   4 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h |  17 +
 .../riscv/rvv/autovec/vx_vf/vx_binary_data.h       | 401 +++++++++++++++++++++
 .../riscv/rvv/autovec/vx_vf/vx_binary_run.h        |  26 ++
 .../riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c         |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c         |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-2-i16.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-2-i32.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-2-i64.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-2-i8.c         |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-2-u16.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-2-u32.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-2-u64.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-2-u8.c         |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-3-i16.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-3-i32.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-3-i64.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-3-i8.c         |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-3-u16.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-3-u32.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-3-u64.c        |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-3-u8.c         |   8 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c    |  14 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c    |  14 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c    |  14 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c     |  14 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c    |  14 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c    |  14 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c    |  14 +
 .../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c     |  14 +
 gcc/testsuite/gcc.target/riscv/rvv/rvv.exp         |   2 +
 43 files changed, 836 insertions(+), 4 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i32.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i64.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u32.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u64.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i32.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i64.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u32.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u64.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
-- 
To stop receiving notification emails like this one, please contact
the administrator of this repository.