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from 4879a8ee30c Fix bogus alignment warning on address clause new 20ed049a8d7 Revert "Fortran : ICE in build_field PR95614" new 117b23e43f7 AArch64: Implement poly-type vadd intrinsics new b8442a7c4c0 AArch64: Implement missing vceq*_p* intrinsics new 34db2d23439 AArch64: Implement missing vcls intrinsics on unsigned types new bc04ceb7b94 AArch64: Implement vstrq_p128 intrinsic new 1c0679d6b5d AArch64: Implement vldrq_p128 intrinsic new 5b9f76b9552 AArch64: Implement missing _p64 intrinsics for vector permutes new 858cfd55807 AArch64: Implement missing vrndns_f32 intrinsic new 677f34508f1 AArch64: Implement missing p128<->f64 reinterpret intrinsics new a6c47f4ce26 testsuite: [aarch64] Fix aarch64/advsimd-intrinsics/v{trn,u [...]

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Summary of changes: gcc/config/aarch64/aarch64-simd-builtins.def | 3 +- gcc/config/aarch64/arm_neon.h | 214 +++++++++++++++++++++ gcc/fortran/decl.c | 4 +- gcc/fortran/match.c | 5 +- gcc/fortran/match.h | 6 +- gcc/fortran/resolve.c | 7 - .../aarch64/advsimd-intrinsics/arm-neon-ref.h | 8 +- .../aarch64/advsimd-intrinsics/vreinterpret_p128.c | 19 ++ .../aarch64/advsimd-intrinsics/vtrn_half.c | 3 - .../aarch64/advsimd-intrinsics/vuzp_half.c | 3 - .../aarch64/advsimd-intrinsics/vzip_half.c | 3 - .../gcc.target/aarch64/simd/trn_zip_p64_1.c | 44 +++++ .../gcc.target/aarch64/simd/vadd_poly_1.c | 50 +++++ .../gcc.target/aarch64/simd/vceq_poly_1.c | 29 +++ .../gcc.target/aarch64/simd/vcls_unsigned_1.c | 54 ++++++ .../gcc.target/aarch64/simd/vldrq_p128_1.c | 13 ++ .../gcc.target/aarch64/simd/vrndns_f32_1.c | 13 ++ .../gcc.target/aarch64/simd/vstrq_p128_1.c | 12 ++ gcc/testsuite/gfortran.dg/pr95614_1.f90 | 6 - gcc/testsuite/gfortran.dg/pr95614_2.f90 | 6 - 20 files changed, 463 insertions(+), 39 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/trn_zip_p64_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vadd_poly_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vceq_poly_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vcls_unsigned_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vldrq_p128_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vrndns_f32_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vstrq_p128_1.c delete mode 100644 gcc/testsuite/gfortran.dg/pr95614_1.f90 delete mode 100644 gcc/testsuite/gfortran.dg/pr95614_2.f90