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from 3b859eaf517 [Loop Peeling] Introduce an option for profile based peelin [...] new bdb35079c55 Fix and test inter-procedural register allocation for ARM new b5c77aec549 [IPRA][ARM] Disable no-CSR optimisation for ARM

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Summary of changes: include/llvm/CodeGen/TargetFrameLowering.h | 5 + include/llvm/CodeGen/TargetRegisterInfo.h | 8 ++ lib/CodeGen/RegUsageInfoCollector.cpp | 10 +- lib/CodeGen/TargetFrameLoweringImpl.cpp | 4 +- lib/Target/ARM/ARMBaseRegisterInfo.cpp | 6 + lib/Target/ARM/ARMBaseRegisterInfo.h | 3 + lib/Target/ARM/ARMFrameLowering.cpp | 3 +- lib/Target/ARM/ARMFrameLowering.h | 5 + test/CodeGen/ARM/ipra-no-csr.ll | 22 ++++ test/CodeGen/ARM/ipra.ll | 202 +++++++++++++++++++++++++++++ 10 files changed, 264 insertions(+), 4 deletions(-) create mode 100644 test/CodeGen/ARM/ipra-no-csr.ll create mode 100644 test/CodeGen/ARM/ipra.ll