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from cc0e22b3f25 tree-optimization/64731 - extend store-from CTOR lowering t [...] new c919d059fcb RISC-V: Optimize vsetvli of LCM INSERTED edge for user vset [...]

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Summary of changes: gcc/config/riscv/riscv-vsetvl.cc | 213 ++++++++++++++++----- .../gcc.target/riscv/rvv/vsetvl/pr109743-1.c | 26 +++ .../rvv/vsetvl/{pr109773-2.c => pr109743-2.c} | 11 +- .../gcc.target/riscv/rvv/vsetvl/pr109743-3.c | 28 +++ .../rvv/vsetvl/{pr109773-1.c => pr109743-4.c} | 14 +- 5 files changed, 239 insertions(+), 53 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-1.c copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{pr109773-2.c => pr109743-2.c} (54%) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-3.c copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{pr109773-1.c => pr109743-4.c} (50%)