[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig updated (0c6e19b7058 -> e73f885c988) - Tcwg-commits

28 Dec 2020


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig
in repository toolchain/ci/llvm-project.
from  0c6e19b7058 [AArch64] Add some anyextend testing. NFC
      adds  fb77d950221 [AArch64] Fix legalization of i128 ctpop without neon
      adds  0af42d3dc73 [PatternMatch][LVI] Handle select-form and/or in LVI
      adds  079923309c6 [llvm-cov] Use is_contained (NFC)
      adds  789d2506136 [CodeGen, Transforms] Use *Map::lookup (NFC)
      adds  8299fb8f256 [Transforms] Use llvm::append_range (NFC)
      adds  0ea3749b3cd [LV] Set up branch from middle block earlier.
      adds  0d05c1f40d6 [GVN] Add tests for select form of and/or (NFC)
      adds  0060f101345 [EarlyCSE] Add tests for select form of and/or (NFC)
      adds  f1d648b973d [GVN] Use m_LogicalAnd/Or to propagate equality from branch [...]
      adds  d3f1f7b6bca [EarlyCSE] Use m_LogicalAnd/Or matchers to handle branch co [...]
      adds  eca40c36ef1 [ValueTracking] Add unit tests for isKnownNonZero, isImplie [...]
      adds  4ad41902e8c [GVN] Correctly set modified status when doing PRE on indices.
      adds  860199dfbe6 [ValueTracking] Use m_LogicalAnd/Or to look into conditions
      adds  9d70dbdc2bf [InstCombine] use poison as placeholder for undemanded elems
      adds  d76c1d2247a [RS4GC] Lazily set changed flag when folding single entry phis
      adds  31c2b93d83f [MachineSink] add threshold in machinesink pass to reduce c [...]
      adds  fde3ae88ee4 [asan][memprof] Declare _DYNAMIC and fix -Wparentheses
      adds  0b56e3cdda5 [sanitizer] Defined SANITIZER_TEST_HAS_PVALLOC only on glibc
      adds  99d650b3699 [compiler-rt][test] Make glibc-* feature detection work on  [...]
      adds  60afb58bfee [msan] Delete unused glibc header <execinfo.h>
      adds  d85a198e852 [RISCV] Pattern-match more vector-splatted constants
      adds  a485a59d217 [benchmark] Fixed a build error when using CMake 3.15.1 + NDK-R20
      adds  5b17263b6b9 [AMDGPU][MC][NFC] Parser refactoring
      adds  8c25bb3d0d5 [AMDGPU][MC] Improved errors handling for v_interp* operands
       new  e673d401994 [RISCV] Define vmsbf.m/vmsif.m/vmsof.m/viota.m/vid.v intrinsics.
       new  644da789e36 [AMDGPU] Split edge to make si_if dominate end_cf
       new  0999408aea7 [clangd] Add error handling (elog) in code completion.
       new  c3b9d85bd4b [clang-tidy][NFC] Remove unnecessary headers
       new  e73f885c988 [PowerPC] Remove redundant COPY_TO_REGCLASS introduced by 8 [...]
The 5 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 clang-tools-extra/clang-tidy/ClangTidy.cpp         |   4 -
 clang-tools-extra/clang-tidy/ClangTidyCheck.cpp    |   2 -
 .../clang-tidy/ClangTidyDiagnosticConsumer.cpp     |   6 +-
 clang-tools-extra/clang-tidy/ClangTidyModule.h     |   2 -
 clang-tools-extra/clang-tidy/ClangTidyOptions.cpp  |   1 -
 .../clang-tidy/ClangTidyProfiling.cpp              |   2 -
 clang-tools-extra/clangd/CodeComplete.cpp          |  12 +-
 .../SystemZ/builtins-systemz-zvector-constrained.c |   2 +-
 .../CodeGen/SystemZ/builtins-systemz-zvector.c     |  18 +-
 .../builtins-systemz-zvector2-constrained.c        |   4 +-
 .../CodeGen/SystemZ/builtins-systemz-zvector2.c    |   4 +-
 compiler-rt/lib/asan/asan_linux.cpp                |   3 +-
 compiler-rt/lib/memprof/memprof_linux.cpp          |   4 +-
 compiler-rt/lib/memprof/memprof_mapping.h          |   2 +-
 compiler-rt/lib/msan/msan_linux.cpp                |   1 -
 .../sanitizer_common/tests/sanitizer_test_utils.h  |   4 +-
 compiler-rt/test/lit.common.cfg.py                 |  12 +-
 llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h      |   5 +-
 llvm/include/llvm/IR/IntrinsicsRISCV.td            |  49 ++
 llvm/include/llvm/IR/PatternMatch.h                |  52 ++
 .../llvm/Transforms/Utils/BasicBlockUtils.h        |   2 +-
 llvm/lib/Analysis/LazyValueInfo.cpp                |  14 +-
 llvm/lib/Analysis/ValueTracking.cpp                |  46 +-
 llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h           |   3 +-
 llvm/lib/CodeGen/MIRParser/MIParser.cpp            |  10 +-
 llvm/lib/CodeGen/MachineSink.cpp                   |  36 +
 llvm/lib/Target/AArch64/AArch64ISelLowering.cpp    |   3 +-
 .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp    | 194 +++--
 llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp   |  13 +-
 llvm/lib/Target/PowerPC/PPCInstrPrefix.td          |   8 +-
 llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp        |  23 +-
 llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td    | 288 ++++++-
 llvm/lib/Transforms/IPO/ArgumentPromotion.cpp      |   4 +-
 llvm/lib/Transforms/IPO/LowerTypeTests.cpp         |   2 +-
 llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp     |   2 +-
 .../InstCombine/InstCombineLoadStoreAlloca.cpp     |   7 +-
 .../InstCombine/InstCombineSimplifyDemanded.cpp    |  23 +-
 .../Instrumentation/ControlHeightReduction.cpp     |   2 +-
 .../Instrumentation/DataFlowSanitizer.cpp          |   3 +-
 llvm/lib/Transforms/Scalar/EarlyCSE.cpp            |  16 +-
 llvm/lib/Transforms/Scalar/GVN.cpp                 |  15 +-
 llvm/lib/Transforms/Scalar/GuardWidening.cpp       |   3 +-
 llvm/lib/Transforms/Scalar/LoopSink.cpp            |   3 +-
 llvm/lib/Transforms/Scalar/LoopUnswitch.cpp        |   4 +-
 llvm/lib/Transforms/Scalar/PlaceSafepoints.cpp     |   3 +-
 .../Transforms/Scalar/RewriteStatepointsForGC.cpp  |   9 +-
 llvm/lib/Transforms/Utils/BasicBlockUtils.cpp      |   6 +-
 llvm/lib/Transforms/Utils/BuildLibCalls.cpp        |   4 +-
 llvm/lib/Transforms/Utils/Evaluator.cpp            |   6 +-
 llvm/lib/Transforms/Utils/InlineFunction.cpp       |   7 +-
 llvm/lib/Transforms/Utils/LoopVersioning.cpp       |   4 +-
 llvm/lib/Transforms/Utils/SSAUpdater.cpp           |   3 +-
 llvm/lib/Transforms/Vectorize/LoopVectorize.cpp    |  25 +-
 llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp    |  12 +-
 llvm/lib/Transforms/Vectorize/VPlan.h              |   4 +-
 llvm/test/CodeGen/AArch64/ctpop-nonean.ll          |  36 +
 .../AMDGPU/unstructured-cfg-def-use-issue.ll       | 333 ++++++++
 llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll  |   2 +-
 llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll            | 545 +++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll            | 673 ++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll          | 722 +++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll          | 882 +++++++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll          | 239 ++++++
 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll          | 239 ++++++
 llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll          | 239 ++++++
 llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll          | 239 ++++++
 llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll          | 239 ++++++
 llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll          | 239 ++++++
 llvm/test/MC/AMDGPU/gfx10_err_pos.s                |  51 +-
 llvm/test/MC/AMDGPU/vintrp-err.s                   |  53 +-
 .../Transforms/CorrelatedValuePropagation/basic.ll |  12 +-
 llvm/test/Transforms/EarlyCSE/and_or.ll            | 116 +++
 llvm/test/Transforms/GVN/PRE/modified-status.ll    |  60 ++
 llvm/test/Transforms/GVN/PRE/pre-gep-load.ll       |  13 +-
 llvm/test/Transforms/GVN/condprop.ll               |  66 ++
 llvm/test/Transforms/InstCombine/AArch64/tbl1.ll   |   2 +-
 llvm/test/Transforms/InstCombine/ARM/tbl1.ll       |   2 +-
 llvm/test/Transforms/InstCombine/X86/clmulqdq.ll   |  18 +-
 .../InstCombine/X86/x86-addsub-inseltpoison.ll     |   4 +-
 llvm/test/Transforms/InstCombine/X86/x86-addsub.ll |   4 +-
 .../InstCombine/X86/x86-avx512-inseltpoison.ll     |  40 +-
 llvm/test/Transforms/InstCombine/X86/x86-avx512.ll |  40 +-
 .../Transforms/InstCombine/X86/x86-insertps.ll     |   4 +-
 .../InstCombine/X86/x86-masked-memops.ll           |  16 +-
 llvm/test/Transforms/InstCombine/X86/x86-muldq.ll  |   4 +-
 .../InstCombine/X86/x86-pack-inseltpoison.ll       |   4 +-
 llvm/test/Transforms/InstCombine/X86/x86-pack.ll   |   4 +-
 llvm/test/Transforms/InstCombine/X86/x86-pshufb.ll |  72 +-
 .../InstCombine/X86/x86-sse-inseltpoison.ll        |  70 +-
 llvm/test/Transforms/InstCombine/X86/x86-sse.ll    |  70 +-
 .../InstCombine/X86/x86-sse2-inseltpoison.ll       |  66 +-
 llvm/test/Transforms/InstCombine/X86/x86-sse2.ll   |  66 +-
 .../InstCombine/X86/x86-sse41-inseltpoison.ll      |  18 +-
 llvm/test/Transforms/InstCombine/X86/x86-sse41.ll  |  18 +-
 llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll  |  18 +-
 .../X86/x86-vec_demanded_elts-inseltpoison.ll      |  22 +-
 .../InstCombine/X86/x86-vec_demanded_elts.ll       |  43 +-
 .../X86/x86-vector-shifts-inseltpoison.ll          |  20 +-
 .../InstCombine/X86/x86-vector-shifts.ll           |  20 +-
 .../test/Transforms/InstCombine/X86/x86-vpermil.ll |   2 +-
 .../InstCombine/X86/x86-xop-inseltpoison.ll        |   4 +-
 llvm/test/Transforms/InstCombine/X86/x86-xop.ll    |   4 +-
 .../Transforms/InstCombine/bitcast-bigendian.ll    |   6 +-
 .../Transforms/InstCombine/bitcast-inseltpoison.ll |   6 +-
 .../InstCombine/bitcast-vec-canon-inseltpoison.ll  |   2 +-
 .../Transforms/InstCombine/bitcast-vec-canon.ll    |   4 +-
 llvm/test/Transforms/InstCombine/bitcast.ll        |   6 +-
 .../InstCombine/broadcast-inseltpoison.ll          |   4 +-
 llvm/test/Transforms/InstCombine/broadcast.ll      |   4 +-
 llvm/test/Transforms/InstCombine/cast.ll           |   8 +-
 llvm/test/Transforms/InstCombine/getelementptr.ll  |   4 +-
 .../Transforms/InstCombine/insert-const-shuf.ll    |  18 +-
 .../insert-extract-shuffle-inseltpoison.ll         |  14 +-
 .../InstCombine/insert-extract-shuffle.ll          |  14 +-
 .../InstCombine/masked_intrinsics-inseltpoison.ll  |   8 +-
 .../Transforms/InstCombine/masked_intrinsics.ll    |   8 +-
 llvm/test/Transforms/InstCombine/minmax-fold.ll    |   2 +-
 llvm/test/Transforms/InstCombine/pr2645-0.ll       |   3 +-
 llvm/test/Transforms/InstCombine/shuffle_select.ll |  22 +-
 .../shufflevector-div-rem-inseltpoison.ll          |   2 +-
 .../InstCombine/shufflevector-div-rem.ll           |   2 +-
 .../Transforms/InstCombine/sub-of-negatible.ll     |   2 +-
 llvm/test/Transforms/InstCombine/trunc.ll          |   2 +-
 .../InstCombine/vec_demanded_elts-inseltpoison.ll  |  44 +-
 .../Transforms/InstCombine/vec_demanded_elts.ll    |  44 +-
 .../InstCombine/vec_shuffle-inseltpoison.ll        |  55 +-
 llvm/test/Transforms/InstCombine/vec_shuffle.ll    |  52 +-
 .../InstCombine/vector-casts-inseltpoison.ll       |   2 +-
 llvm/test/Transforms/InstCombine/vector-casts.ll   |   2 +-
 .../vector_insertelt_shuffle-inseltpoison.ll       |   4 +-
 .../InstCombine/vector_insertelt_shuffle.ll        |  22 +-
 .../SystemZ/predicated-first-order-recurrence.ll   |   6 +-
 .../LoopVectorize/X86/invariant-load-gather.ll     |   4 +-
 .../LoopVectorize/first-order-recurrence.ll        |   6 +-
 llvm/test/Transforms/LoopVectorize/induction.ll    |   2 +-
 .../LoopVectorize/reduction-inloop-pred.ll         |   2 +-
 .../Transforms/LoopVectorize/reduction-inloop.ll   |   2 +-
 .../LoopVectorize/skeleton-lcssa-crash.ll          | 137 ++++
 .../PhaseOrdering/X86/horiz-math-inseltpoison.ll   |   2 +-
 .../Transforms/PhaseOrdering/X86/horiz-math.ll     |   2 +-
 .../SLPVectorizer/AArch64/getelementptr.ll         |   6 +-
 .../X86/alternate-cast-inseltpoison.ll             |   4 +-
 .../Transforms/SLPVectorizer/X86/alternate-cast.ll |   4 +-
 .../X86/alternate-int-inseltpoison.ll              |   2 +-
 .../X86/blending-shuffle-inseltpoison.ll           |   2 +-
 llvm/tools/llvm-size/llvm-size.cpp                 |   4 +-
 llvm/unittests/Analysis/ValueTrackingTest.cpp      | 129 +++
 llvm/utils/benchmark/include/benchmark/benchmark.h |   2 +-
 148 files changed, 6425 insertions(+), 906 deletions(-)
 create mode 100644 llvm/test/CodeGen/AArch64/ctpop-nonean.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll
 create mode 100644 llvm/test/Transforms/GVN/PRE/modified-status.ll
 create mode 100644 llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll
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