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from d00ce88b4be [X86][AVX] truncateVectorWithPACK - avoid bitcasted shuffles new f5bddce9ea8 [RISCV] Add pseudo instruction for calls with explicit register

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Summary of changes: lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 4 +++ .../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 33 ++++++++++++++-------- lib/Target/RISCV/RISCVInstrInfo.cpp | 1 + lib/Target/RISCV/RISCVInstrInfo.td | 11 ++++++++ test/MC/RISCV/function-call-invalid.s | 1 + test/MC/RISCV/function-call.s | 14 +++++++++ 6 files changed, 53 insertions(+), 11 deletions(-)