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from e0b4696b74c [FunctionAttrs] Remove readonly and writeonly assertion new 73e6df357df [AMDGPU] Copy missing predicate from pseudo to real new 260d1e96f9c Add some release notes for 9.0 release new b508009134c AMDGPU: Add 24-bit mul intrinsics

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Summary of changes: docs/ReleaseNotes.rst | 12 +- include/llvm/IR/IntrinsicsAMDGPU.td | 10 + lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 127 ++++++ lib/Target/AMDGPU/DSInstructions.td | 1 + lib/Target/AMDGPU/SIISelLowering.cpp | 5 + test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll | 494 +++++++++++++++++++++ test/CodeGen/AMDGPU/llvm.amdgcn.mul.i24.ll | 14 + test/CodeGen/AMDGPU/llvm.amdgcn.mul.u24.ll | 14 + test/CodeGen/AMDGPU/mad_uint24.ll | 76 ++++ test/CodeGen/AMDGPU/mul.i16.ll | 18 +- test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll | 4 +- 11 files changed, 763 insertions(+), 12 deletions(-) create mode 100644 test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll create mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.mul.i24.ll create mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.mul.u24.ll