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unknown user pushed a change to branch rsandifo/sve-rebase in repository gcc.
discards 9f6b01aacf8 Work around PR81082 discards 208ef0ba566 Use conditional internal functions in if-conversion discards 34676982722 Implement SLP of internal functions discards 52894c64b88 Handle vector boolean types when calculating the SLP unroll factor discards c1c78f30242 Remove unnecessary temporary in tree-if-conv.c discards b22358b8afe Add early rematerialisation pass discards 7a3da6f49aa Record equivalences for spill registers discards 27e17907b39 Support fused multiply-adds in fully-masked reductions discards 070e9d0b1ea Replace FMA_EXPR with one internal fn per optab discards 1cef189cba3 Use single-iteration epilogues when peeling for gaps discards a721c4fb5a4 Allow single-element interleaving for non-power-of-2 strides discards 0d0014f675e Add support for first-faulting loads discards 8f312d5153a Add support for speculative loads discards 2d09c0703bf Revert DECL_USER_ALIGN patch discards b8ec9179e0c Support for aliasing with variable strides discards 8180ad790e1 Fix for big field stores discards 95d62e3080b Avoid pessimistic check for overlapping groups discards 993d0177e34 Add support for gather loads and scatter stores discards 2f5419fdce8 Add support for FADDA discards c32412c8665 Add support for CLASTB discards d69f3683467 Add support for BRKA and LASTB discards f5f3fb1185f Allow capped vectorisation factors discards 7ce1572f52e Reuse results of vect_create_addr_base_for_vector_ref discards aa9a87fa1c3 Add an empty_mask_is_expensive hook discards dee655acfb2 Predicated arithmetic folds discards a6498de58f9 Predicated comparison folds discards 386238d895c Allow combine to reorder statements discards cd297c17f25 Rework the legitimize_address_displacement hook discards cbb579b7161 Improve ivopts handling of offset multiples discards ab96f67a1d6 Handle peeling for alignment with masking discards 5f8c35b7825 Allow the number of iterations to be smaller than VF discards 5992e77a864 Make ivopts handle calls to internal functions discards 7e5a209e87f Improve VIEW_CONVERT_EXPR for vector booleans discards c67b54d99ab Add support for fully-predicated loops discards 1b6d746b826 Protect against min_profitable_iters going negative discards 61cf302a4df SLP reductions with variable-length vectors discards 2a7483eb21f Handle more SLP constant and extern definitions for variable VF discards 01c60e41b97 Add optabs for common types of permutation discards 3187f291abc Add support for bitwise reductions discards 30c3dad6749 Add support for masked load/store_lanes discards 6e36965acb5 [AArch64] SVE load/store_lanes support discards 8b3849d3696 Fix folding of vector mask EQ/NE expressions discards 83dedbe78a7 Test failures discards 40932ba0742 SVE unwinding discards 960813c9669 [AArch64] SVE tests discards 46e4e831a99 [AArch64] Testsuite markup for SVE discards 89603f9cd8c [AArch64] Add SVE support discards adadbaf0a4a Use poly_int tree accessors instead of hwi accessors discards f7b1103c325 Use poly_int rtx accessors instead of hwi accessors discards 40c46f618ec Add a vect_masked_store target selector discards db01c5bde5a Add a vect_align_stack_vars target selector discards 88aa3c9b214 Add a vect_variable_length target selector discards d4a197c99a9 Add a vect_unaligned_possible target selector discards 5a9f490812b Add a vect_element_align_preferred target selector discards 7ae3d3031c2 Add vect_perm3_* target selectors discards e72f94844ad Don't assume vect_multiple_sizes means 2 sizes discards ed2ec108b2e Add available_vector_sizes to target-supports.exp discards e05574bf0ae Add VECTOR_BITS to tree-vect.h discards 707fa7529ca Consistently use asm volatile ("" ::: "memory") in vect tests discards 9c133eef288 Use extract_bit_field_as_subreg for vectors discards 6c0867d1cb1 Improve spilling for variable-width slots discards fd20ff8360a Improve canonicalisation of TARGET_MEM_REFs discards 9b420ddab37 Improve ivopts handling of forced scales discards 3390ab51468 Improve vectorization COND_EXPR <bool op bool, ...> discards 22513af442b Allow the target to set MAX_BITSIZE_MODE_ANY_MODE discards df93d6babc2 [AArch64] Add const_offset field to aarch64_address_info discards fb05a6c80f5 [AArch64] Set NUM_POLY_INT_COEFFS to 2 discards 28171d56105 [AArch64] Pass number of units to aarch64_expand_vec_perm(_const) discards da58e52151d [AArch64] Pass number of units to aarch64_simd_vect_par_cnst_half discards a21c91996c0 [AArch64] Pass number of units to aarch64_reverse_mask discards 79043dbdeca [AArch64] Add an endian_lane_rtx helper routine discards 8dbd765a0ce [AArch64] Rewrite aarch64_simd_valid_immediate discards 2e9b1a174c3 [AArch64] Rework interface to add constant/offset routines discards 79642b84ff3 [From upstream] Jeff's stack-clash patch for AArch64 discards 3a93390b7e6 Add support for adjusting the number of units in a mode discards dcfdd7d6467 Add support for MODE_VECTOR_BOOL discards 7182cb5f083 poly_int: GET_MODE_SIZE discards 39285764f6c poly_int: GET_MODE_BITSIZE discards 6cec38afc37 poly_int: expand_assignment discards a0debf7ec53 poly_int: GET_MODE_PRECISION discards 6baf2e2fe83 poly_int: TYPE_VECTOR_SUBPARTS discards 8e6b1eca6b5 poly_int: vect_permute_load/store_chain discards 789f6b91dc0 poly_int: GET_MODE_NUNITS discards 7a247ba7553 poly_int: memrefs_conflict_p discards a3458c5caa5 poly_int: struct_value_size discards 4127b32fb3a poly_int: load_register_parameters discards 95b251a5fbb poly_int: alter_reg discards 9143cc0f5dd poly_int: reloading complex subregs discards 59492057f2a poly_int: process_alt_operands discards aab0cb88711 poly_int: expand_ifn_atomic_compare_exchange_into_call discards 7ed2825b16e poly_int: adjust_mems discards da4a97d71b6 poly_int: PUSH_ROUNDING discards c75497570e5 poly_int: emit_single_push_insn_1 discards 2e18958dcb6 poly_int: set_inc_state discards c63b8788e65 poly_int: expand_expr_real_1 discards be71552ef78 poly_int: expand_expr_real_2 discards 27bb5d5f3b5 poly_int: subreg_get_info discards 4121408e80e poly_int: REGMODE_NATURAL_SIZE discards 551332fadf5 poly_int: expand_vector_ubsan_overflow discards e43ee15bcce poly_int: folding BIT_FIELD_REFs on vectors discards bb34b11c441 poly_int: fold_indirect_ref_1 discards e5d5b363491 poly_int: omp-simd-clone.c discards aab037fa53f poly_int: brig vector elements discards def89a92d5f poly_int: tree-vect-generic.c discards f5d7dace036 poly_int: vect_no_alias_p discards fb3ed4197b0 poly_int: two-operation SLP discards 67339f0b175 poly_int: vect_get_constant_vectors discards 56adec7035e poly_int: vectorizable_conversion discards 09eb10da463 poly_int: vectorizable_simd_clone_call discards 7d5b504d294 poly_int: vectorizable_call discards e4022aca31a poly_int: vectorizable_load/store discards d66e7d34792 poly_int: vectorizable_live_operation discards c7d327d4ca7 poly_int: vectorizable_induction discards 8607f635196 poly_int: vectorizable_reduction discards 6bff9ae5cbc poly_int: vector_alignment_reachable_p discards ecf3d5d3165 poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECT [...] discards 16323d7b130 poly_int: get_mask_mode discards 8eef234ad63 poly_int: omp_max_vf discards 410a8d57e5a poly_int: vect_nunits_for_cost discards 9b015cede28 poly_int: SLP max_units discards 0b2c81b2609 poly_int: vectoriser vf and uf discards 6220438247c poly_int: prune_runtime_alias_test_list discards b8fdf09543c poly_int: compute_data_ref_alignment discards c5f60ed976d poly_int: loop versioning threshold discards aa6fa7341d1 poly_int: tree-ssa-loop-ivopts.c:iv_use discards 2a5a4116675 poly_int: get_binfo_at_offset discards 66123324e51 poly_int: build_ref_for_offset discards bf21c3a9326 poly_int: MEM_REF offsets discards 6d7f1313bb9 poly_int: find_bswap_or_nop_load discards 009a3b18f65 poly_int: adjust_ptr_info_misalignment discards ae9ab474cd8 poly_int: decode_addr_const discards 4d1764c45c4 poly_int: bit_field_size/offset discards 7750e4b7ad9 poly_int: emit_group_load/store discards bd77232f7d0 poly_int: reload<->ira interface discards b62e016029e poly_int: emit_inc discards 4fd7633eaf3 poly_int: cfgexpand stack variables discards e90ee8159f0 poly_int: argument sizes discards aa48b83086c poly_int: instantiate_virtual_regs discards 2bed118cde7 poly_int: REG_ARGS_SIZE discards e4015cebbaf poly_int: push_block/emit_push_insn discards ad9738074ce poly_int: frame allocations discards 952a9f436ae poly_int: reload1.c discards 760781a9c5e poly_int: reload.c discards 05ae28fae17 poly_int: get_inner_reference & co. discards 6bdc5778dcb poly_int: fold_comparison discards 7cd39457cec poly_int: get_bit_range discards a02f4ae414d poly_int: mem_valid_for_store_merging discards 6436a841729 poly_int: get_object_alignment_2 discards ce1b5ac5486 poly_int: expand_debug_expr discards 4919a6d4f1a poly_int: get_inner_reference_aff discards 819371f29cf poly_int: pointer_may_wrap_p discards 15a9e18ab9b poly_int: symbolic_number discards da5e65aea2a poly_int: aff_tree discards a0d48c5f46d poly_int: get_addr_unit_base_and_extent discards 82d06fc26a8 poly_int: get_ref_base_and_extent discards 24b1446a9d0 poly_int: ipa_parm_adjustment discards deec226867e poly_int: DWARF CFA offsets discards 6072f1d3062 poly_int: operand_subword discards d2f20c32c96 poly_int: SUBREG_BYTE discards eb06e154368 poly_int: ira subreg liveness tracking discards 78291461471 poly_int: store_field & co discards 651249da282 poly_int: C++ bitfield regions discards a3a73578506 poly_int: extract_bit_field bitrange discards 51ac6037d85 poly_int: store_bit_field bitrange discards 77b4932e7f2 poly_int: lra frame offsets discards 5b2db963aaf poly_int: MEM_OFFSET and MEM_SIZE discards eea43b80072 poly_int: rtx_addr_can_trap_p_1 discards 5a57b00dcf5 poly_int: dse.c discards b84d7e9ffde poly_int: ao_ref and vn_reference_op_t discards 69005a9ebc4 poly_int: indirect_refs_may_alias_p discards 9e7fe90bb59 poly_int: same_addr_size_stores_p discards ba00a63c97b poly_int: fold_ctor_reference discards 9044e2c7fc9 poly_int: DWARF locations discards 952c9ddbc99 poly_int: REG_OFFSET discards 1ca45b46897 poly_int: TRULY_NOOP_TRUNCATION discards cc808d30c22 poly_int: create_integer_operand discards 02970a70cbe poly_int: dump routines discards 608dfa8f8ad poly_int: tree constants discards 9d2e9a3319a poly_int: rtx constants discards 905076749b3 poly_int: mode query functions discards c623a95aea2 poly_int: MACRO_MODE discards 7f1548a7091 poly_int: IN_TARGET_CODE discards 408c652f2ca poly_int: add poly-int.h discards d66f17b71c8 Make dse.c use offset/width instead of start/end discards 169e43d5e5f Minor vn_reference_lookup_3 tweak discards 79792547bc6 Add helpers for shift count modes discards 72fc5b3614c Add a fixed_size_mode_pod class discards 1d76b030d60 Add unique CONSTs discards b31fd2f7df0 Add VEC_SERIES_{CST,EXPR} and associated optab discards bbadb2d171a Add VEC_DUPLICATE_{CST,EXPR} and associated optab discards e0a1263f94c match.pd handling of three-constant bitops discards e788f0c3fca Base subreg rules on REGMODE_NATURAL_SIZE rather than UNITS [...] discards bb3a153866a Use partial_subreg_p in curr_insn_transform discards 0b0d050a69f [AArch64] Extra scalar_float_mode patch discards 3ec47a66856 Protect second call to extract_range_from_multiplicative_op_1 discards 77f7f1c771f [AArch64] Tweak aarch64_classify_address interface discards 652273b8fe0 Document machine_mode wrapper classes discards 2bddf6a5e9b :: wide-int.h speed-up discards 09c0b6ecc77 Add an alternative vector loop iv mechanism discards f2ecf0adff7 [AArch64] Use aarch64_reg_or_imm instead of nonmemory_operand discards 2d7190b2857 tree-data-ref.c evolution_function_right_is_integer_cst discards 881b201d81b [AArch64] Handle CONST_WIDE_INT in movti discards 048a8740a43 Rework vrp_int_const_binop interface discards 1623c4f1b68 PR82816: Widening multiplies of bitfields adds b2275574318 2017-11-04 Thomas Koenig tkoenig@gcc.gnu.org adds ce07d3ce53a 2017-11-04 Thomas Koenig tkoenig@gcc.gnu.org adds 711a520c401 gcc/fortran/ChangeLog: adds c76a96ef4f7 2017-11-04 Andreas Tobler andreast@gcc.gnu.org adds 131588872d8 PR target/82002 Part 2: Correct non-immediate offset/invalid INSN adds 88b09bac9b4 Daily bump. adds d5fd76b6ea1 RISC-V: Set SLOW_BYTE_ACCESS=1 adds 43906e418fe RISC-V: If -m[no-]strict-align is not passed, assume its va [...] adds b0cb9599eed RISC-V: Emit "i" suffix for instructions with immediate operands adds 1672bf66952 [libsanitizer] Remove semicolon after do {} while (0) in ma [...] adds 06555bd0688 [libquadmath] Remove semicolon after do {} while (0) in MPN [...] adds fa57650a068 [graphite] Remove semicolon after do {} while (0) in DEBUG_PRINT adds 0944531e869 [fortran] Remove semicolon after do {} while (0) in match macros adds 6394b15597e Remove semicolon after ASM_OUTPUT_BEFORE_CASE_LABEL macro body adds 0882c4f5bd3 [libcpp] Remove semicolon after do {} while (0) in BUF_APPEND adds 2467912c810 Remove semicolon after do {} while (0) in DEF_SANITIZER_BUILTIN adds 1784439f125 * doc/xml/manual/abi.xml: Move docs.oracle.com references [...] adds cc5943136cc 2017-11-05 Paul Thomas pault@gcc.gnu.org adds 27146a8d6a6 2017-11-05 Paul Thomas pault@gcc.gnu.org adds 44319903056 2017-11-05 Thomas Koenig tkoenig@gcc.gnu.org adds 3366b41ee7a Daily bump. adds 6753d6c7a47 Rework vrp_int_const_binop interface adds 2fb20ba2e4f Instrument function exit with __builtin_unreachable in C++ adds 0d27af05655 Fix all tests that fail with -sanitize=return. adds d11af473850 rs6000: Implement insn_cost for mfcr, mfcrf adds 144be26359a Fix test-suite fallout of default -Wreturn-type. adds baf9f855777 2017-11-06 Paul Thomas pault@gcc.gnu.org adds 3f6f41de887 /libcpp 2017-11-06 Mukesh Kapoor mukesh.kapoor@oracle.com adds 3f03d983326 [testsuite] Fix directives order adds 2df5a3822c0 [ARM] PR 67591 ARM v8 Thumb IT blocks are deprecated part 2 adds cfee5dd7212 * gnat.dg/gcov: New directory. * gnat.dg/gcov/gcov.exp: N [...] adds c252b504244 2017-11-06 Paolo Carlini paolo.carlini@oracle.com adds c194b74370a Fix -Wreturn-type fallout. adds 84895d28940 PR bootstrap/82832 * ipa-inline-transform.c (update_noncl [...] adds 0ed49ed9930 [gcc] adds f90f6ff196b PR82816: Widening multiplies of bitfields adds 0d6b5601943 Check in right version of stack-check-12.c adds da01f98cc89 PR target/82788 * config/i386/i386.c (PROBE_INTERVAL): Re [...] adds ad3e5b2fd72 PR tree-optimization/82838 * gimple-ssa-store-merging.c [...] adds a450b6524c7 ipa-fnsummary.c: fix use-after-free crash (PR jit/82826) adds 1862103ac8d * gcc-interface/misc.c (gnat_post_options): Clear warn_ret [...] adds b26b230884b * collect2.c (add_lto_object): Compile for OBJECT_COFF. (sc [...] adds 44de00a1636 /cp 2017-11-06 Paolo Carlini paolo.carlini@oracle.com adds 822daf91da9 [gcc] 2017-11-06 Michael Meissner meissner@linux.vnet.ibm.com adds 8bdfd6ed739 [Arm] Cleanup IT attributes adds 14aaf770aee gcc/ChangeLog: adds 6d468e2e22a Fix ChangeLog entry adds 94bd6cb36bc [AArch64] Add an endian_lane_rtx helper routine adds 82da56a3bef [AArch64] Pass number of units to aarch64_reverse_mask adds abeff20d612 [AArch64] Pass number of units to aarch64_simd_vect_par_cnst_half adds b0cebee7a42 [AArch64] Pass number of units to aarch64_expand_vec_perm(_const) adds 2da56ec4c3f libgo: pass flags to recursive make adds 1bcc0df0965 compiler: disable escape analysis for runtime adds beb2371021a 2017-11-06 François Dumont fdumont@gcc.gnu.org adds 774d14bdc56 Update comment in tree-vrp.h adds 9a0bd5be062 * gcc.target/i386/stack-check-12.c: Revert to initial vers [...] adds 79e3681d1c9 i386: Use reference of struct ix86_frame to avoid copy adds 07e589ad5b7 Daily bump. adds 278d1390166 FT32 makes use of multiple address spaces. When trying to i [...] adds 8efdc8231c7 rs6000: Don't clear TARGET_ISEL implicitly adds 71ff36bcc36 Require ngettext in test of system gettext implementation adds 5753ddf9a0c P0704R1 - fixing const-qualified pointers to members adds 1ad21aef660 [libgcc] Remove semicolon after do {} while (0) in FP_HANDL [...] adds 47d88ce9851 [arm] Remove semicolon after while {} do (0) in HANDLE_NARR [...] adds bdcb436d256 [libgcc, rs6000] Remove semicolon after do {} while (0) in [...] adds cf10ab95d29 [rs6000] Remove semicolon after do {} while (0) in SUBTARGE [...] adds 3a999d8e37c [powerpcspe] Remove semicolon after do {} while (0) in SUBT [...] adds c3aa270e6bb More fold_negate in match.pd adds 270a468f4bb More bitop simplifications in match.pd adds a6eef1eda47 PR80131: Simplification of 1U << (31 - x) adds 081337d3298 PR71026: Canonicalize negates in division adds 12f26ffdef5 2017-11-07 Richard Biener rguenther@suse.de adds 0a1e59e30f4 [AArch64] Use aarch64_reg_or_imm instead of nonmemory_operand adds 79b94e462f8 RISC-V: Define MUSL_DYNAMIC_LINKER adds 8986a29776a RISC-V: Implement movmemsi adds a3fc216d05c * g++.dg/pr50763-3.C (evalPoint): Return a value. adds f0096913e8c PR c/53037 * stor-layout.c: Include attribs.h. (handle_w [...] adds 788d31c2b22 compiler: don't double count "." in nested_function_num adds e38a59fc74f PR target/80425 * config/i386.i386.md (*zero_extendsidi2) [...] adds 4238f97aedb Check for S_ISSOCK before use adds d4e677bf36a Fix SSE bits dependencies. adds 831ef837c6c rs6000: Use isel for the cstore patterns adds 6ca3dec93cd PR target/82855 * config/i386/i386.c (ix86_swap_binary_op [...] adds 350d1b5f180 PR target/82855 * config/i386/i386.md (SWI1248_AVX512BWDQ [...] adds c06d7bdd817 PR c++/82835 * cp-gimplify.c (cxx_omp_clause_apply_fn): F [...] adds 482ccb7ff6e [PATCH] Install cp/operators.def as part of plugin headers adds 94e5ea9f51e * gimple-pretty-print.c (dump_profile): Return "" instead [...] adds b67d074d91b Daily bump. adds b705676e476 analyze_brprob.py: fix SI units adds 48c0759895a PR bootstrap/82670 * ubsan/Makefile.am (ubsan_files): Rem [...] adds 20082e09f0a Fix fallthrough attribute ignorance w/ -fsanitize=address ( [...] adds 4a190f0d348 [mips] Remove semicolon after do {} while (0) in ASM_OUTPUT [...] adds df82c702948 [mips] Wrap ASM_OUTPUT_LABELREF in do {} while (0) adds 8a0a7118e9f Fix -Wreturn-type fallout in g++.old-deja/g++.brendan/asm-extn1.C adds f5df52e4790 * gcc.dg/strlenopt-33g.c: Remove duplicate dg-do command. adds 116deb8c902 Simplify call of gimple_call_internal_p. adds 31311a123ee Fix vrp101.c test-case. adds 4c796f543f5 PR 82869 Introduce logical_type_node and use it adds 97c859785e6 2017-11-08 Yannick Moy moy@adacore.com adds 83ce95514fc 2017-11-08 Arnaud Charlet charlet@adacore.com adds ee3a1793e21 * c-c++-common/torture/aarch64-vect-lane-2.c (search_line_ [...] adds 29484d709e3 2017-11-08 Hristian Kirtchev kirtchev@adacore.com adds cfd0a3db624 gcc/ada/ adds 3573119ec41 [AArch64] Remove aarch64_frame_pointer_required adds 102642a22cd [AArch64] Simplify aarch64_can_eliminate adds 3e3c72d45fd 2017-11-08 Piotr Trojanek trojanek@adacore.com adds c35548ce9b6 PR tree-optimization/78821 * gimple-ssa-store-merging.c ( [...] adds 2dbef92e83b * g++.dg/pr57878.C (__sso_string_base::_M_get_allocator): [...] adds e81f4fdaca5 2017-11-08 Piotr Trojanek trojanek@adacore.com adds 93230fa5507 2017-11-08 Piotr Trojanek trojanek@adacore.com adds 0d6ffbcc286 2017-11-08 Piotr Trojanek trojanek@adacore.com adds bf5009ccd30 2017-11-08 Piotr Trojanek trojanek@adacore.com adds 68f5ac985f7 2017-11-08 Piotr Trojanek trojanek@adacore.com adds 372381400ad 2017-11-08 Piotr Trojanek trojanek@adacore.com adds 64421398fba gcc/ada/ adds 484268ccfaf 2017-11-08 Piotr Trojanek trojanek@adacore.com adds 0486c1119ee 2017-11-08 Piotr Trojanek trojanek@adacore.com adds d07035daf0a 2017-11-08 Piotr Trojanek trojanek@adacore.com adds 64c8a7d0e47 Simplify vec_merge of vec_duplicate with const_vector adds 2c29869d8e6 vec_merge + vec_duplicate + vec_concat simplification adds 9bffba28176 [simplify-rtx] Simplify vec_merge of vec_duplicates into ve [...] adds 31a46cbd21e [AArch64] Add STP pattern to store a vec_concat of two 64-b [...] adds 4f2d7bcb6cd PR target/82855 * config/i386/sse.md (<avx512>_eq<mode>3< [...] adds 18017490853 2017-11-08 Steven G. Kargl kargl@gcc.gnu.org adds 5e8f7c2aef9 RISC-V: Fix build error adds e9cc5c615bf 2017-11-08 Steven G. Kargl kargl@kgcc.gnu.org adds 564828c811e Daily bump. adds 37db795769b Add option to force indirect calls for x86 adds f5f219fdb75 PR debug/82837 * dwarf2out.c (const_ok_for_output_1): Rej [...] adds a82502ddf80 GCOV: support multiple functions per a line (PR gcov-profil [...] adds 8a56eb98560 2017-11-09 Piotr Trojanek trojanek@adacore.com adds 4277e5bb8c1 2017-11-09 Jerome Lambourg lambourg@adacore.com adds 1e3d450ff19 Remove non needed check in bmp_iter_set_init (PR tree-optim [...] adds 54a4cafdfd9 gcc/ada/ adds c70806b05a6 2017-11-09 Piotr Trojanek trojanek@adacore.com adds 5bb74b9978a 2017-11-09 Yannick Moy moy@adacore.com adds d34adbf9bb1 gcc/ada/ adds c930fde510c 2017-11-09 Javier Miranda miranda@adacore.com adds 40771d7e1d4 2017-11-09 Pascal Obry obry@adacore.com adds 15b08c01c81 Initialize split_branch_probability (PR target/82863). adds 225b9a4047b 2017-11-09 Richard Biener rguenther@suse.de adds 912e88cc1ff 2017-11-09 Yannick Moy moy@adacore.com adds d39570ea4d4 2017-11-09 Javier Miranda miranda@adacore.com adds 01708e7d9be 2017-11-09 Ed Schonberg schonberg@adacore.com adds 871a91ec494 * gimple-ssa-store-merging.c (count_multiple_uses): New fu [...] adds f7c9b330bad 2017-11-09 Ed Schonberg schonberg@adacore.com adds 12b25483ace 2017-11-09 Jerome Lambourg lambourg@adacore.com adds 371858d4588 PR ipa/82879 * ipa-inline-transform.c (update_noncloned_f [...] adds 44ce7b27194 Base subreg rules on REGMODE_NATURAL_SIZE rather than UNITS [...] adds 73776e8826a Improve ivopts handling of forced scales adds 67c52133827 Be stricter about CONST_VECTOR operands adds ef52b407e3d 2017-11-09 Gary Dismukes dismukes@adacore.com adds ba40535e94e Consistently use asm volatile ("" ::: "memory") in vect tests adds 237c84725be Add VECTOR_BITS to tree-vect.h adds 50cdfec076e Add available_vector_sizes to target-supports.exp adds 1f0a8d0e11b Don't assume vect_multiple_sizes means 2 sizes adds ae2348af52b Add vect_perm3_* target selectors adds dc32d9e8c02 Add a vect_element_align_preferred target selector adds 6f72aad88b0 Add a vect_unaligned_possible target selector adds c36e5a0cb8d Add a vect_variable_length target selector adds dc1a4942e17 Add a vect_align_stack_vars target selector adds 3f7db034374 Add a vect_masked_store target selector adds ac762bff9b5 Moving parameter manipulation into its own file adds bc889798b8f rs6000: Separate shrink-wrapping for the TOC register adds 7be21691c63 * gnat.dg/controlled2.adb, gnat.dg/controlled4.adb, gnat. [...] adds 1b836787bea [ARM] Fix cmse_nonsecure_entry return insn size adds 3694cc8d718 * bb-reorder.c (max_entry_frequency): Remove. (find_trace [...] adds a8a34408b00 Remove obsolete ECOFF support. adds 515b20f202a 2017-11-09 Steven G. Kargl kargl@gcc.gnu.org adds 67c0e9f5bd6 2017-11-09 Paul Thomas pault@gcc.gnu.org adds 832a73b93a2 * gimple-ssa-store-merging.c (struct store_immediate_info) [...] adds eeca2a437d4 sync/atomic, runtime/internal/atomic: don't assume read [...] adds 021f9aecca3 * tree-vrp.c (set_value_range): Do not reference vrp_equiv [...] adds 03a28fc2e61 * tree-vrp.c (vrp_prop): Move class to earlier point in th [...] adds 8302eff5aab * vr-values.h: New file with vr_values class. * tree-vrp. [...] adds 80c1d5061d4 PR rtl-optimization/82913 * compare-elim.c (try_merge_com [...] adds 642c24989f3 Daily bump. adds 70d9bf4cc20 * gcc-interface/utils.c (convert) <RECORD_TYPE>: Add comme [...] adds 04915125c51 Update copyright years adds 63f43b8f93a [testsuite] Fix retrieval of testname adds 9fead2aba03 PR bootstrap/82916 * gimple-ssa-store-merging.c (pass_st [...] adds 7513b8d6093 2017-11-10 Paul Thomas pault@gcc.gnu.org adds f7b2503ad70 * tree-predcom.c (determine_roots_comp): Avoid memory leak [...] adds 430a6bc45d1 [ARM,testsuite] Skip copysign_softfloat_1.c on hard-float targets adds fa6f8ae7f11 GCOV: do not support unexecuted blocks in Ada adds aa0a1d29145 PR tree-optimization/82929 * gimple-ssa-store-merging.c ( [...] adds a277f643ee5 GCOV: create one intermediate file per a gcno file (PR gcov [...] adds d8aad7864e5 PR c/81117 - Improve buffer overflow checking in strncpy adds 53158c03bac * rs6000/power9.md (power9-qpdiv): Correct DFU pipe usage. [...] adds 492dec71d4b 2017-11-10 Tamar Christina tamar.christina@arm.com adds d75a1fe3e22 [testsuite/ARM] Consolidate sources for cmse tests adds 3b9c5312cc8 GFNI enabling [3/4] adds 8e6ad9b90ff * gcc.target/i386/force-indirect-call-1.c: Merge scan stri [...] adds 151b9ff52a0 * auto-profile.c (afdo_indirect_call): Drop frequency. * [...] adds 9f06171a8d6 PR libstdc++/82917 add missing returns in <fstream> adds 9c015ccf232 * vr-values.h (VR_INITIALIZER): Move #define here. * gimp [...] adds a0a0ccef318 Add plugin API for processing plugin-added input files. adds 6316a88b427 gcc/ChangeLog: adds 5a259d5dc99 Fix my last ChangeLog entry adds 5e5f9f630ef [gcc] 2017-11-10 Michael Meissner meissner@linux.vnet.ibm.com adds 34359dd9af9 Minor tweak to libstdc++ testsuite helper type adds d3111d8b85a Daily bump. adds c885c55e4cb 2017-11-10 Fritz Reese fritzoreese@gmail.com adds d96568f868c Remove ada/ prefix adds a24ec2e3b40 * tree-ssa-tail-merge.c (replace_block_by): Fix and re-ena [...] adds cc66203ffa8 * predict.c (maybe_hot_frequency_p): Do not use cfun. adds b6f13dccc9c * predict.c (maybe_hot_frequency_p): Do not use cfun. adds 52ad2ea2f19 * tree-ssa-loop-im.c (execute_sm_if_changed): Do not compu [...] adds db832455fa3 Add forgotten tests. adds c8c1b51f850 PR bootstrap/82948 - prefix.c:202:15: error: 'char* strncpy [...] adds d16ea7ed6d7 gcc/ChangeLog: adds 179137d8088 2017-11-11 Janus Weil janus@gcc.gnu.org adds 32302ca7ea3 Daily bump. adds 666598253c3 [cr16, powerpcspe, rs6000] Remove semicolon after ASM_OUTPU [...] adds 45fe1f46c13 Remove semicolon after ASM_OUTPUT_ASCII adds 7fbc9a6bcac [riscv] Wrap ASM_OUTPUT_LABELREF in do {} while (0) adds 145085d1bba Daily bump. adds ff94dc1e913 [AArch64] More aarch64_endian_lane_rtx adds 950ddbd7c12 PR tree-optimization/82954 * gimple-ssa-store-merging.c [...] adds 457c9288ec3 GCOV: introduce global vector of functions adds d93799f5b09 GCOV: simplify usage of function_info::artificial. adds 67da56f6703 GCOV: introduce vector for function_info::counts. adds 98888fd6d90 GCOV: remove typedef for function_t adds 6f93d61e9f5 GCOV: remove typedef for arc_t adds 07f3f54d1e4 GCOV: remove typedef for block_t adds 7ea14e0563d GCOV: remove typedef of coverage_t. adds 9deedf62e20 PR tree-optimization/78821 * gimple-ssa-store-merging.c ( [...] adds 4194a7134b6 [Documentation] Fix latency in pipeline description example adds 54ff80fc680 gcc/testsuite/ChangeLog: adds 786bf3ad556 [Diagnostic Patch] don't print column zero adds 645df0968c8 [ARM] Fix more -Wreturn-type fallout (gcc.target/arm/pr67989.C). adds cbf33885f54 Remove the null check from placement new in all modes adds 7c3432355e5 * cgraph.c (cgraph_edge::sreal_frequency): New function. [...] adds fa48a8cb7c3 PR lto/81351 * debug.h (dwarf2out_do_eh_frame): Declare. [...] adds 74052a2ca86 * tree-ssa-sink.c (select_best_block): Do not use frequencies. adds fdd2edb60ca * tree-ssa-coalesce.c (coalesce_cost): Fix formating. adds 7c520377936 PR lto/81351 * dwarf2out.c (do_eh_frame): New static vari [...] adds 7d3df64afa2 [gcc] 2017-11-13 Michael Meissner meissner@linux.vnet.ibm.com adds e80defd5218 libcpp: move line typedef and column-numbering comment to t [...] adds f9afdf2410c gcc/ChangeLog: adds 86136db8efd Implement __VA_OPT__ adds c36e63fe2b7 PR c++/82360 - ICE with static_cast in template. adds e6b3d9d035d Fix cp-ubsan typo. adds 0744a0c1155 Defer folding of *&. adds 297de7bc513 Capture adjustments for P0588R1. adds d2379ecb10d gcc/ChangeLog: adds 130d965a049 Daily bump. adds f1e4e020706 2017-11-13 Fritz Reese fritzoreese@gmail.com adds bfb98797bdd * ipa-split.c (struct split_point): Add count. (consider_ [...] adds 7172e2535ba * bb-reorder.c: Remove frequencies from comments. (better [...] adds 43b5d0a6e59 Require alloca for c-c++-common/Wstringop-truncation.c adds 265f28844fb Allow asyncwait-1.c to run for non-nvidia devices adds 003dce4b04b * ipa-inline.c (compute_uninlined_call_time, compute_inlin [...] adds 688b6bc6943 * auto-profile.c (afdo_annotate_cfg): Use update_max_bb_co [...] adds 216fc1bb7d9 * tracer.c (better_p): Do not compare frequencies. * reg- [...] adds 6b254488f61 [Patch AArch64] Stop generating BSL for simple integer code adds bf1eb034ff2 libgo: adapt Solaris 12 references adds 53fe6e2f226 2017-11-14 Richard Biener rguenther@suse.de adds 8bcf938222f Support GTY((cache)) on hash_map. adds bb0c64ded24 gcc/ChangeLog: adds 39df2b8e0f2 Fix typo in std::wbuffer_convert adds 5fc3192fabe Implement LWG 2733 and LWG 2759 adds 9273bda788a Adapt Solaris 12 references adds 453addb7cff * ipa-inline.c (edge_badness): Dump sreal frequency. (com [...] adds 36b59a3c3c9 * tree-ssa-threadupdate.c (compute_path_counts): Remove u [...] adds a192d26f0ac [gcc] 2017-11-14 Michael Meissner meissner@linux.vnet.ibm.com adds 126d37bd6b9 2017-11-14 Michael Meissner meissner@linux.vnet.ibm.com adds 540b351f287 Daily bump. adds 94d86adc323 * vr-values.c: New file with contents extracted from tree- [...] adds 7af8e400b3b compiler: remove LHS/RHS context determination for var exprs adds aac64699884 Add __builtin_tgmath for better tgmath.h implementation (bu [...] adds 61f2f61b16a Use compare-debug for bootstrap-debug-lean to ignore != DW_ [...] adds d3e88495d5a introduce TDF_compare_debug, omit OBJ_TYPE_REF casts with it adds b0915eb6736 * tree-ssa-threadupdate.c (thread_through_all_blocks): Thr [...] adds 0618a201f59 * explow.c (anti_adjust_stack_and_probe_stack_clash): Avoi [...] adds f1278899f01 Zero vptr in dtor for -fsanitize=vptr. adds 0afa0621c33 Use proper probability (PR target/82927) adds 17187f6a206 Coverage: remove -fkeep-inline-functions from coverage_flags. adds 6c973fb9dd8 PR tree-optimization/82977 * tree-ssa-strlen.c (strlen_op [...] adds 52a1f3ab417 PR target/82981 * internal-fn.c: Include gimple-ssa.h, tr [...] adds 65b9c4b5c20 [AArch64] Improve scheduling model for X-Gene adds 1ea1a3dfe94 Fix -Wreturn-type fallout in g++.dg/cpp0x/rv-trivial-bug.C [...] adds 54a10b6509e * MAINTAINERS (write after approval): Add myself. adds 3912d56846a Fix PR82941 and PR82942 by adding proper vzeroupper generat [...] adds 8b72061f8c1 Disable -Wreturn-type by default in all languages other from C++. adds ef60df19493 Fix fallout of -fsanitize=vptr. adds cf7b71bf034 2017-11-15 Richard Biener rguenther@suse.de adds d46b9539e69 [PR c++/81574] lambda capture of function reference adds c3c1d7930f1 Add libgomp.oacc-c-c++-common/f-asyncwait-{1,2,3}.c adds 4973689ee6b 2017-11-15 Dominique d'Humieres dominiq@lps.ens.fr adds 11ca88d1902 Compile strncpy-fix-1.c with -Wno-stringop-truncation adds 9d1de2343f1 [ARM] Fix more -Wreturn-type fallout adds eaddab26531 RISC-V: Add Jim Wilson as a maintainer adds dbdefcfc648 2017-11-15 Tamar Christina tamar.christina@arm.com adds d0ec0d75fb7 2017-11-15 Tamar Christina tamar.christina@arm.com adds b63803a89bf PR tree-optimization/82726 Revert 2017-01-23 Bin Cheng [...] adds e02e28c43a7 PR tree-optimization/82726 PR tree-optimization/70754 * [...] adds 7aa110c73cd Add noexcept to generic std::size, std::empty and std::data adds a20f0c5030d 2017-11-15 Steven G. Kargl kargl@gcc.gnu.org adds f8cecb346dd Minor improvements to Filesystem tests adds 306fcaa5a7b 2017-11-15 Will Schmidt will_schmidt@vnet.ibm.com adds 39ecc7271a4 i386: Add X86_TUNE_EMIT_VZEROUPPER adds fec9f3ccaf4 Move gcc/testsuite entries to gcc/testsuite/ChangeLog adds ffa12318e54 Fix gcd breakage. * include/std/numeric (gcd): Use remove_c [...] adds 6e445920e7c PR testsuite/82988 - g++.dg/cpp0x/lambda/lambda-switch.C fail adds 3ef84acc081 [gcc] adds 28f936bc6c9 * config/i386/i386.c (x86_print_call_or_nop): Emit 5 byte [...] adds f240266fc98 Daily bump. adds 6f71ee60374 * include/std/numeric (gcd): Fix typo. adds 6fb033ac0e2 GFNI enabling [4/4] adds 68a8f795e6b Enable VBMI2 support [1/7] adds 50221fae802 Fix GFNI check which didn't work properly in gfni+sse case new 7035b82977f [AArch64] Handle CONST_WIDE_INT in movti new 868679609a2 tree-data-ref.c evolution_function_right_is_integer_cst new 0251c1c7577 Add an alternative vector loop iv mechanism new e3e6fba7074 :: wide-int.h speed-up new 2b535b1704d Document machine_mode wrapper classes new d8371ceb825 [AArch64] Tweak aarch64_classify_address interface new 4204f87cf54 Protect second call to extract_range_from_multiplicative_op_1 new f7a004ccf8e [AArch64] Extra scalar_float_mode patch new 42d2a35d077 Use partial_subreg_p in curr_insn_transform new 50a8632437e match.pd handling of three-constant bitops new 6457b122f70 Add VEC_DUPLICATE_{CST,EXPR} and associated optab new ef3fab6687b Add VEC_SERIES_{CST,EXPR} and associated optab new ba7195ed9d1 Add unique CONSTs new 98f6f61d885 Add a fixed_size_mode_pod class new 54f4b6ddb0c Add a gen_int_shift_amount helper function new 96343194906 Minor vn_reference_lookup_3 tweak new a2f257890b8 Make dse.c use offset/width instead of start/end new 82f442fbeb4 poly_int: add poly-int.h new fe76700a5d0 poly_int: IN_TARGET_CODE new f8c9cbd79b5 poly_int: MACRO_MODE new 64599863c55 poly_int: mode query functions new 8ea80a7fef9 poly_int: rtx constants new fa93dd530ad poly_int: tree constants new 7fbf1169144 poly_int: dump routines new 14d7a13cf7d poly_int: create_integer_operand new b0649317c30 poly_int: TRULY_NOOP_TRUNCATION new ac884131496 poly_int: REG_OFFSET new dee3ca55905 poly_int: DWARF locations new 0c7931e30aa poly_int: fold_ctor_reference new 6b762d99348 poly_int: same_addr_size_stores_p new a308a57bbd7 poly_int: indirect_refs_may_alias_p new 5ec253e1ada poly_int: ao_ref and vn_reference_op_t new 5de5aaf8efc poly_int: dse.c new 6a200e4bf96 poly_int: rtx_addr_can_trap_p_1 new 8554fff498f poly_int: MEM_OFFSET and MEM_SIZE new 9c9e80cc803 poly_int: lra frame offsets new 9f917f7a2b8 poly_int: store_bit_field bitrange new 6339cf4abbe poly_int: extract_bit_field bitrange new b785ca91087 poly_int: C++ bitfield regions new b3aa64d63ec poly_int: store_field & co new 8e27e895f0f poly_int: ira subreg liveness tracking new dcc81489251 poly_int: SUBREG_BYTE new bc7a0fecffe poly_int: operand_subword new 0ef1c86c040 poly_int: DWARF CFA offsets new cc4703a270c poly_int: ipa_parm_adjustment new 3ea5c81a1dc poly_int: get_ref_base_and_extent new 388c26dabd8 poly_int: get_addr_unit_base_and_extent new 52f65b12b16 poly_int: aff_tree new 22b4dc9eb11 poly_int: symbolic_number new db168dc362c poly_int: pointer_may_wrap_p new e68ae1c6edf poly_int: get_inner_reference_aff new 592d5ec2c5a poly_int: expand_debug_expr new da1273dbea5 poly_int: get_object_alignment_2 new 851bba67045 poly_int: store merging new fc7c62d33a7 poly_int: get_bit_range new 3a469367255 poly_int: fold_comparison new ae8ec9e1ec2 poly_int: get_inner_reference & co. new 035c291e428 poly_int: reload.c new 6d9d12bf07c poly_int: reload1.c new 0465f2eac21 poly_int: frame allocations new ba368461e21 poly_int: push_block/emit_push_insn new 6f3126e52ef poly_int: REG_ARGS_SIZE new a7e8ecfb220 poly_int: instantiate_virtual_regs new f9b82093f3b poly_int: argument sizes new c99752b307a poly_int: cfgexpand stack variables new 489f3806d1d poly_int: emit_inc new a8c37a55398 poly_int: reload<->ira interface new ccea39a77a1 poly_int: emit_group_load/store new 0f48e6cb81a poly_int: bit_field_size/offset new efa19b20434 poly_int: decode_addr_const new 8826b171dd5 poly_int: adjust_ptr_info_misalignment new 9160808d086 poly_int: find_bswap_or_nop_load new 3f4eb361dcc poly_int: MEM_REF offsets new aa12b1bc0f8 poly_int: build_ref_for_offset new 69eae67e139 poly_int: get_binfo_at_offset new e28b129a3e8 poly_int: tree-ssa-loop-ivopts.c:iv_use new 841418717f4 poly_int: loop versioning threshold new 240aaab179c poly_int: compute_data_ref_alignment new 09a96f5c49e poly_int: prune_runtime_alias_test_list new e676a00c906 poly_int: vectoriser vf and uf new 650d9158bb4 poly_int: SLP max_units new c4b4275c1a0 poly_int: vect_nunits_for_cost new 0d454fa8025 poly_int: omp_max_vf new eede6484dfd poly_int: get_mask_mode new e06006494de poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECT [...] new adfaad5b97c poly_int: vector_alignment_reachable_p new cfe3d7ff5d7 poly_int: vectorizable_reduction new 2d263ffc7c3 poly_int: vectorizable_induction new 468aef585dc poly_int: vectorizable_live_operation new 56fea32e355 poly_int: vectorizable_load/store new e5e4950e6a5 poly_int: vectorizable_call new 78912675433 poly_int: vectorizable_simd_clone_call new b08cc7982cb poly_int: vectorizable_conversion new 2a75bef375e poly_int: vect_get_constant_vectors new b85048f0c3f poly_int: two-operation SLP new 0b96018db34 poly_int: vect_no_alias_p new 445c4d33c66 poly_int: tree-vect-generic.c new 9aadb1b636b poly_int: brig vector elements new 99160b7f7ad poly_int: omp-simd-clone.c new d5078206324 poly_int: fold_indirect_ref_1 new e00097348d7 poly_int: folding BIT_FIELD_REFs on vectors new 423474a2075 poly_int: expand_vector_ubsan_overflow new f13a0e7dcce poly_int: REGMODE_NATURAL_SIZE new 36562182ed8 poly_int: subreg_get_info new a6d01a0d7a8 poly_int: expand_expr_real_2 new 77aac42051b poly_int: expand_expr_real_1 new 58e3e772764 poly_int: set_inc_state new 5318505ee9f poly_int: emit_single_push_insn_1 new 88adead87cc poly_int: PUSH_ROUNDING new 2bc0766b6a1 poly_int: adjust_mems new d976b800a98 poly_int: expand_ifn_atomic_compare_exchange_into_call new c4cdb489386 poly_int: process_alt_operands new e63c127f47c poly_int: reloading complex subregs new b845e0c0fd3 poly_int: alter_reg new 74eaf9849d6 poly_int: load_register_parameters new d7fb6cde9b6 poly_int: struct_value_size new c9a7e6bcbd1 poly_int: memrefs_conflict_p new ba555fe3885 poly_int: GET_MODE_NUNITS new b2daabf57db poly_int: vect_permute_load/store_chain new 64afbda2a4b poly_int: TYPE_VECTOR_SUBPARTS new f6d9ce29c7b poly_int: GET_MODE_PRECISION new f2a06b09e2a poly_int: expand_assignment new b4abe233cca poly_int: GET_MODE_BITSIZE new 6f70ec9a83e poly_int: GET_MODE_SIZE new 3f3aedb58d2 Add support for MODE_VECTOR_BOOL new 27a353f0074 Allow targets to pick a vector prefix other than "V" new d56ae864167 Add support for adjusting the number of units in a mode new 2bb51101ec2 [From upstream] Jeff's stack-clash patch for AArch64 new aa36f43baaa [AArch64] Rework interface to add constant/offset routines new be5c54ab7f6 [AArch64] Rewrite aarch64_simd_valid_immediate new 3d9281dffa0 [AArch64] Set NUM_POLY_INT_COEFFS to 2 new 150056466a3 [AArch64] Add const_offset field to aarch64_address_info new ecd4cd9aad2 Allow the target to set MAX_BITSIZE_MODE_ANY_MODE new fd69e7fab17 Improve vectorization COND_EXPR <bool op bool, ...> new 139cfdb771f Improve canonicalisation of TARGET_MEM_REFs new d5a023d303a Improve spilling for variable-width slots new e52b8fcacb7 Use extract_bit_field_as_subreg for vectors new d0b0ccd1d48 Use poly_int rtx accessors instead of hwi accessors new 3e1eb2de274 Use poly_int tree accessors instead of hwi accessors new 16fc9f56c3e [AArch64] Add SVE support new e9d3511fe77 [AArch64] Testsuite markup for SVE new e081088e2b1 [AArch64] SVE tests new 4f2043342be SVE unwinding new ae1532a924b Fix folding of vector mask EQ/NE expressions new a37069d8a58 Give the target more control over ARRAY_TYPE modes new 8c07d63ae6b [AArch64] SVE load/store_lanes support new 7d0f516d31f load/store_lanes testsuite markup new b17e7c7cca4 [AArch64] Tests for SVE structure modes new 93ef90f2ead Move code that stubs out IFN_MASK_LOADs new b069f4e712b Make vect_model_store_cost take a vec_load_store_type new 519c09d799b Split mask checking out of vectorizable_mask_load_store new 8d4d535aa35 Split rhs checking out of vectorizable_{,mask_load_}store new 829a7f1e1e5 Split out gather load mask building new 75afdc92706 Split gather load handling out of vectorizable_{mask_load_s [...] new 2d3bdb38e06 Make vectorizable_load/store handle IFN_MASK_LOAD/STORE new 89052115d55 Add support for masked load/store_lanes new 51714d91a47 Protect against min_profitable_iters going negative new 11edfd37908 Add optabs for common types of permutation new cc5909432c8 Handle more SLP constant and extern definitions for variable VF new 64ace920aef SLP reductions with variable-length vectors new b47362abcac Add support for bitwise reductions new 4e31ab7b28f Add support for fully-predicated loops new c6bae96f6e2 Add support for reductions in fully-masked loops new b028a507614 Make ivopts handle calls to internal functions new 2e65fd44f09 Allow the number of iterations to be smaller than VF new e9864ff2741 Handle peeling for alignment with masking new d56832f6d25 Add an empty_mask_is_expensive hook new f9d9d07b1ba Add support for vectorising live-out values using SVE LASTB new 694a5e4db22 Add support for conditional reductions using SVE CLASTB new f8d4c56e16a Allow single-element interleaving for non-power-of-2 strides new 49fcdccac34 Use single-iteration epilogues when peeling for gaps new c562da23ab9 Add an "early rematerialisation" pass new 667eaa196d4 Rework the legitimize_address_displacement hook new 475c7a2a7fa Remove unnecessary temporary in tree-if-conv.c new ca824f94163 Add support for in-order addition reduction using SVE FADDA new 5469f7dda62 Improve VIEW_CONVERT_EXPR for vector booleans new c1802e041d9 Work around PR81082 new 9c4d5a5738e Add support for SVE gather loads new 2e97eeb6542 Use gather loads for strided accesses new 416269e8530 Allow gather loads to be used for grouped accesses new 5ece6e1610f Add support for SVE scatter stores new 84886b4ebd1 Support for aliasing with variable strides new 44e10175b66 :: Fix gcc.c-torture/execute/960419-2.c new 1e3e0a40da8 :: Fix for vect_create_destination_var new 4bc785b0441 Test failures new bfd9c5811f0 Avoid pessimistic check for overlapping groups new 39020a9635b Fix for big field stores new 4a50d2ce6bb Handle vector boolean types when calculating the SLP unroll factor new 4fd4135ac75 Allow combine to reorder statements new cd6f54736df Predicated comparison folds new 18653f9380f Predicated arithmetic folds new f2ba9afa2bf Reuse results of vect_create_addr_base_for_vector_ref new f8d18515fd0 Allow capped vectorisation factors new 655e3625f9c Revert DECL_USER_ALIGN patch new 02cf0942b05 Add support for speculative loads new f233e68a6d1 Add support for first-faulting loads new 164804dbc17 Replace FMA_EXPR with one internal fn per optab new c9ef88a25bd Support fused multiply-adds in fully-masked reductions new 05cc841caf4 Implement SLP of internal functions new b9dd452e9ce Use conditional internal functions in if-conversion new d184c971305 Early predcom
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Summary of changes: ChangeLog | 9 + MAINTAINERS | 4 +- config/ChangeLog | 5 + config/bootstrap-debug-lean.mk | 1 + contrib/ChangeLog | 4 + contrib/analyze_brprob.py | 2 +- gcc/ChangeLog | 1864 ++- gcc/DATESTAMP | 2 +- gcc/Makefile.in | 5 +- gcc/ada/ChangeLog | 788 ++ gcc/ada/adadecode.c | 2 +- gcc/ada/adaint.c | 4 +- gcc/ada/argv.c | 4 +- gcc/ada/binde.adb | 1 + gcc/ada/checks.adb | 16 +- gcc/ada/contracts.adb | 303 +- gcc/ada/contracts.ads | 14 +- ...ard_and_implementation_defined_restrictions.rst | 7 + .../doc/gnat_ugn/platform_specific_information.rst | 30 + .../doc/gnat_ugn/the_gnat_compilation_model.rst | 2 +- gcc/ada/einfo.adb | 23 + gcc/ada/einfo.ads | 15 + gcc/ada/errout.adb | 2 +- gcc/ada/errout.ads | 4 + gcc/ada/exp_aggr.adb | 6 +- gcc/ada/exp_attr.adb | 2 +- gcc/ada/exp_ch11.adb | 4 +- gcc/ada/exp_ch3.adb | 164 +- gcc/ada/exp_ch4.adb | 15 +- gcc/ada/exp_ch5.adb | 4 +- gcc/ada/exp_ch6.adb | 4 +- gcc/ada/exp_ch9.adb | 15 +- gcc/ada/exp_disp.adb | 180 +- gcc/ada/exp_imgv.adb | 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gcc/testsuite/gcc.dg/torture/pr78305.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/bitops-1.c | 72 + gcc/testsuite/gcc.dg/tree-ssa/fnsplit-1.c | 1 + gcc/testsuite/gcc.dg/tree-ssa/fnsplit-2.c | 33 + gcc/testsuite/gcc.dg/tree-ssa/negminus.c | 21 + .../{vect/vect-outer-4e.c => tree-ssa/pr82726.c} | 4 +- gcc/testsuite/gcc.dg/tree-ssa/vrp101.c | 2 +- gcc/testsuite/gcc.dg/unclosed-init.c | 2 +- gcc/testsuite/gcc.dg/vect/bb-slp-pr65935.c | 4 +- gcc/testsuite/gcc.dg/vect/fast-math-slp-38.c | 3 +- gcc/testsuite/gcc.dg/vect/no-fast-math-vect16.c | 2 +- gcc/testsuite/gcc.dg/vect/pr25413a.c | 3 +- gcc/testsuite/gcc.dg/vect/pr45752.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-1.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-10.c | 4 +- gcc/testsuite/gcc.dg/vect/pr65947-12.c | 4 +- gcc/testsuite/gcc.dg/vect/pr65947-13.c | 4 +- gcc/testsuite/gcc.dg/vect/pr65947-14.c | 5 +- gcc/testsuite/gcc.dg/vect/pr65947-2.c | 4 +- gcc/testsuite/gcc.dg/vect/pr65947-3.c | 4 +- gcc/testsuite/gcc.dg/vect/pr65947-4.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-5.c | 10 +- gcc/testsuite/gcc.dg/vect/pr65947-6.c | 4 +- gcc/testsuite/gcc.dg/vect/pr65947-9.c | 10 +- gcc/testsuite/gcc.dg/vect/pr79920.c | 4 +- gcc/testsuite/gcc.dg/vect/slp-13-big-array.c | 3 +- gcc/testsuite/gcc.dg/vect/slp-13.c | 3 +- gcc/testsuite/gcc.dg/vect/slp-16.c | 2 +- gcc/testsuite/gcc.dg/vect/slp-19c.c | 6 +- gcc/testsuite/gcc.dg/vect/slp-23.c | 2 +- gcc/testsuite/gcc.dg/vect/slp-35.c | 2 +- gcc/testsuite/gcc.dg/vect/slp-37.c | 3 +- gcc/testsuite/gcc.dg/vect/slp-perm-4.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-71.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-reduc-6.c | 4 +- gcc/testsuite/gcc.dg/vect/vect-reduc-or_1.c | 10 +- gcc/testsuite/gcc.dg/vect/vect-reduc-or_2.c | 10 +- gcc/testsuite/gcc.misc-tests/gcov-3.c | 2 +- gcc/testsuite/gcc.target/aarch64/bsl-idiom.c | 88 + .../gcc.target/aarch64/construct_lane_zero_1.c | 37 + gcc/testsuite/gcc.target/aarch64/copysign-bsl.c | 13 + gcc/testsuite/gcc.target/aarch64/dwarf-cfa-reg.c | 2 +- .../gcc.target/aarch64/load_v2vec_lanes_1.c | 26 + .../gcc.target/aarch64/store_v2vec_lanes.c | 31 + gcc/testsuite/gcc.target/aarch64/sve_cap_4.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve_clastb_1.c | 6 +- .../gcc.target/aarch64/sve_clastb_1_run.c | 16 +- gcc/testsuite/gcc.target/aarch64/sve_clastb_2.c | 11 +- .../gcc.target/aarch64/sve_clastb_2_run.c | 18 +- gcc/testsuite/gcc.target/aarch64/sve_clastb_3.c | 7 +- .../gcc.target/aarch64/sve_clastb_3_run.c | 18 +- gcc/testsuite/gcc.target/aarch64/sve_clastb_4.c | 7 +- .../gcc.target/aarch64/sve_clastb_4_run.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve_clastb_5.c | 7 +- .../gcc.target/aarch64/sve_clastb_5_run.c | 18 +- gcc/testsuite/gcc.target/aarch64/sve_clastb_6.c | 8 +- .../gcc.target/aarch64/sve_clastb_6_run.c | 18 +- gcc/testsuite/gcc.target/aarch64/sve_clastb_7.c | 6 +- .../gcc.target/aarch64/sve_clastb_7_run.c | 18 +- .../gcc.target/aarch64/sve_const_pred_1.C | 14 +- .../gcc.target/aarch64/sve_const_pred_2.C | 10 +- .../gcc.target/aarch64/sve_const_pred_3.C | 8 +- .../gcc.target/aarch64/sve_const_pred_4.C | 8 +- gcc/testsuite/gcc.target/aarch64/sve_dup_lane_1.c | 64 +- gcc/testsuite/gcc.target/aarch64/sve_ext_1.c | 64 +- gcc/testsuite/gcc.target/aarch64/sve_ext_2.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve_extract_1.c | 80 +- gcc/testsuite/gcc.target/aarch64/sve_extract_2.c | 80 +- gcc/testsuite/gcc.target/aarch64/sve_extract_3.c | 122 +- gcc/testsuite/gcc.target/aarch64/sve_fdiv_1.c | 12 +- gcc/testsuite/gcc.target/aarch64/sve_fmad_1.c | 12 +- gcc/testsuite/gcc.target/aarch64/sve_fmla_1.c | 12 +- gcc/testsuite/gcc.target/aarch64/sve_fmls_1.c | 12 +- gcc/testsuite/gcc.target/aarch64/sve_fmsb_1.c | 12 +- gcc/testsuite/gcc.target/aarch64/sve_fnmad_1.c | 12 +- gcc/testsuite/gcc.target/aarch64/sve_fnmla_1.c | 12 +- gcc/testsuite/gcc.target/aarch64/sve_fnmls_1.c | 12 +- gcc/testsuite/gcc.target/aarch64/sve_fnmsb_1.c | 12 +- .../gcc.target/aarch64/sve_gather_load_1.c | 102 +- .../gcc.target/aarch64/sve_gather_load_10.c | 72 - .../gcc.target/aarch64/sve_gather_load_11.c | 14 - .../gcc.target/aarch64/sve_gather_load_2.c | 72 +- .../gcc.target/aarch64/sve_gather_load_3.c | 63 +- .../gcc.target/aarch64/sve_gather_load_3_run.c | 41 - .../gcc.target/aarch64/sve_gather_load_4.c | 20 +- .../gcc.target/aarch64/sve_gather_load_4_run.c | 35 - .../gcc.target/aarch64/sve_gather_load_5.c | 130 +- .../gcc.target/aarch64/sve_gather_load_5_run.c | 161 - .../gcc.target/aarch64/sve_gather_load_6.c | 50 +- .../gcc.target/aarch64/sve_gather_load_7.c | 26 +- .../gcc.target/aarch64/sve_gather_load_8.c | 19 - .../gcc.target/aarch64/sve_gather_load_9.c | 18 - .../gcc.target/aarch64/sve_index_offset_1.c | 54 + .../gcc.target/aarch64/sve_index_offset_1_run.c | 34 + .../gcc.target/aarch64/sve_indexoffset_1.c | 49 - .../gcc.target/aarch64/sve_indexoffset_1_run.c | 48 - gcc/testsuite/gcc.target/aarch64/sve_ld1r_1.C | 56 - gcc/testsuite/gcc.target/aarch64/sve_ld1r_1_run.C | 64 - gcc/testsuite/gcc.target/aarch64/sve_ld1r_2.c | 61 + gcc/testsuite/gcc.target/aarch64/sve_ld1r_2_run.c | 38 + gcc/testsuite/gcc.target/aarch64/sve_live_1.c | 52 +- gcc/testsuite/gcc.target/aarch64/sve_live_1_run.c | 52 +- gcc/testsuite/gcc.target/aarch64/sve_live_2.c | 19 - gcc/testsuite/gcc.target/aarch64/sve_live_2_run.c | 32 - .../gcc.target/aarch64/sve_load_const_offset_1.c | 16 +- .../gcc.target/aarch64/sve_load_const_offset_2.c | 6 +- .../gcc.target/aarch64/sve_load_const_offset_3.c | 9 +- .../gcc.target/aarch64/sve_load_scalar_offset_1.c | 24 +- .../gcc.target/aarch64/sve_loop_add_4_run.c | 7 +- gcc/testsuite/gcc.target/aarch64/sve_mad_1.c | 16 +- .../gcc.target/aarch64/sve_mask_gather_load_1.c | 83 +- .../aarch64/sve_mask_gather_load_1_run.c | 72 - .../gcc.target/aarch64/sve_mask_gather_load_2.c | 69 +- .../aarch64/sve_mask_gather_load_2_run.c | 98 - .../gcc.target/aarch64/sve_mask_gather_load_3.c | 65 +- .../aarch64/sve_mask_gather_load_3_run.c | 47 - .../gcc.target/aarch64/sve_mask_gather_load_4.c | 27 +- .../aarch64/sve_mask_gather_load_4_run.c | 37 - .../gcc.target/aarch64/sve_mask_gather_load_5.c | 156 +- .../aarch64/sve_mask_gather_load_5_run.c | 177 - .../gcc.target/aarch64/sve_mask_gather_load_6.c | 38 + .../gcc.target/aarch64/sve_mask_gather_load_7.c | 53 + .../gcc.target/aarch64/sve_mask_scatter_store_1.c | 173 +- .../aarch64/sve_mask_scatter_store_1_run.c | 186 - .../gcc.target/aarch64/sve_mask_scatter_store_2.c | 17 + .../gcc.target/aarch64/sve_mask_struct_load_1.c | 9 +- .../aarch64/sve_mask_struct_load_1_run.c | 9 +- .../gcc.target/aarch64/sve_mask_struct_load_2.c | 9 +- .../aarch64/sve_mask_struct_load_2_run.c | 9 +- .../gcc.target/aarch64/sve_mask_struct_load_3.c | 9 +- .../aarch64/sve_mask_struct_load_3_run.c | 9 +- .../gcc.target/aarch64/sve_mask_struct_load_4.c | 9 +- .../gcc.target/aarch64/sve_mask_struct_load_5.c | 9 +- .../gcc.target/aarch64/sve_mask_struct_load_6.c | 5 +- .../gcc.target/aarch64/sve_mask_struct_load_7.c | 5 +- .../gcc.target/aarch64/sve_mask_struct_load_8.c | 5 +- .../gcc.target/aarch64/sve_mask_struct_store_1.c | 22 +- .../aarch64/sve_mask_struct_store_1_run.c | 13 +- .../gcc.target/aarch64/sve_mask_struct_store_2.c | 24 +- .../aarch64/sve_mask_struct_store_2_run.c | 13 +- .../gcc.target/aarch64/sve_mask_struct_store_3.c | 28 +- .../aarch64/sve_mask_struct_store_3_run.c | 13 +- .../gcc.target/aarch64/sve_mask_struct_store_4.c | 3 +- gcc/testsuite/gcc.target/aarch64/sve_mla_1.c | 16 +- gcc/testsuite/gcc.target/aarch64/sve_mls_1.c | 16 +- gcc/testsuite/gcc.target/aarch64/sve_mov_rr_1.c | 6 +- gcc/testsuite/gcc.target/aarch64/sve_msb_1.c | 16 +- gcc/testsuite/gcc.target/aarch64/sve_nopeel_1.c | 33 +- gcc/testsuite/gcc.target/aarch64/sve_peel_ind_1.c | 2 +- .../gcc.target/aarch64/sve_peel_ind_1_run.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve_peel_ind_2.c | 2 +- .../gcc.target/aarch64/sve_peel_ind_2_run.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve_peel_ind_3.c | 2 +- .../gcc.target/aarch64/sve_peel_ind_3_run.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve_peel_ind_4.c | 2 +- .../gcc.target/aarch64/sve_peel_ind_4_run.c | 15 +- .../gcc.target/aarch64/sve_reduc_strict_1.C | 48 - .../gcc.target/aarch64/sve_reduc_strict_1.c | 28 + .../gcc.target/aarch64/sve_reduc_strict_1_run.C | 47 - .../gcc.target/aarch64/sve_reduc_strict_1_run.c | 29 + .../gcc.target/aarch64/sve_reduc_strict_2.C | 48 - .../gcc.target/aarch64/sve_reduc_strict_2.c | 28 + .../gcc.target/aarch64/sve_reduc_strict_2_run.C | 59 - .../gcc.target/aarch64/sve_reduc_strict_2_run.c | 31 + .../{sve_reduc_strict_3.C => sve_reduc_strict_3.c} | 23 +- gcc/testsuite/gcc.target/aarch64/sve_rev_1.c | 49 + gcc/testsuite/gcc.target/aarch64/sve_revb_1.c | 10 +- gcc/testsuite/gcc.target/aarch64/sve_revh_1.c | 14 +- gcc/testsuite/gcc.target/aarch64/sve_revw_1.c | 10 +- .../gcc.target/aarch64/sve_scatter_store_1.c | 134 +- .../gcc.target/aarch64/sve_scatter_store_1_run.c | 155 - .../gcc.target/aarch64/sve_scatter_store_2.c | 10 + .../gcc.target/aarch64/sve_scatter_store_3.c | 32 + .../gcc.target/aarch64/sve_scatter_store_4.c | 10 + .../gcc.target/aarch64/sve_scatter_store_5.c | 23 + .../gcc.target/aarch64/sve_scatter_store_6.c | 36 + .../gcc.target/aarch64/sve_scatter_store_7.c | 15 + gcc/testsuite/gcc.target/aarch64/sve_slp_1.c | 18 +- gcc/testsuite/gcc.target/aarch64/sve_slp_10.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve_slp_10_run.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve_slp_11.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve_slp_11_run.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve_slp_12.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve_slp_12_run.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve_slp_13.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve_slp_13_run.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve_slp_1_run.c | 7 +- gcc/testsuite/gcc.target/aarch64/sve_slp_2.c | 11 +- gcc/testsuite/gcc.target/aarch64/sve_slp_2_run.c | 7 +- gcc/testsuite/gcc.target/aarch64/sve_slp_3.c | 11 +- gcc/testsuite/gcc.target/aarch64/sve_slp_3_run.c | 7 +- gcc/testsuite/gcc.target/aarch64/sve_slp_4.c | 13 +- gcc/testsuite/gcc.target/aarch64/sve_slp_4_run.c | 7 +- gcc/testsuite/gcc.target/aarch64/sve_slp_5.c | 13 +- gcc/testsuite/gcc.target/aarch64/sve_slp_5_run.c | 39 +- gcc/testsuite/gcc.target/aarch64/sve_slp_6.c | 3 +- gcc/testsuite/gcc.target/aarch64/sve_slp_6_run.c | 43 +- gcc/testsuite/gcc.target/aarch64/sve_slp_7.c | 13 +- gcc/testsuite/gcc.target/aarch64/sve_slp_7_run.c | 47 +- gcc/testsuite/gcc.target/aarch64/sve_slp_8.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve_slp_8_run.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve_slp_9.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve_slp_9_run.c | 2 +- .../gcc.target/aarch64/sve_speculative_3.c | 2 +- .../gcc.target/aarch64/sve_speculative_6.c | 2 +- .../gcc.target/aarch64/sve_store_scalar_offset_1.c | 24 +- .../gcc.target/aarch64/sve_strided_load_1.c | 40 + .../gcc.target/aarch64/sve_strided_load_2.c | 18 + .../gcc.target/aarch64/sve_strided_load_3.c | 32 + .../gcc.target/aarch64/sve_strided_load_4.c | 33 + .../gcc.target/aarch64/sve_strided_load_5.c | 34 + .../gcc.target/aarch64/sve_strided_load_6.c | 7 + .../gcc.target/aarch64/sve_strided_load_7.c | 34 + .../{sve_gather_load_7.c => sve_strided_load_8.c} | 0 .../gcc.target/aarch64/sve_strided_store_1.c | 40 + .../gcc.target/aarch64/sve_strided_store_2.c | 18 + .../gcc.target/aarch64/sve_strided_store_3.c | 33 + .../gcc.target/aarch64/sve_strided_store_4.c | 33 + .../gcc.target/aarch64/sve_strided_store_5.c | 34 + .../gcc.target/aarch64/sve_strided_store_6.c | 7 + .../gcc.target/aarch64/sve_strided_store_7.c | 34 + .../gcc.target/aarch64/sve_struct_move_1.c | 93 +- .../gcc.target/aarch64/sve_struct_move_2.c | 84 +- .../gcc.target/aarch64/sve_struct_move_3.c | 87 +- .../gcc.target/aarch64/sve_struct_move_4.c | 116 + .../gcc.target/aarch64/sve_struct_move_5.c | 111 + .../gcc.target/aarch64/sve_struct_move_6.c | 129 + .../gcc.target/aarch64/sve_struct_vect_1.c | 4 +- .../gcc.target/aarch64/sve_struct_vect_10.c | 4 +- .../gcc.target/aarch64/sve_struct_vect_10_run.c | 2 +- .../gcc.target/aarch64/sve_struct_vect_11.c | 20 +- .../gcc.target/aarch64/sve_struct_vect_11_run.c | 6 +- .../gcc.target/aarch64/sve_struct_vect_12.c | 20 +- .../gcc.target/aarch64/sve_struct_vect_12_run.c | 6 +- .../gcc.target/aarch64/sve_struct_vect_13.c | 75 +- ...ruct_vect_12_run.c => sve_struct_vect_13_run.c} | 2 +- .../gcc.target/aarch64/sve_struct_vect_14.c | 58 +- .../gcc.target/aarch64/sve_struct_vect_15.c | 18 +- .../gcc.target/aarch64/sve_struct_vect_16.c | 18 +- .../gcc.target/aarch64/sve_struct_vect_17.c | 69 +- .../gcc.target/aarch64/sve_struct_vect_17_run.c | 32 - .../gcc.target/aarch64/sve_struct_vect_18.c | 12 +- .../gcc.target/aarch64/sve_struct_vect_18_run.c | 22 +- .../gcc.target/aarch64/sve_struct_vect_19.c | 12 +- .../gcc.target/aarch64/sve_struct_vect_19_run.c | 56 +- .../gcc.target/aarch64/sve_struct_vect_1_run.c | 8 +- .../gcc.target/aarch64/sve_struct_vect_2.c | 4 +- .../gcc.target/aarch64/sve_struct_vect_20.c | 24 +- .../gcc.target/aarch64/sve_struct_vect_20_run.c | 41 +- .../gcc.target/aarch64/sve_struct_vect_21.c | 24 +- .../gcc.target/aarch64/sve_struct_vect_21_run.c | 49 +- .../gcc.target/aarch64/sve_struct_vect_22.c | 24 +- .../gcc.target/aarch64/sve_struct_vect_22_run.c | 41 +- .../{sve_struct_vect_20.c => sve_struct_vect_23.c} | 2 +- .../gcc.target/aarch64/sve_struct_vect_23_run.c | 45 + .../gcc.target/aarch64/sve_struct_vect_2_run.c | 2 +- .../gcc.target/aarch64/sve_struct_vect_3.c | 4 +- .../gcc.target/aarch64/sve_struct_vect_3_run.c | 2 +- .../gcc.target/aarch64/sve_struct_vect_4.c | 4 +- .../gcc.target/aarch64/sve_struct_vect_4_run.c | 2 +- .../gcc.target/aarch64/sve_struct_vect_5.c | 4 +- .../gcc.target/aarch64/sve_struct_vect_5_run.c | 2 +- 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