This is an automated email from the git hooks/post-receive script.

unknown user pushed a change to branch master in repository llvm.

from fba8fc209f6 Open native file handles to avoid converting from FDs, NFC new 6644a1885fc [AMDGPU] gfx908 mfma support

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 8 +- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 1 + lib/Target/AMDGPU/AMDGPUSearchableTables.td | 22 + lib/Target/AMDGPU/GCNRegBankReassign.cpp | 3 + lib/Target/AMDGPU/GCNRegPressure.cpp | 8 +- lib/Target/AMDGPU/GCNRegPressure.h | 7 +- lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 28 +- lib/Target/AMDGPU/SIFoldOperands.cpp | 97 +- lib/Target/AMDGPU/SIISelLowering.cpp | 34 + lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 2 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 202 +++- lib/Target/AMDGPU/SIInstructions.td | 10 + lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 4 +- lib/Target/AMDGPU/SIRegisterInfo.cpp | 151 ++- lib/Target/AMDGPU/SIRegisterInfo.h | 31 +- lib/Target/AMDGPU/SIWholeQuadMode.cpp | 2 +- test/CodeGen/AMDGPU/accvgpr-copy.mir | 132 +++ test/CodeGen/AMDGPU/agpr-register-count.ll | 15 + test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll | 17 + test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll | 1361 ++++++++++++++++++++++ test/CodeGen/AMDGPU/load-constant-i32.ll | 3 + test/CodeGen/AMDGPU/load-global-i32.ll | 6 +- test/CodeGen/AMDGPU/load-local-i32.ll | 2 + test/CodeGen/AMDGPU/mai-inline.ll | 190 +++ 24 files changed, 2272 insertions(+), 64 deletions(-) create mode 100644 test/CodeGen/AMDGPU/accvgpr-copy.mir create mode 100644 test/CodeGen/AMDGPU/agpr-register-count.ll create mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll create mode 100644 test/CodeGen/AMDGPU/mai-inline.ll