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from 6c338124494 Daily bump. new 0efe904de8c RISC-V: Always register vector built-in functions during LT [...]

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Summary of changes: gcc/config/riscv/riscv-c.cc | 84 --------- gcc/config/riscv/riscv-vector-builtins.cc | 198 +++++++++++---------- gcc/config/riscv/riscv-vector-builtins.h | 10 +- gcc/testsuite/gcc.target/riscv/lto/pr110812_0.c | 9 + gcc/testsuite/gcc.target/riscv/lto/pr110812_1.c | 9 + .../{arm/lto/lto.exp => riscv/lto/riscv-lto.exp} | 8 +- .../base => gcc.target/riscv/lto}/riscv_vector.h | 0 7 files changed, 129 insertions(+), 189 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/lto/pr110812_0.c create mode 100644 gcc/testsuite/gcc.target/riscv/lto/pr110812_1.c copy gcc/testsuite/gcc.target/{arm/lto/lto.exp => riscv/lto/riscv-lto.exp} (89%) copy gcc/testsuite/{g++.target/riscv/rvv/base => gcc.target/riscv/lto}/riscv_vecto [...]