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unknown user pushed a change to branch rsandifo/sve-rebase in repository gcc.

discards d70b2c5911c Work around PR81082 discards ef67cd96481 Use conditional internal functions in if-conversion discards aaa189cec94 Implement SLP of internal functions discards 061d5f4bc3a Handle vector boolean types when calculating the SLP unroll factor discards ccf6f57412a Remove unnecessary temporary in tree-if-conv.c discards 109f5e4a5ac Don't require an integer mode for PARALLELs discards aeb550c0796 Add early rematerialisation pass discards 6bfc3502a74 Record equivalences for spill registers discards 76069feaaab Support fused multiply-adds in fully-masked reductions discards efd6a9958b9 Replace FMA_EXPR with one internal fn per optab discards be3221bcdba Use single-iteration epilogues when peeling for gaps discards 64237b5eac3 Allow single-element interleaving for non-power-of-2 strides discards 23667b1249b Add support for first-faulting loads discards 1a7cf0a550a Add support for speculative loads discards 14591491ce0 Support for aliasing with variable strides discards 6773435628e Fix for big field stores discards c5ebd07cf84 Avoid pessimistic check for overlapping groups discards 076ae648a95 Add support for gather loads and scatter stores discards cbf419dce68 Add support for FADDA discards 6a824b07342 Add support for CLASTB discards 49f783d5898 Add support for BRKA and LASTB discards 27fd53371f7 Allow capped vectorisation factors discards a0dab82f620 Reuse results of vect_create_addr_base_for_vector_ref discards ca06782300a Add an empty_mask_is_expensive hook discards 0aee8ec2a22 Predicated arithmetic folds discards e790f007d81 Predicated comparison folds discards b35a64958ea Allow combine to reorder statements discards 3b6385c6bd6 Rework the legitimize_address_displacement hook discards 406766399f5 Improve ivopts handling of offset multiples discards 544c7515b93 Handle peeling for alignment with masking discards af4d203b27b Allow the number of iterations to be smaller than VF discards 914bdf8cf2d Make ivopts handle calls to internal functions discards 167fae3cbb6 Improve VIEW_CONVERT_EXPR for vector booleans discards 52b27b6cb21 Add support for fully-predicated loops discards 8f4fb5ba65e Protect against min_profitable_iters going negative discards df182b9dff8 SLP reductions with variable-length vectors discards 10364891da7 Handle more SLP constant and extern definitions for variable VF discards afb938ff28c Add optabs for common types of permutation discards 795bd27686d Add support for bitwise reductions discards 1cb4de6ace5 Add support for masked load/store_lanes discards 010d70f79eb [AArch64] SVE load/store_lanes support discards 4d96e5f4979 Fix folding of vector mask EQ/NE expressions discards 05ef3a19043 [AArch64] Testsuite markup for SVE discards b594ef36bec [AArch64] Add SVE support discards 3447e9a027f Revert DECL_USER_ALIGN patch discards 5ff21294a48 vect_masked_store discards 1f4080e8b57 vect_align_stack_vars discards 4e515c8de51 vect_variable_length discards e03dfe910a1 target_vect_unaligned_possible discards 63dfb0dd5bb vect_element_align_preferred discards 01a5466fb16 vect_permN discards 4ca0c528087 available_vector_sizes discards b77c649db30 Include phis in SLP unrolling calculation discards 1d79c275c16 mask load/store for external masks discards 73347139789 Add VECTOR_BITS to tree-vect.h discards 3724d731c4c Use asm volatile ("" ::: "memory") discards 985d6a95b12 Add copy_rtx call to RTL loop unroller discards e40ba3ac36c [AArch64] Generate permute patterns using rtx builders discards 578113e9ff6 [AArch64] Rewrite aarch64_simd_valid_immediate discards 43e89062b5f [AArch64] Add const_offset field to aarch64_address_info discards 759da0ed000 [AArch64] Rename the internal "Upl" constraint discards c8f8ad1167c [AArch64] Set NUM_POLY_INT_COEFFS to 2 discards 63fcaeb9035 [AArch64] Rework interface to add constant/offset routines discards 7daf674ff40 [AArch64] Move code around discards 5b0aecad820 SUBREG_PROMOTED_VAR_P handling in expand_direct_optab_fn discards 1b516a35373 Fix a failure in the Fortran matmul* tests discards 2bdc44411ac Improve ivopts handling of forced scales discards 57d794db0b2 Improve vector mask pattern handling discards d93a77aa779 Improve canonicalisation of TARGET_MEM_REFs discards 6677a9a188e Prevent invalid register mode changes in combine discards 9898c511101 Fix infinite loop in simplify_operand_subreg discards 0ad71e33550 Use extract_bit_field_as_subreg for vectors discards 2ed9b4e9ab1 Allow the target to set MAX_BITSIZE_MODE_ANY_MODE discards 77ddca3fe26 Add support for adjusting the number of units in a mode discards 46dc994f095 Add support for MODE_VECTOR_BOOL discards 16928142686 Improve spilling for variable-width slots discards 0a7c563ca80 Don't query the frontend for unsupported types discards bf08d0a44a7 Make more use of simplify_gen_binary discards cce3e5732ee Use poly_int rtx accessors instead of hwi accessors discards a80eb6b5240 Use poly_int tree accessors instead of hwi accessors discards 9e6da40f13d Base subreg rules on REGMODE_NATURAL_SIZE rather than UNITS [...] discards 1b69c3c5f15 poly_int: GET_MODE_SIZE discards 9818895c435 poly_int: GET_MODE_BITSIZE discards cc2ad331663 poly_int: GET_MODE_PRECISION discards 54f7668cbe2 Fix vectorizable_live_operation handling of vector booleans discards 32a8504a382 poly_int: TYPE_VECTOR_SUBPARTS discards 9150619d5ea poly_int: GET_MODE_NUNITS discards db958dad154 poly_int: vect_no_alias_p discards 164a7c87b76 poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECT [...] discards ceca72b2929 poly_int: get_mask_mode discards 07ef9d9a97a poly_int: omp_max_vf discards 772ef6afa76 poly_int: vectoriser vf and uf discards 4a637b089fe poly_int: prune_runtime_alias_test_list discards 13b27f0bd12 poly_int: loop versioning threshold discards 0b59a355869 poly_int: tree-ssa-loop-ivopts.c:iv_use discards e9b34d5c3f0 poly_int: get_binfo_at_offset discards 57cb599bfca poly_int: build_ref_for_offset discards 7dbb13acec7 poly_int: MEM_REF offsets discards 9cbb40c46c7 poly_int: bit_field_size/offset discards 90069ce42f1 poly_int: int_size_in_bytes discards 6e46eb7e6d6 poly_int: emit_group_load/store discards d96c6a16a85 poly_int: reload<->ira interface discards ade9b1112e7 poly_int: emit_inc discards 20db0d84901 poly_int: cfgexpand stack variables discards 0047f53db60 poly_int: argument sizes discards c6af9752767 poly_int: REG_ARGS_SIZE discards f4e279c189a poly_int: push_block/emit_push_insn discards 4d88a1d87dd poly_int: frame allocations discards 714490d7fbb poly_int: reload1.c discards 4f588030ced poly_int: reload.c discards b82d6660f2c poly_int: get_inner_reference & co. discards bf4607b0fff poly_int: get_inner_reference_aff discards 1c42bbb8d8b poly_int: pointer_may_wrap_p discards d9efa934c3a poly_int: symbolic_number discards 14bf5703d2c poly_int: aff_tree discards 8673b847671 poly_int: get_addr_unit_base_and_extent discards 7d550a78449 poly_int: get_ref_base_and_extent discards dafcbfb8e7f poly_int: ipa_parm_adjustment discards 70b8565d097 poly_int: DWARF CFA offsets discards 32dc601b096 poly_int: operand_subword discards 00863b84163 poly_int: SUBREG_BYTE discards b70eab795f2 poly_int: store_field & co discards d512f223956 poly_int: C++ bitfield regions discards 48ad321c95a poly_int: extract_bit_field bitrange discards bac9eed0409 poly_int: store_bit_field bitrange discards 769c24ce0d6 poly_int: create_integer_operand discards 7e846c0fd62 poly_int: lra frame offsets discards 83e4b3b1d70 poly_int: MEM_OFFSET and MEM_SIZE discards d868e92ac0a poly_int: rtx_addr_can_trap_p_1 discards c1d28c160d7 poly_int: dse.c discards a8d43f1628e poly_int: ao_ref and vn_reference_op_t discards baebdfee9e9 poly_int: same_addr_size_stores_p discards b45c0e9f4e7 poly_int: fold_ctor_reference discards edf849d41fd Add DWARF support for polynomial offsets discards 09f564e5962 Make REG_OFFSET a poly_int64 discards c34776f087a poly_int: compute_data_ref_aligment discards 6be4c0442b1 Add poly_int dump routines discards c2d0b3d89cc Add polynomial tree constants discards 6a0ba579843 Add polynomial rtx constants discards 161a456976a Make mode query functions accept poly_ints discards d084364da31 Add poly-int.h discards b221d98db94 Move computation of SLP_TREE_NUMBER_OF_VEC_STMTS discards 193651b97f8 Add LOOP_VINFO_MAX_VECT_FACTOR discards 3fa1ba5e9bf Fix type of bitstart in vectorizable_live_operation discards 68bc51b73f4 Fix for match.pd handling of three-constant bitops discards 54ad19b6bbf [AArch64] Add an endian_lane_rtx helper routine discards 4be1143d05c Treat VEC_{DUPLICATE,SERIES}_EXPR as gimple constants discards 12fc913cee5 Add VEC_SERIES_EXPR and associated optab discards 21d82eed986 Add a VEC_DUPLICATE_EXPR tree code and associated optab discards 2a419527b6e Add a VEC_SERIES rtl code discards 3e5c80461b7 Fix unguarded uses of tree_to_uhwi discards 31d89772e6b Tighten tree-ssa-ccp.c:get_value_for_expr condition discards d7b3611b950 Add missing int_cst_rangeN checks to tree-vrp.c discards 9a6e4059882 compare_values use in extract_range_from_multiplicative_op_1 discards 963085c4c1a Allow vector CONSTs discards 1f96e8d26ae Add rtx const vec_duplicate helpers discards 3c09b10a331 Invoke vectorizable_live_operation in a consistent way discards f868adfcd12 Let the target choose a vectorisation alignment discards f52541b20fb Add a vect_get_dr_size helper function discards 7acfe83fde4 Make more use of gimple-fold.h discards 82c74c936da Add gimple_build_vector* helpers discards f84218cc2f9 Pass number of elements alongside tree* when constructing vectors discards 0e9228450bc Store VECTOR_CST_NELTS directly in tree node discards 8bbe2d371d6 Add a vect_worthwhile_without_simd_p helper routine discards 5009b24c50e Add a vect_get_num_copies helper routine discards bb32200d320 Factor out the mode handling in lower-subreg.c discards 2910afbd697 Use MACRO_MODE for FUNCTION_ARG_OFFSET discards 76688eee337 Use MACRO_MODE for TRULY_NOOP_TRUNCATION_MODES_P discards bdaaed9caf2 Use MACRO_MODE for CANNOT_CHANGE_MODE_CLASS discards 57a7fe29782 Use MACRO_MODE for targhooks.c and address.h wrappers discards c5a544d5c0f Use MACRO_MODE for SECONDARY_MEMORY_NEEDED discards d94a0265390 Use MACRO_MODE for SECONDARY_MEMORY_NEEDED_MODE discards bbd503b2f4d Use MACRO_MODE for HARD_REGNO_NREGS discards f9308dcc74d Turn FUNCTION_ARG_PADDING into a target hook discards 8a85ac3aceb Turn SLOW_UNALIGNED_ACCESS into a target hook discards 9679701ecf2 Turn MODES_TIEABLE_P into a target hook discards 1d4c88feb2e Turn HARD_REGNO_MODE_OK into a target hook discards dc046b4c766 Turn HARD_REGNO_CALL_PART_CLOBBERED into a target hook discards 8c37783c465 Add helpers for shift count modes discards 8d5d7b90953 Use scalar_mode in expand_shift_1 discards bd744c21474 Add wider_subreg_mode helper functions discards 92a36e8bbca Add subreg_memory_offset helper functions discards f9969591d65 Widening optab cleanup discards 04eaf5bb21c Add a fixed_size_mode_pod class discards c6f04926aa9 Add a fixed_size_mode class discards a380a1095b8 Add a mem_alias_size helper class discards ecfce220a78 Improve ECF_NOTHROW flags for direct internal functions discards 62ccf90c274 [AArch64] Fix address check in SIMD mov expander discards 68511991357 :: AArch64 scalar_float_mode discards b5853f00afc Document machine_mode wrapper classes discards 5e1d0df4c30 [77/77] Add a complex_mode class discards 26dc2829b33 [76/77] Add a scalar_mode_pod class discards 08dac287920 [75/77] Use scalar_mode in the AArch64 port discards 29b12a02149 [74/77] Various small scalar_mode changes discards b9eb20b99c4 [73/77] Pass scalar_mode to scalar_mode_supported_p discards e5da9a39648 [72/77] Pass scalar_mode to scalar_mode_supported_p discards e8c444a9fdf [71/77] Use opt_scalar_mode for mode iterators discards 64ce54abd07 [70/77] Make expand_fix/float check for scalar modes discards ea6cd9a0fc4 [69/77] Split scalar-only part out of convert_mode discards 8d20dcc4647 [68/77] Use scalar_mode for is_int_mode/is_float_mode pairs discards 43be07129c2 [67/77] Use scalar_mode in fixed-value.* discards 8e3807b4e19 [66/77] Use scalar_mode for constant integers discards 410cfba415d [65/77] Add a SCALAR_TYPE_MODE macro discards 9c4892692f4 [64/77] Add a scalar_mode class discards c4f95f75182 [63/77] Simplifications after type switch discards 8407adfdcce [62/77] Big machine_mode to scalar_int_mode replacement discards 2905af3cd75 [61/77] Use scalar_int_mode in the AArch64 port discards 312bfe018d5 [60/77] Pass scalar_int_modes to do_jump_by_parts_* discards f478e637cc0 [59/77] Add a rtx_jump_table_data::get_data_mode helper discards b711162bde9 [58/77] Use scalar_int_mode in a try_combine optimisation discards 8578fca35e9 [57/77] Use scalar_int_mode in expand_expr_addr_expr discards a3d8448bad3 [56/77] Use the more specific type when two modes are known [...] discards 7d14055c87b [55/77] Use scalar_int_mode in simplify_const_unary_operation discards bc71c5af2f5 [54/77] Add explicit int checks for alternative optab imple [...] discards 39d89b0a564 [53/77] Pass a mode to const_scalar_mask_from_tree discards ca0a5e1b84c [52/77] Use scalar_int_mode in extract/store_bit_field discards 907a5ad3e29 [51/77] Use opt_scalar_int_mode when iterating over integer modes discards a6d059387f5 [50/77] Add helper routines for SUBREG_PROMOTED_VAR_P subregs discards 18541da7961 [49/77] Simplify nonzero/num_sign_bits hooks discards 734befd9b0b [48/77] Make subroutines of num_sign_bit_copies operate on [...] discards ab1ea177080 [47/77] Make subroutines of nonzero_bits operate on scalar_ [...] discards 0ed34f7e612 [46/77] Make widest_int_mode_for_size return a scalar_int_mode discards 8cde0cd8bb3 [45/77] Make extract_left_shift take a scalar_int_mode discards 123d97230ba [44/77] Make simplify_and_const_int take a scalar_int_mode discards 85a0db6c881 [43/77] Use scalar_int_mode in simplify_comparison discards 0ed8270f5ba [42/77] Use scalar_int_mode in simplify_shift_const_1 discards 12e7b94aa5d [41/77] Split scalar integer handling out of force_to_mode discards 9b7f3a49939 [40/77] Use scalar_int_mode for extraction_insn fields discards 264a2108745 [39/77] Two changes to the get_best_mode interface discards 778a6397ca0 [38/77] Move SCALAR_INT_MODE_P out of strict_volatile_bitfield_p discards 1525c24111b [37/77] Use scalar_int_mode when emitting cstores discards 818af17a6ba [36/77] Use scalar_int_mode in the RTL iv routines discards 2296a66352d [35/77] Add uses of as_a <scalar_int_mode> discards 5ee9933d13d [34/77] Add a SCALAR_INT_TYPE_MODE macro discards 901b7735a76 [33/77] Add a NARROWEST_INT_MODE macro discards b02a0c04caa [32/77] Check is_a <scalar_int_mode> before calling valid_p [...] discards e7cd0057b97 [31/77] Use scalar_int_mode for move2add discards 9d02da0a6d8 [30/77] Use scalar_int_mode for doubleword splits discards 39aa50a7545 [29/77] Make some *_loc_descriptor helpers take scalar_int_mode discards c672b5ba634 [28/77] Use is_a <scalar_int_mode> for miscellaneous types of test discards ce87ff0d44e [27/77] Use is_a <scalar_int_mode> before LOAD_EXTEND_OP discards 3972e3948d2 [26/77] Use is_a <scalar_int_mode> in subreg/extract simpli [...] discards 1de12555208 [25/77] Use is_a <scalar_int_mode> for bitmask optimisations discards 382bab123a8 [24/77] Replace a != BLKmode check with is_a <scalar_int_mode> discards fdac47ceec6 [23/77] Replace != VOIDmode checks with is_a <scalar_int_mode> discards c697accfee6 [22/77] Replace !VECTOR_MODE_P with is_a <scalar_int_mode> discards b96c2c65e9f [21/77] Replace SCALAR_INT_MODE_P checks with is_a <scalar_ [...] discards 27b049a1370 [20/77] Replace MODE_INT checks with is_int_mode discards 6224bd0e200 [19/77] Add a smallest_int_mode_for_size helper function discards 2bd1d329ae9 [18/77] Make int_mode_for_mode return an opt_scalar_int_mode discards 9a116003b0c [17/77] Add an int_mode_for_size helper function discards 3a6879b39c6 [16/77] Add scalar_int_mode_pod discards 773aa282624 [15/77] Add scalar_int_mode discards 2f79d4db0f7 [14/77] Make libgcc_floating_mode_supported_p take a scalar [...] discards be828480fde [13/77] Make floatn_mode return an opt_scalar_float_mode discards 4dfc82c0f04 [12/77] Use opt_scalar_float_mode when iterating over float modes discards a26e4bf96d2 [11/77] Add a float_mode_for_size helper function discards 8332254a268 [10/77] Make assemble_real take a scalar_float_mode discards 8cf2aafadb6 [9/77] Add SCALAR_FLOAT_TYPE_MODE discards bb00e3bed00 [8/77] Simplify gen_trunc/extend_conv_libfunc discards cbef3759588 [7/77] Add scalar_float_mode discards b866724bf54 [6/77] Make GET_MODE_WIDER return an opt_mode discards 77164676352 [5/77] Small tweak to array_value_type discards c72f8e6f9f2 [4/77] Add FOR_EACH iterators for modes discards 87dacf2bb78 [3/77] Allow machine modes to be classes discards cb313011741 [2/77] Add an E_ prefix to case statements discards eba8a28b6b2 [1/77] Add an E_ prefix to mode names discards c86ee574ba2 Test failures discards bd140a3f1b7 Remove DOS file formatting discards 2cfdaea96eb Split out parts of scompare_loc_descriptor and emit_store_flag discards e54dc9f598d Make more use of GET_MODE_UNIT_PRECISION discards 4f9fdf1ca6b Make more use of GET_MODE_UNIT_BITSIZE discards 523f7ba9822 Make more use of GET_MODE_UNIT_SIZE discards 00dc0772e85 Make more use of byte_lowpart_offset discards e80209bbb1c Make more use of subreg_size_lowpart_offset discards 0e9271f4308 Make more use of subreg_lowpart_offset discards 230730d1d17 Make more use of subreg_offset_from_lsb discards f01855763c5 Make more use of df_read_modify_subreg_p discards f96bf2b7f79 Make more use of HWI_COMPUTABLE_MODE_P discards 310e30072c9 [AArch64] Tighten address register subreg checks discards 6fdc69e6449 [AArch64] Tweak aarch64_classify_address interface discards aa5e66aab6c [AArch64] Rename cmp_result iterator discards 97c0e810c99 [AArch64] Remove use of wider vector modes discards 38129a74ed3 Add a partial_subreg_p predicate discards 55b0d7f4da9 PR81635: Use chrecs to help find related data refs adds d6c70e3e514 2017-08-23 Richard Biener rguenther@suse.de adds 3715670b50b 2017-08-23 Richard Biener rguenther@suse.de adds 8f29ae87f85 2017-08-23 Richard Biener rguenther@suse.de adds e6011f4fbda [gcc/testsuite] adds 98d7f16bff1 * config/i386/i386.opt: Remove unneeded Init(0) initializa [...] adds 2ac219a2ce6 testsuite: add param-type-mismatch.c/C testcases as a baseline adds fcc3d956193 * cp-tree.h (print_search_statistics, reinit_search_stati [...] adds 163fe99f928 * cp-tree.h (maybe_version_functions): Declare. * decl.c [...] adds 912ee2945ce * semantics.c (finish_member_declaration): Move USING_DECL [...] adds 03d9ebc0236 * cp-tree.h (lookup_field_1, lookup_fnfields_slot, lookup [...] adds f8808414970 PR target/80969 - Fix ICE with -mabi=ms -mavx512f, reduce w [...] adds d57391ef862 Daily bump. adds 451feb44909 Make more use of subreg_offset_from_lsb adds bc4e06dc35d PR middle-end/81931 * tree-ssanames.c (get_nonzero_bits): [...] adds f76f1146495 2017-08-24 Richard Biener rguenther@suse.de adds be72c8665e6 2017-08-24 Richard Biener rguenther@suse.de adds 4e42a1965f7 2017-08-23 Richard Biener rguenther@suse.de adds c40aecfe90e * dwarf2out.c (MAX_ARTIFICIAL_LABEL_BYTES): Increase to 40 [...] adds 0bdd7941167 C: fix logic within c_expr::get_location adds 0fad202d9b2 PR tree-optimization/81913 * tree-ssa-loop-niter.c (numbe [...] adds b14b4dca53d * lib/target-supports.exp: Group together target-dependant [...] adds a5079b7fe2c Adds the powerpc equivalent mm_malloc.h header which is nee [...] adds ca9219bf18c Conversion operators kept on single overload set * class. [...] adds efcf68d51e4 [gcc] 2017-08-24 Michael Meissner meissner@linux.vnet.ibm.com adds 78dfd8785c2 2017-08-24 François Dumont fdumont@gcc.gnu.org adds d98076a0920 Daily bump. adds 8dd133da5c9 PR middle-end/81908 - FAIL: gfortran.dg/alloc_comp_auto_arr [...] adds 2edde49591c Conversion operators have a special name * cp-tree.h (CPT [...] adds 1a0056ba145 PR81747, ICE in operator[] adds 1e2de45189a * class.c (method_name_cmp, resort_method_name_cmp): Metho [...] adds 74e2e4864f0 Retabify 2017-08-24 Richard Biener rguenther@suse.de P [...] adds ad5e611e52c [gcc] 2017-08-24 Michael Meissner meissner@linux.vnet.ibm.com adds 7d753a1bf2b 2017-08-25 Bill Schmidt wschmidt@linux.vnet.ibm.com adds 5af867261f0 Part 2/3 for contributing PPC64LE support for X86 SSE instr [...] adds 306cc49c39f Part 3/3 for contributing PPC64LE support for X86 SSE instr [...] adds df9c8834c10 Daily bump. adds 4b2c8ec013e Daily bump. adds 12c75f42fe1 2017-08-27 Thomas Koenig tkoenig@gcc.gnu.org adds bfe9c13002a PR target/81995 * config/i386/i386.md (*<btsc><mode>): Ch [...] adds f555028fcac Daily bump. adds 81346e4b42d 2017-08-27 Jerry DeLisle jvdelisle@gcc.gnu.org adds 06cd0655a68 optabs: ensure mem_thread_fence is a compiler barrier adds 8aaef9d6042 2017-08-28 Richard Biener rguenther@suse.de adds d66dc3d73d7 2017-08-28 Richard Biener rguenther@suse.de adds ccff35d7bba 2017-08-28 Richard Biener rguenther@suse.de adds 88df73d0d12 * gcc.c (execute): Fold SIGPIPE handling into switch stat [...] adds 2ecceb78368 * cp-tree.h (insert_late_enum_def_into_classtype_sorted_fi [...] adds fa01f3dea74 * cp-tree.h (lang_type): Replace sorted_fields vector with [...] adds 7b67bc424c9 2017-08-25 Steve Ellcey sellcey@cavium.com adds 6d5cf4eaf0d 2017-08-28 Janus Weil janus@gcc.gnu.org adds e1ce2ea999b Daily bump. adds 506ac60cacb * tree-ssa-dom.c (class edge_info): Changed from a struct [...] adds a370df2c520 * tree-ssa-dom.c (edge_info::record_simple_equiv): Call d [...] adds 1c19938577a 2017-08-29 Richard Biener rguenther@suse.de Dominik In [...] adds 98102386fdf Fix --help=target (PR other/39851). adds 989f02dcdd9 Set the call nothrow flag more often adds 27c5dc816bf Fix --help=target (Ada) (PR other/39851) adds 98a6abc7c42 2017-08-29 Richard Biener rguenther@suse.de adds 3f98450ae6b PR target/80993 * gcc/config/msp430/msp430.c (msp430_attr [...] adds 1d5640e3f6d Make expansion of balanced binary trees of switches on tree level. adds 7977b0509f0 [gcc] adds 725e8413443 * config/i386/i386.opt (flag_fentry): Do not init to -1. [...] adds 8bbf8d13ec2 * gcc.target/i386/20030926-1.c: Add dg-additional-options. [...] adds b0c5722beea ira-costs: avoid missing base registers in record_address_regs adds c09949646bb * gcc.target/i386/*.c: Remove excess braces from target se [...] adds 762696920bb runtime: fix lfstack for 64-bit AIX adds 0386bbeeffe Fix default argument conversion failure and SFINAE. adds ea3e8c990ba Instantiate default arguments/member initializers once. adds 7e1f8be4cb7 Add immediate potential_constant_expression variants. adds d90b17679aa Support copying local_specializations. adds 5164d9e94ea Adjust C++17 class deduction use of DECL_ABSTRACT_ORIGIN. adds 2ffc5005c73 Fix lambdas in template default argument of inherited ctor. adds b38367d9642 PR c++/80767 - unnecessary instantiation of generic lambda adds 1dcd84cf006 Various small fixes. adds b7e4a5588b7 PR c++/80935 - wrong C++17 error with lambda adds f86dd47bf57 Remove unnecessary LAMBDA_EXPR fields. adds 441a4bfc51c PR c++/78840 - ICE with const and nested generic lambda adds 6482ee1c8d9 [gcc] 2017-08-29 Michael Meissner meissner@linux.vnet.ibm.com adds 52e76545f1b Reimplement handling of lambdas in templates. adds d202935a58d tweak ChangeLog adds f00202ca1e8 runtime: make go-nosys.c compile with !HAVE_SYSCALL adds 626d40570eb libgo: fix Stat_t on AIX adds 9e6bae0509a PR c++/81236 - ICE with template-id in generic lambda adds 04206864264 libgo: netinet/icmp6.h require netinet/in.h on AIX adds f4d74dd84be net/internal/socktest: build sys_unix.go on AIX adds d44155ef3f0 Daily bump. adds 80a637902f0 [rs6000] int->machine_mode in rs6000-c.c adds 162b7dbcd6e 2017-08-30 Richard Biener rguenther@suse.de adds 0b20f9b9c52 * gcc/config/msp430/msp430.h: Pass -mcode/data-region to t [...] adds 5d43554c2b9 2017-08-30 Richard Biener rguenther@suse.de adds e5392ef2573 Split out parts of scompare_loc_descriptor and emit_store_flag adds 1e0295b98d3 [1/77] Add an E_ prefix to mode names adds 916ace949a8 [2/77] Add an E_ prefix to case statements adds fb398229980 [3/77] Allow machine modes to be classes adds 19a4dce4a42 [4/77] Add FOR_EACH iterators for modes adds 125344e3444 [5/77] Small tweak to array_value_type adds 28ebc73c5fc [6/77] Make GET_MODE_WIDER return an opt_mode adds 47fbdc12405 [7/77] Add scalar_float_mode adds ca437bbe9f5 [8/77] Simplify gen_trunc/extend_conv_libfunc adds 299dd9faedc [9/77] Add SCALAR_FLOAT_TYPE_MODE adds 0f97e0f567e [10/77] Make assemble_real take a scalar_float_mode adds 243bcce3012 Fix test-case vrp104.c. adds 99d671f4d8a [11/77] Add a float_mode_for_size helper function adds 2b8f2d97726 [12/77] Use opt_scalar_float_mode when iterating over float modes adds a15787d89d7 [13/77] Make floatn_mode return an opt_scalar_float_mode adds d067137d563 [14/77] Make libgcc_floating_mode_supported_p take a scalar [...] adds af8303fa66f [15/77] Add scalar_int_mode adds ced5293f60d [16/77] Add scalar_int_mode_pod adds 44504d18edf [17/77] Add an int_mode_for_size helper function adds 2cf1bb2548b [18/77] Make int_mode_for_mode return an opt_scalar_int_mode adds 1a5d4b274e3 [19/77] Add a smallest_int_mode_for_size helper function adds 8b449599ee0 [20/77] Replace MODE_INT checks with is_int_mode adds 8974b7a3058 [21/77] Replace SCALAR_INT_MODE_P checks with is_a <scalar_ [...] adds 306f8ff589a [22/77] Replace !VECTOR_MODE_P with is_a <scalar_int_mode> adds 1aa8738f7ec [23/77] Replace != VOIDmode checks with is_a <scalar_int_mode> adds b19d5ff813f [24/77] Replace a != BLKmode check with is_a <scalar_int_mode> adds 5c7e74d437a [25/77] Use is_a <scalar_int_mode> for bitmask optimisations adds 4c53345c972 [26/77] Use is_a <scalar_int_mode> in subreg/extract simpli [...] adds 4a36ac446af [27/77] Use is_a <scalar_int_mode> before LOAD_EXTEND_OP adds 58a70f63f35 [28/77] Use is_a <scalar_int_mode> for miscellaneous types of test adds e474368542c [29/77] Make some *_loc_descriptor helpers take scalar_int_mode adds 086e7f88183 [30/77] Use scalar_int_mode for doubleword splits adds 18426c5ba33 [31/77] Use scalar_int_mode for move2add adds 659fb0613e1 [32/77] Check is_a <scalar_int_mode> before calling valid_p [...] adds 69ef1fc16c5 [33/77] Add a NARROWEST_INT_MODE macro adds 03b7a719c91 [34/77] Add a SCALAR_INT_TYPE_MODE macro adds 7a6aeeed207 [35/77] Add uses of as_a <scalar_int_mode> adds 601e68ad56d [36/77] Use scalar_int_mode in the RTL iv routines adds 7cae74a7d81 [37/77] Use scalar_int_mode when emitting cstores adds 819eaef1cd3 [38/77] Move SCALAR_INT_MODE_P out of strict_volatile_bitfield_p adds 1572c088a7b [39/77] Two changes to the get_best_mode interface adds 54fea56dec2 [40/77] Use scalar_int_mode for extraction_insn fields adds 919bc61775a [41/77] Split scalar integer handling out of force_to_mode adds f66719f7cdb [42/77] Use scalar_int_mode in simplify_shift_const_1 adds 6b822de01f1 [43/77] Use scalar_int_mode in simplify_comparison adds 4e49b2be1e9 [44/77] Make simplify_and_const_int take a scalar_int_mode adds 3dae54b308b [45/77] Make extract_left_shift take a scalar_int_mode adds 45f68532978 [46/77] Make widest_int_mode_for_size return a scalar_int_mode adds b8b7729146a [47/77] Make subroutines of nonzero_bits operate on scalar_ [...] adds 2ed966b85ea [48/77] Make subroutines of num_sign_bit_copies operate on [...] adds 652e50b4a3a [49/77] Simplify nonzero/num_sign_bits hooks adds c9d17be3fb2 [50/77] Add helper routines for SUBREG_PROMOTED_VAR_P subregs adds 2216255fe53 [51/77] Use opt_scalar_int_mode when iterating over integer modes adds 5e864fc6d23 [52/77] Use scalar_int_mode in extract/store_bit_field adds 5e7463c2e3e [53/77] Pass a mode to const_scalar_mask_from_tree adds 4c9e65ea19b [54/77] Add explicit int checks for alternative optab imple [...] adds 0a398c03870 [55/77] Use scalar_int_mode in simplify_const_unary_operation adds dc4880990d3 [56/77] Use the more specific type when two modes are known [...] adds fa8ce0e15e7 [57/77] Use scalar_int_mode in expand_expr_addr_expr adds 5e2799ea8ac [58/77] Use scalar_int_mode in a try_combine optimisation adds eb894c13ea6 [59/77] Add a rtx_jump_table_data::get_data_mode helper adds 029b355dea1 [60/77] Pass scalar_int_modes to do_jump_by_parts_* adds f77c4496532 [62/77] Big machine_mode to scalar_int_mode replacement adds cc9f5108bc0 [63/77] Simplifications after type switch adds 9fcae33ea5c [64/77] Add a scalar_mode class adds 3d2b003490a [65/77] Add a SCALAR_TYPE_MODE macro adds 074473dd6e4 [66/77] Use scalar_mode for constant integers adds 69095bb2cde [67/77] Use scalar_mode in fixed-value.* adds 762500c29fc [68/77] Use scalar_mode for is_int_mode/is_float_mode pairs adds cbfe51d0ef9 [69/77] Split scalar-only part out of convert_mode adds bed52d19f58 [70/77] Make expand_fix/float check for scalar modes adds 2b8f5b8a70d [71/77] Use opt_scalar_mode for mode iterators adds 8aec1ebb867 [72/77] Pass scalar_mode to scalar_mode_supported_p adds 4c1a1be292c [73/77] Pass scalar_mode to scalar_mode_supported_p adds 3c8dda1fa50 [74/77] Various small scalar_mode changes adds af71096c672 [76/77] Add a scalar_mode_pod class adds 430c243d294 [77/77] Add a complex_mode class adds d082dc6e6b5 Add some changelog entries that went astray during the mach [...] adds d2db2d23037 Fix IPA ICF with ASM statements (PR inline-asm/82001). adds b5d180e90e9 * simple-object-xcoff.c (simple_object_xcoff_find_sections [...] adds d682d755ccb * config/rs6000/rs6000.c (rs6000_expand_binop_built [...] adds 974534ab98b Add a partial_subreg_p predicate adds 5a462df3950 Drop df_ from df_read_modify_subreg_p new 9184379d377 Document machine_mode wrapper classes new 134bca922b9 PR81635: Use chrecs to help find related data refs new c573f170327 [AArch64] Remove use of wider vector modes new ae382fc0e21 [AArch64] Rename cmp_result iterator new 5613f2c7f2b [AArch64] Tweak aarch64_classify_address interface new 6f8d28e16be [AArch64] Tighten address register subreg checks new 622ac6b1277 Make more use of HWI_COMPUTABLE_MODE_P new d31d0c71c7d Make more use of df_read_modify_subreg_p new 15b2e027a83 Make more use of subreg_lowpart_offset new a58403dd02e Make more use of subreg_size_lowpart_offset new e58b93347b4 Make more use of byte_lowpart_offset new 59b8c099c77 Make more use of GET_MODE_UNIT_SIZE new 9c6733a1269 Make more use of GET_MODE_UNIT_BITSIZE new a1ec398ba3a Make more use of GET_MODE_UNIT_PRECISION new 44a8e2019b2 Add subreg_memory_offset helper functions new 00cc7e135ab Add wider_subreg_mode helper functions new 47720772d67 Turn HARD_REGNO_CALL_PART_CLOBBERED into a target hook new 9e1f04aa57b Turn HARD_REGNO_MODE_OK into a target hook new 855e91178c1 Turn MODES_TIEABLE_P into a target hook new ea2560e6b6d Turn FUNCTION_ARG_PADDING into a target hook new 0b7a57a2d6c [61/77] Use scalar_int_mode in the AArch64 port new 76f725940f6 [75/77] Use scalar_mode in the AArch64 port new a4ddef8bb30 :: AArch64 scalar_float_mode new 8fb1a05e15e Remove DOS file formatting new 1043c4e4a4a Test failures new 6362156b96b [AArch64] Fix address check in SIMD mov expander new 2d4a6c7172b Add a mem_alias_size helper class new f3fe4658903 Add a fixed_size_mode class new 280490f88c0 Add a fixed_size_mode_pod class new 4577c0bb0fe Widening optab cleanup new fed76150418 Use scalar_mode in expand_shift_1 new 59f9745d7a1 Add helpers for shift count modes new 945dd77e44f Use MACRO_MODE for targhooks.c and address.h wrappers new 4966c07417a Turn SLOW_UNALIGNED_ACCESS into a target hook new 5b7698d5031 Use MACRO_MODE for HARD_REGNO_NREGS new a8d9427799b Use MACRO_MODE for SECONDARY_MEMORY_NEEDED_MODE new 046c23eab60 Use MACRO_MODE for SECONDARY_MEMORY_NEEDED new c05e268cac5 Use MACRO_MODE for CANNOT_CHANGE_MODE_CLASS new 8ae1b447f79 Use MACRO_MODE for TRULY_NOOP_TRUNCATION_MODES_P new 3b74158a855 Use MACRO_MODE for FUNCTION_ARG_OFFSET new e717436cf07 Factor out the mode handling in lower-subreg.c new 7b853403367 Add a vect_get_num_copies helper routine new 7c36a40bfe7 Add a vect_worthwhile_without_simd_p helper routine new bbf6e8ec430 Store VECTOR_CST_NELTS directly in tree node new e2fd28a2b69 Pass number of elements alongside tree* when constructing vectors new 3bbd3c25fb2 Add gimple_build_vector* helpers new 80fba7c0d3a Make more use of gimple-fold.h new 1892e471487 Add a vect_get_dr_size helper function new d6f6c239faa Let the target choose a vectorisation alignment new 8dbe5d89b53 Invoke vectorizable_live_operation in a consistent way new a27014c2157 Add rtx const vec_duplicate helpers new e57376c2e8f Allow vector CONSTs new a4c2a6f9c64 compare_values use in extract_range_from_multiplicative_op_1 new e7fd531c4bd Add missing int_cst_rangeN checks to tree-vrp.c new 9e51688e9a4 Tighten tree-ssa-ccp.c:get_value_for_expr condition new 761367ca653 Fix unguarded uses of tree_to_uhwi new fc865e76a32 Add a VEC_SERIES rtl code new 3d85e9e365d Add a VEC_DUPLICATE_EXPR tree code and associated optab new 20ecd91335a Add VEC_SERIES_EXPR and associated optab new 9ae21cca941 Treat VEC_{DUPLICATE,SERIES}_EXPR as gimple constants new 84ca7bf2899 [AArch64] Add an endian_lane_rtx helper routine new 2de57d26f82 Fix for match.pd handling of three-constant bitops new a6074dd98de Fix type of bitstart in vectorizable_live_operation new 0f7e25f1ec4 Add LOOP_VINFO_MAX_VECT_FACTOR new 6b0165da2d0 Move computation of SLP_TREE_NUMBER_OF_VEC_STMTS new e8102e99984 Add poly-int.h new 5e6706ee10b Make mode query functions accept poly_ints new 8f327766306 Add polynomial rtx constants new a73198ac2ad Add polynomial tree constants new 8e128f04959 Add poly_int dump routines new 4dc0411f4aa poly_int: compute_data_ref_aligment new 61d1ee0e4aa Make REG_OFFSET a poly_int64 new 545dd9824f7 Add DWARF support for polynomial offsets new 48678500d77 poly_int: fold_ctor_reference new e795789b559 poly_int: same_addr_size_stores_p new 103e17cf39f poly_int: ao_ref and vn_reference_op_t new b3650f8f7d3 poly_int: dse.c new df85a802172 poly_int: rtx_addr_can_trap_p_1 new 525e2287ff9 poly_int: MEM_OFFSET and MEM_SIZE new a0dd46a0ef9 poly_int: lra frame offsets new 876b5807358 poly_int: create_integer_operand new 3682d889213 poly_int: store_bit_field bitrange new 13d2afb3c6b poly_int: extract_bit_field bitrange new 44d7a750691 poly_int: C++ bitfield regions new d27af5f5ace poly_int: store_field & co new b9707361624 poly_int: SUBREG_BYTE new d232120804a poly_int: operand_subword new acbc0f9da6c poly_int: DWARF CFA offsets new f50003fc032 poly_int: ipa_parm_adjustment new 80e40f880f8 poly_int: get_ref_base_and_extent new 5fb035a4c19 poly_int: get_addr_unit_base_and_extent new f2da546912c poly_int: aff_tree new fa84b42ea9b poly_int: symbolic_number new a545f37cda2 poly_int: pointer_may_wrap_p new cc9642053e7 poly_int: get_inner_reference_aff new dc3372973e1 poly_int: get_inner_reference & co. new 7170c0f4435 poly_int: reload.c new 032b1e9235a poly_int: reload1.c new a4bdcdb55aa poly_int: frame allocations new 1c5dcdbe287 poly_int: push_block/emit_push_insn new 574d5c949f0 poly_int: REG_ARGS_SIZE new 04688e47738 poly_int: argument sizes new d0a672e2e71 poly_int: cfgexpand stack variables new a1604ae11fb poly_int: emit_inc new b330bed7c34 poly_int: reload<->ira interface new d598195e428 poly_int: emit_group_load/store new 600543bebd4 poly_int: int_size_in_bytes new 31448bb9b8f poly_int: bit_field_size/offset new 609cafede17 poly_int: MEM_REF offsets new 6ff053ef376 poly_int: build_ref_for_offset new b9a97106fc9 poly_int: get_binfo_at_offset new c50b244b3d7 poly_int: tree-ssa-loop-ivopts.c:iv_use new c2499903c72 poly_int: loop versioning threshold new 4dcf201cb5b poly_int: prune_runtime_alias_test_list new 6844aafd898 poly_int: vectoriser vf and uf new d3244c323fc poly_int: omp_max_vf new b992d7dd341 poly_int: get_mask_mode new 43b91584c02 poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECT [...] new c7e7a707262 poly_int: vect_no_alias_p new dc8f6196fd5 poly_int: GET_MODE_NUNITS new 828e90b8ce6 poly_int: TYPE_VECTOR_SUBPARTS new 43f6919f4b3 Fix vectorizable_live_operation handling of vector booleans new c6c5fb8f209 poly_int: GET_MODE_PRECISION new 2941a09faa2 poly_int: GET_MODE_BITSIZE new 2b9f5c0d0a0 poly_int: GET_MODE_SIZE new 3cd0f81d0dc Base subreg rules on REGMODE_NATURAL_SIZE rather than UNITS [...] new b7057260c30 Use poly_int tree accessors instead of hwi accessors new be8bf9c81f8 Use poly_int rtx accessors instead of hwi accessors new 64a2a1633b1 Make more use of simplify_gen_binary new 5f9431c6912 Don't query the frontend for unsupported types new 86ec0ae2673 Improve spilling for variable-width slots new 965be7a657e Add support for MODE_VECTOR_BOOL new a56b53471c1 Add support for adjusting the number of units in a mode new b49252af6b0 Allow the target to set MAX_BITSIZE_MODE_ANY_MODE new 1d9d2273d05 Use extract_bit_field_as_subreg for vectors new 4c44020ddb9 Fix infinite loop in simplify_operand_subreg new 0b4388ad940 Prevent invalid register mode changes in combine new e0f8cc3629e Improve canonicalisation of TARGET_MEM_REFs new 2bac4ca4418 Improve vector mask pattern handling new 7af9a859710 Improve ivopts handling of forced scales new 4367f5bf60e Fix a failure in the Fortran matmul* tests new 0128e8e7447 SUBREG_PROMOTED_VAR_P handling in expand_direct_optab_fn new acd918df726 [AArch64] Move code around new 6021c26b290 [AArch64] Rework interface to add constant/offset routines new edde69cff46 [AArch64] Set NUM_POLY_INT_COEFFS to 2 new 0a160ce23a3 [AArch64] Rename the internal "Upl" constraint new 14c167705e9 [AArch64] Add const_offset field to aarch64_address_info new 8bbff76af71 [AArch64] Rewrite aarch64_simd_valid_immediate new 46ccce1d2ee [AArch64] Generate permute patterns using rtx builders new 2e9decfa821 Add copy_rtx call to RTL loop unroller new 12e91f3bfcf Use asm volatile ("" ::: "memory") new 87c7066731a Add VECTOR_BITS to tree-vect.h new 7e35dc0a4cd mask load/store for external masks new 736b6826217 Include phis in SLP unrolling calculation new 4739e84566c available_vector_sizes new 3b9ab440cd5 vect_permN new c9d40003243 vect_element_align_preferred new 02f9a01aade target_vect_unaligned_possible new 8bf1c9c0a03 vect_variable_length new 20a7bd15f6c vect_align_stack_vars new e23ec9dad86 vect_masked_store new 0b2816878d6 Revert DECL_USER_ALIGN patch new de2ea7955cd [AArch64] Add SVE support new 6e61c8b1aba [AArch64] Testsuite markup for SVE new 1e7b7aa7f05 Fix folding of vector mask EQ/NE expressions new e5961e3e42d [AArch64] SVE load/store_lanes support new ec7f16574ce Add support for masked load/store_lanes new 6d3c0c80532 Add support for bitwise reductions new 293de6c6d04 Add optabs for common types of permutation new a6ee36074fd Handle more SLP constant and extern definitions for variable VF new 186510699ea SLP reductions with variable-length vectors new 0a07ca4ca8e Protect against min_profitable_iters going negative new b8909e1644a Add support for fully-predicated loops new 3e5f1e3de01 Improve VIEW_CONVERT_EXPR for vector booleans new d49cf7f1f0a Make ivopts handle calls to internal functions new bcaa08695bf Allow the number of iterations to be smaller than VF new b571c3b0252 Handle peeling for alignment with masking new b66b3360685 Improve ivopts handling of offset multiples new c1272426587 Rework the legitimize_address_displacement hook new 4facf5df6d8 Allow combine to reorder statements new c7fc84169bd Predicated comparison folds new 2d95cd7a7ab Predicated arithmetic folds new 41c61ca4b15 Add an empty_mask_is_expensive hook new a02083ceae8 Reuse results of vect_create_addr_base_for_vector_ref new 27833eac9f0 Allow capped vectorisation factors new 58c3cfc4a9c Add support for BRKA and LASTB new 0ec2c9fc35b Add support for CLASTB new 81eae38310a Add support for FADDA new 82383d43c0f Add support for gather loads and scatter stores new 4cccc5da881 Avoid pessimistic check for overlapping groups new 857764c9041 Fix for big field stores new 78d05edf637 Support for aliasing with variable strides new 4f7add366dd Add support for speculative loads new 8447f4d0a5d Add support for first-faulting loads new a563591bb2b Allow single-element interleaving for non-power-of-2 strides new 93b508b8b4a Use single-iteration epilogues when peeling for gaps new 393e83a78b0 Replace FMA_EXPR with one internal fn per optab new 87e9d41425e Support fused multiply-adds in fully-masked reductions new d30577fad8c Record equivalences for spill registers new e6b55fa8438 Add early rematerialisation pass new 3c09bebbbaa Don't require an integer mode for PARALLELs new b83ef105ceb Remove unnecessary temporary in tree-if-conv.c new 37c4434f0a5 Handle vector boolean types when calculating the SLP unroll factor new 571f8152b77 Implement SLP of internal functions new 56cac150ce5 Use conditional internal functions in if-conversion new 1194edef4c5 Work around PR81082

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Summary of changes: gcc/ChangeLog | 2329 +++++++++++++++++++- gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 58 + gcc/ada/gcc-interface/decl.c | 2 +- gcc/ada/gcc-interface/misc.c | 22 +- gcc/ada/gcc-interface/trans.c | 2 +- gcc/builtins.c | 4 +- gcc/c-family/ChangeLog | 68 + gcc/c-family/c-common.c | 18 +- gcc/c-family/c-cppbuiltin.c | 2 +- gcc/c-family/c-lex.c | 2 +- gcc/c-family/c-pragma.c | 2 +- gcc/c/ChangeLog | 15 + gcc/c/c-tree.h | 2 +- gcc/caller-save.c | 2 +- gcc/cgraphunit.c | 8 +- gcc/combine.c | 22 +- gcc/config.gcc | 1 + gcc/config/aarch64/aarch64-protos.h | 4 - gcc/config/aarch64/aarch64.c | 76 +- gcc/config/aarch64/aarch64.h | 13 - gcc/config/alpha/alpha.c | 33 + gcc/config/alpha/alpha.h | 21 - gcc/config/arc/arc.c | 41 +- gcc/config/arc/arc.h | 21 - gcc/config/arm/arm-protos.h | 3 - gcc/config/arm/arm.c | 46 +- gcc/config/arm/arm.h | 9 - gcc/config/arm/arm.md | 4 +- gcc/config/avr/avr-protos.h | 2 - gcc/config/avr/avr.c | 34 +- gcc/config/avr/avr.h | 7 - gcc/config/bfin/bfin-protos.h | 1 - gcc/config/bfin/bfin.c | 33 +- gcc/config/bfin/bfin.h | 21 - gcc/config/bfin/predicates.md | 2 +- gcc/config/c6x/c6x.c | 26 +- gcc/config/c6x/c6x.h | 8 - gcc/config/cr16/cr16-protos.h | 1 - gcc/config/cr16/cr16.c | 33 +- gcc/config/cr16/cr16.h | 12 +- gcc/config/cris/cris.c | 16 + gcc/config/cris/cris.h | 15 - gcc/config/epiphany/epiphany-protos.h | 1 - gcc/config/epiphany/epiphany.c | 12 +- gcc/config/epiphany/epiphany.h | 15 - gcc/config/fr30/fr30.h | 21 +- gcc/config/fr30/fr30.md | 19 +- gcc/config/frv/frv-protos.h | 1 - gcc/config/frv/frv.c | 79 +- gcc/config/frv/frv.h | 72 +- gcc/config/frv/frv.md | 19 +- gcc/config/ft32/ft32.h | 10 - gcc/config/h8300/h8300-protos.h | 1 - gcc/config/h8300/h8300.c | 26 +- gcc/config/h8300/h8300.h | 14 - gcc/config/i386/i386-protos.h | 2 - gcc/config/i386/i386.c | 368 ++-- gcc/config/i386/i386.h | 39 +- gcc/config/i386/i386.md | 16 +- gcc/config/i386/i386.opt | 16 +- gcc/config/ia64/hpux.h | 4 - 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gcc/testsuite/gcc.target/i386/vect-cond-1.c | 2 +- gcc/testsuite/gcc.target/i386/vect8-ret.c | 3 +- gcc/testsuite/gcc.target/msp430/pr80993.c | 13 + gcc/testsuite/gcc.target/powerpc/dform-1.c | 3 +- gcc/testsuite/gcc.target/powerpc/dform-2.c | 3 +- gcc/testsuite/gcc.target/powerpc/dform-3.c | 2 +- .../gcc.target/powerpc/fold-vec-perm-char.c | 31 + .../gcc.target/powerpc/fold-vec-perm-double.c | 17 + .../gcc.target/powerpc/fold-vec-perm-float.c | 16 + .../gcc.target/powerpc/fold-vec-perm-int.c | 31 + .../gcc.target/powerpc/fold-vec-perm-longlong.c | 32 + .../gcc.target/powerpc/fold-vec-perm-pixel.c | 16 + .../gcc.target/powerpc/fold-vec-perm-short.c | 29 + .../gcc.target/{i386 => powerpc}/m128-check.h | 20 +- gcc/testsuite/gcc.target/powerpc/mmx-packuswb-1.c | 2 + gcc/testsuite/gcc.target/powerpc/pr71656-1.c | 3 +- gcc/testsuite/gcc.target/powerpc/pr71656-2.c | 3 +- gcc/testsuite/gcc.target/powerpc/pr80098-1.c | 3 +- gcc/testsuite/gcc.target/powerpc/pr80103-1.c | 5 +- gcc/testsuite/gcc.target/powerpc/pr82015.c | 14 + .../gcc.target/{i386 => powerpc}/sse-addps-1.c | 13 +- gcc/testsuite/gcc.target/powerpc/sse-addss-1.c | 56 + .../gcc.target/{i386 => powerpc}/sse-andnps-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-andps-1.c | 13 +- gcc/testsuite/gcc.target/powerpc/sse-check.h | 41 + .../gcc.target/{i386 => powerpc}/sse-cmpss-1.c | 35 +- gcc/testsuite/gcc.target/powerpc/sse-cvtpi16ps-1.c | 40 + gcc/testsuite/gcc.target/powerpc/sse-cvtpi32ps-1.c | 42 + .../gcc.target/powerpc/sse-cvtpi32x2ps-1.c | 43 + gcc/testsuite/gcc.target/powerpc/sse-cvtpi8ps-1.c | 41 + gcc/testsuite/gcc.target/powerpc/sse-cvtpspi16-1.c | 41 + gcc/testsuite/gcc.target/powerpc/sse-cvtpspi8-1.c | 41 + gcc/testsuite/gcc.target/powerpc/sse-cvtpu16ps-1.c | 41 + gcc/testsuite/gcc.target/powerpc/sse-cvtpu8ps-1.c | 41 + .../gcc.target/{i386 => powerpc}/sse-cvtsi2ss-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-cvtsi2ss-2.c | 15 +- .../gcc.target/{i386 => powerpc}/sse-cvtss2si-1.c | 16 +- .../gcc.target/{i386 => powerpc}/sse-cvtss2si-2.c | 15 +- .../gcc.target/{i386 => powerpc}/sse-cvttss2si-1.c | 14 +- .../gcc.target/{i386 => powerpc}/sse-cvttss2si-2.c | 16 +- .../gcc.target/{i386 => powerpc}/sse-divps-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-divss-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-maxps-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-maxss-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-minps-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-minss-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-movaps-1.c | 16 +- .../gcc.target/{i386 => powerpc}/sse-movaps-2.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-movhlps-1.c | 14 +- .../gcc.target/{i386 => powerpc}/sse-movhps-1.c | 14 +- .../gcc.target/{i386 => powerpc}/sse-movhps-2.c | 14 +- .../gcc.target/{i386 => powerpc}/sse-movlhps-1.c | 14 +- .../sse-movhps-1.c => powerpc/sse-movlps-1.c} | 25 +- .../sse-movhps-2.c => powerpc/sse-movlps-2.c} | 20 +- gcc/testsuite/gcc.target/powerpc/sse-movmskb-1.c | 45 + .../gcc.target/{i386 => powerpc}/sse-movmskps-1.c | 16 +- gcc/testsuite/gcc.target/powerpc/sse-movss-1.c | 50 + .../gcc.target/{i386 => powerpc}/sse-movss-2.c | 14 +- .../gcc.target/{i386 => powerpc}/sse-movss-3.c | 14 +- .../gcc.target/{i386 => powerpc}/sse-mulps-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-mulss-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-orps-1.c | 13 +- .../powerpc/{mmx-paddsw-1.c => sse-pavgw-1.c} | 36 +- .../powerpc/{mmx-paddw-1.c => sse-pmaxsw-1.c} | 26 +- .../powerpc/{mmx-pcmpgtb-1.c => sse-pmaxub-1.c} | 27 +- .../powerpc/{mmx-pcmpgtw-1.c => sse-pminsw-1.c} | 23 +- .../powerpc/{mmx-pcmpgtb-1.c => sse-pminub-1.c} | 26 +- .../powerpc/{mmx-pmullw-1.c => sse-pmulhuw-1.c} | 17 +- .../powerpc/{mmx-pcmpeqb-1.c => sse-psadbw-1.c} | 27 +- .../gcc.target/{i386 => powerpc}/sse-rcpps-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-rsqrtps-1.c | 13 +- .../sse2-shufps-1.c => powerpc/sse-shufps-1.c} | 37 +- .../gcc.target/{i386 => powerpc}/sse-sqrtps-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-subps-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-subss-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-ucomiss-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-ucomiss-2.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-ucomiss-3.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-ucomiss-4.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-ucomiss-5.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-ucomiss-6.c | 13 +- .../gcc.target/{i386 => powerpc}/sse-unpckhps-1.c | 14 +- .../gcc.target/{i386 => powerpc}/sse-unpcklps-1.c | 14 +- .../gcc.target/{i386 => powerpc}/sse-xorps-1.c | 13 +- gcc/testsuite/gfortran.dg/dec_init_1.f90 | 2 +- gcc/testsuite/gfortran.dg/dec_init_2.f90 | 2 +- gcc/testsuite/gfortran.dg/dec_init_3.f90 | 2 +- gcc/testsuite/gfortran.dg/inline_matmul_19.f90 | 34 + .../gfortran.dg/warn_target_lifetime_3.f90 | 2 +- .../gfortran.dg/warn_target_lifetime_4.f90 | 28 + gcc/testsuite/gnat.dg/noinline2.adb | 2 +- gcc/testsuite/gnat.dg/renaming6.adb | 6 +- gcc/testsuite/gnat.dg/renaming6.ads | 2 +- gcc/testsuite/gnat.dg/specs/noinline3.ads | 2 +- gcc/testsuite/lib/target-supports.exp | 346 +-- gcc/timevar.def | 1 + gcc/toplev.c | 3 +- gcc/tree-call-cdce.c | 1 + gcc/tree-if-conv.c | 4 +- gcc/tree-pass.h | 1 + gcc/tree-pretty-print.c | 2 +- gcc/tree-ssa-dom.c | 523 +++-- gcc/tree-ssa-loop-niter.c | 6 +- gcc/tree-ssa-math-opts.c | 5 + gcc/tree-ssa-sccvn.c | 2 +- gcc/tree-ssanames.c | 4 +- gcc/tree-switch-conversion.c | 1178 ++++++++++ gcc/tree-vect-generic.c | 2 +- gcc/tree-vect-loop.c | 12 +- gcc/tree-vect-patterns.c | 6 +- gcc/tree-vect-slp.c | 15 +- gcc/tree-vect-stmts.c | 119 +- gcc/var-tracking.c | 2 +- gcc/varasm.c | 2 +- libgfortran/ChangeLog | 11 + libgfortran/io/list_read.c | 5 - libgfortran/io/transfer.c | 8 +- libgfortran/io/unit.c | 84 +- libgfortran/io/write.c | 5 - libgo/configure | 17 +- libgo/configure.ac | 6 +- libgo/go/net/internal/socktest/sys_unix.go | 2 +- libgo/go/runtime/lfstack_64bit.go | 18 + libgo/mksysinfo.sh | 1 + libgo/runtime/go-nosys.c | 2 +- libiberty/ChangeLog | 13 + libiberty/simple-object-elf.c | 4 +- libiberty/simple-object-xcoff.c | 132 +- libobjc/ChangeLog | 7 + libstdc++-v3/ChangeLog | 20 + libstdc++-v3/include/bits/stl_list.h | 74 +- 546 files changed, 13551 insertions(+), 5799 deletions(-) copy gcc/config/{i386/pmm_malloc.h => rs6000/mm_malloc.h} (73%) create mode 100644 gcc/config/rs6000/xmmintrin.h create mode 100644 gcc/testsuite/g++.dg/cpp0x/constexpr-conv2.C copy gcc/testsuite/g++.dg/cpp0x/{inh-ctor24.C => lambda/lambda-mangle5.C} (57%) create mode 100644 gcc/testsuite/g++.dg/cpp1y/lambda-generic-const5.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/lambda-generic-this1.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/lambda-generic-this1a.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/constexpr-lambda16.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/fold-lambda.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/lambda-inherit1.C create mode 100644 gcc/testsuite/g++.dg/diagnostic/param-type-mismatch.C create mode 100644 gcc/testsuite/g++.dg/ext/is_constructible1.C create mode 100644 gcc/testsuite/g++.dg/lto/pr81940_0.C create mode 100644 gcc/testsuite/g++.dg/torture/pr81977.C create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr81503.c create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr81913.c create mode 100644 gcc/testsuite/gcc.dg/atomic/pr80640.c create mode 100644 gcc/testsuite/gcc.dg/ipa/pr82001.c create mode 100644 gcc/testsuite/gcc.dg/param-type-mismatch.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/builtins-folding-gimple-2.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/builtins-folding-gimple-3.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/loop-niter-1.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/loop-niter-2.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr81908.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-11.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-12.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-13.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-14.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-15.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-16.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-17.c create mode 100644 gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-slp.c create mode 100644 gcc/testsuite/gcc.target/i386/pr80969-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr80969-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr80969-2a.c create mode 100644 gcc/testsuite/gcc.target/i386/pr80969-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr80969-4.c copy gcc/testsuite/gcc.target/i386/{vararg-6.c => pr80969-4.h} (75%) create mode 100644 gcc/testsuite/gcc.target/i386/pr80969-4a.c create mode 100644 gcc/testsuite/gcc.target/i386/pr80969-4b.c create mode 100644 gcc/testsuite/gcc.target/i386/pr81921.c create mode 100644 gcc/testsuite/gcc.target/msp430/pr80993.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-perm-char.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-perm-double.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-perm-float.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-perm-int.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-perm-longlong.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-perm-pixel.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-perm-short.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/m128-check.h (96%) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr82015.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-addps-1.c (72%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse-addss-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-andnps-1.c (76%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-andps-1.c (78%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse-check.h copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-cmpss-1.c (64%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse-cvtpi16ps-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse-cvtpi32ps-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse-cvtpi32x2ps-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse-cvtpi8ps-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse-cvtpspi16-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse-cvtpspi8-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse-cvtpu16ps-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse-cvtpu8ps-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-cvtsi2ss-1.c (69%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-cvtsi2ss-2.c (68%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-cvtss2si-1.c (65%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-cvtss2si-2.c (66%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-cvttss2si-1.c (65%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-cvttss2si-2.c (63%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-divps-1.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-divss-1.c (74%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-maxps-1.c (73%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-maxss-1.c (73%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-minps-1.c (73%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-minss-1.c (73%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-movaps-1.c (52%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-movaps-2.c (68%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-movhlps-1.c (69%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-movhps-1.c (71%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-movhps-2.c (67%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-movlhps-1.c (70%) copy gcc/testsuite/gcc.target/{i386/sse-movhps-1.c => powerpc/sse-movlps-1.c} (59%) copy gcc/testsuite/gcc.target/{i386/sse-movhps-2.c => powerpc/sse-movlps-2.c} (58%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse-movmskb-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-movmskps-1.c (63%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse-movss-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-movss-2.c (67%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-movss-3.c (72%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-mulps-1.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-mulss-1.c (74%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-orps-1.c (76%) copy gcc/testsuite/gcc.target/powerpc/{mmx-paddsw-1.c => sse-pavgw-1.c} (57%) copy gcc/testsuite/gcc.target/powerpc/{mmx-paddw-1.c => sse-pmaxsw-1.c} (58%) copy gcc/testsuite/gcc.target/powerpc/{mmx-pcmpgtb-1.c => sse-pmaxub-1.c} (53%) copy gcc/testsuite/gcc.target/powerpc/{mmx-pcmpgtw-1.c => sse-pminsw-1.c} (60%) copy gcc/testsuite/gcc.target/powerpc/{mmx-pcmpgtb-1.c => sse-pminub-1.c} (55%) copy gcc/testsuite/gcc.target/powerpc/{mmx-pmullw-1.c => sse-pmulhuw-1.c} (72%) copy gcc/testsuite/gcc.target/powerpc/{mmx-pcmpeqb-1.c => sse-psadbw-1.c} (54%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-rcpps-1.c (73%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-rsqrtps-1.c (73%) copy gcc/testsuite/gcc.target/{i386/sse2-shufps-1.c => powerpc/sse-shufps-1.c} (53%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-sqrtps-1.c (72%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-subps-1.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-subss-1.c (74%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-ucomiss-1.c (72%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-ucomiss-2.c (72%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-ucomiss-3.c (72%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-ucomiss-4.c (72%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-ucomiss-5.c (72%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-ucomiss-6.c (72%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-unpckhps-1.c (70%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-unpcklps-1.c (70%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse-xorps-1.c (76%) create mode 100644 gcc/testsuite/gfortran.dg/inline_matmul_19.f90 create mode 100644 gcc/testsuite/gfortran.dg/warn_target_lifetime_4.f90