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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allyesconfig in repository toolchain/ci/llvm-project.

from 3f43d803382d [libc++] Re-enable workaround for pre-ranges CTAD in std::span adds bd8dc965cff1 Bump version to 14.0.1 adds 0547ffef5d39 workflows: Consolidate tests to reduce the number of build jobs adds 99c0f85ef992 Re-commit: Driver: Don't warn on -mbranch-protection when linking adds fe5c24e93754 [docs] Fix typo in tutorial adds f3b89727716a [Driver][OpenBSD] Disable unwind tables on Arm adds 63e7af77ec42 [Clang][NeonEmitter] emit ret decl first for -Wdeclaration [...] adds b69247dcbd80 [libcxx] random_device, specify optimal entropy properties [...] adds 23d08271a4b2 Add cmake/ to release tarballs via concatenation adds 22d7bee01a5a [PPCISelLowering] Avoid emitting calls to __multi3, __muloti4 adds db07d9f098b3 [MC] Fix llvm_unreachable when a STB_GNU_UNIQUE symbol nee [...] adds a4681df0202c [libcxx] [test] Avoid spurious test breakage in clang-cl-d [...] adds e9b26b5b2a70 [RISCV] Add test case for miscompile caused by treating AN [...] adds 5b9dd016bec7 [SelectionDAG][RISCV] Make RegsForValue::getCopyToRegs exp [...] adds c9ec4902c3e3 [llvm-objdump][test] dos2unix some files adds 1007cb795a3c [llvm-objdump] --private-headers: change errors to warning [...] adds 311a622edd31 [Object][test] Fix invalid.test adds 353068233f21 [ELF] Fix llvm_unreachable failure when COMMON is placed i [...] adds 67a290460c37 [VectorCombine] Insert addrspacecast when crossing address [...] adds d53e2603383a [AArch64] Allow .variant_pcs before the symbol is registered adds fd98b0f1a6a1 [SelectionDAG] Don't create illegally-typed nodes while co [...] adds d150523f0776 [AArch64] Use correct calling convention for each vararg adds aaf0c921a54a [clang-repl] Add an accessor to our underlying execution engine adds ec13fed5867f [X86] lowerV8I16Shuffle - use explicit SmallVector<SDValue [...] adds d4e3c50b2bda [libc++] Define `namespace views` in its own detail header. adds 8475349bd639 [AARCH64] ssbs should be enabled by default for cortex-x1, [...] adds 6697c5bc3a1e [compiler-rt] [scudo] Use -mcrc32 on x86 when available adds c62053979489 [AArch64] Fix the upper limit for folded address offsets for COFF adds 5c9eed741dbd [libc++] Make __dir_stream visibility declaration consistent adds 87599bdabbd1 [RISCV] Store/restore RISCVMachineFunctionInfo into MIR YAML file adds b6e91d4a331e [RISCV] Pre-commit for fixing stack offset for RVV object adds d0f27fb44952 [RISCV] Fixing stack offset for RVV object with vararg in stack. adds 2c4d288eae8b [RISCV][NFC] Add missing lit.local.cfg in test/CodeGen/MIR/RISCV/ adds fe8a27acd716 [LV] Handle zero cost loops in selectInterleaveCount. adds 5ea5e3c01b7b [InstCombine] add tests for low-mask of ashr; NFC adds 43ee392dd462 [InstCombine] try to fold low-mask of ashr to lshr adds 8c3445ac1c8b [AArch64][LOH] Don't ignore regmasks in bundles by iterati [...]

No new revisions were added by this update.

Summary of changes: .github/workflows/clang-tests.yml | 38 +- .github/workflows/libclc-tests.yml | 51 +- .github/workflows/lld-tests.yml | 38 +- .github/workflows/lldb-tests.yml | 45 +- .github/workflows/llvm-project-tests.yml | 62 ++ .github/workflows/llvm-tests.yml | 49 +- clang/include/clang/Driver/Options.td | 1 + clang/include/clang/Interpreter/Interpreter.h | 2 + clang/lib/Driver/ToolChains/OpenBSD.cpp | 9 + clang/lib/Driver/ToolChains/OpenBSD.h | 4 +- clang/lib/Interpreter/IncrementalExecutor.h | 1 + clang/lib/Interpreter/Interpreter.cpp | 6 + clang/test/CodeGen/aarch64-neon-ldst-one.c | 168 +++--- clang/test/CodeGen/arm_neon_intrinsics.c | 102 ++-- clang/test/Driver/aarch64-security-options.c | 7 + clang/test/Driver/aarch64-ssbs.c | 4 + clang/test/Driver/openbsd.c | 3 +- clang/test/Preprocessor/aarch64-target-features.c | 2 +- clang/test/Sema/arm-neon-decl-after-stmt.c | 12 + clang/utils/TableGen/NeonEmitter.cpp | 23 +- compiler-rt/cmake/config-ix.cmake | 1 + compiler-rt/lib/scudo/CMakeLists.txt | 7 +- compiler-rt/lib/scudo/scudo_allocator.cpp | 4 +- compiler-rt/lib/scudo/scudo_crc32.cpp | 4 +- compiler-rt/lib/scudo/scudo_crc32.h | 12 +- compiler-rt/lib/scudo/standalone/CMakeLists.txt | 7 +- compiler-rt/lib/scudo/standalone/checksum.h | 8 +- compiler-rt/lib/scudo/standalone/chunk.h | 4 +- compiler-rt/lib/scudo/standalone/crc32_hw.cpp | 4 +- libcxx/CMakeLists.txt | 2 +- libcxx/include/CMakeLists.txt | 1 + libcxx/include/__filesystem/directory_entry.h | 2 +- libcxx/include/__ranges/views.h | 35 ++ libcxx/include/module.modulemap | 1 + libcxx/include/ranges | 11 +- libcxx/src/random.cpp | 2 +- .../detail.headers/ranges/views.module.verify.cpp | 15 + .../pointer.volatile.pass.cpp | 16 +- libcxxabi/CMakeLists.txt | 2 +- libunwind/CMakeLists.txt | 2 +- lld/ELF/SyntheticSections.h | 4 +- lld/test/ELF/linkerscript/common.s | 75 ++- llvm/CMakeLists.txt | 2 +- .../MyFirstLanguageFrontend/LangImpl03.rst | 2 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 12 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 5 +- llvm/lib/MC/ELFObjectWriter.cpp | 1 + llvm/lib/Object/ELF.cpp | 2 - llvm/lib/Support/AArch64TargetParser.cpp | 2 + llvm/lib/Target/AArch64/AArch64.td | 7 +- llvm/lib/Target/AArch64/AArch64CollectLOH.cpp | 2 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 153 ++--- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 7 +- .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 16 +- .../AArch64/GISel/AArch64PreLegalizerCombiner.cpp | 7 +- .../AArch64/MCTargetDesc/AArch64ELFStreamer.cpp | 1 + llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 + llvm/lib/Target/RISCV/CMakeLists.txt | 1 + llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 23 +- llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp | 30 + llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h | 25 + llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 23 + llvm/lib/Target/RISCV/RISCVTargetMachine.h | 8 + llvm/lib/Target/X86/X86ISelLowering.cpp | 3 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 6 + llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 22 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 8 +- llvm/test/CodeGen/AArch64/darwinpcs-tail.ll | 36 ++ llvm/test/CodeGen/AArch64/fold-global-offsets.ll | 16 +- llvm/test/CodeGen/AArch64/loh.mir | 9 + .../CostModel => CodeGen/MIR}/RISCV/lit.local.cfg | 0 .../CodeGen/MIR/RISCV/machine-function-info.mir | 138 +++++ .../PowerPC/overflow-intrinsic-optimizations.ll | 12 + .../PowerPC/umulo-128-legalisation-lowering.ll | 169 +++--- .../CodeGen/PowerPC/urem-seteq-illegal-types.ll | 61 +- llvm/test/CodeGen/RISCV/aext-to-sext.ll | 39 ++ .../CodeGen/RISCV/rvv/constant-folding-crash.ll | 85 +++ .../rvv/wrong-stack-offset-for-rvv-object.mir | 220 +++++++ llvm/test/MC/AArch64/directive-variant_pcs-err.s | 3 - llvm/test/MC/AArch64/directive-variant_pcs.s | 42 +- llvm/test/MC/ELF/gnu-unique.s | 11 +- llvm/test/Object/invalid.test | 5 +- llvm/test/Transforms/InstCombine/and.ll | 90 ++- ...-select-interleave-count-loop-with-cost-zero.ll | 50 ++ .../AMDGPU/as-transition-inseltpoison.ll | 4 +- .../VectorCombine/AMDGPU/as-transition.ll | 4 +- .../VectorCombine/X86/load-inseltpoison.ll | 17 + .../tools/llvm-objdump/ELF/dynamic-malformed.test | 38 ++ llvm/test/tools/llvm-objdump/ELF/invalid-phdr.test | 5 +- .../tools/llvm-objdump/ELF/private-headers.test | 130 ++--- .../tools/llvm-objdump/ELF/program-headers.test | 649 +++++++++++---------- llvm/tools/llvm-objdump/ELFDump.cpp | 8 +- llvm/utils/gn/secondary/llvm/version.gni | 2 +- llvm/utils/lit/lit/__init__.py | 2 +- llvm/utils/release/build_llvm_package.bat | 4 +- llvm/utils/release/export.sh | 20 +- .../llvm/include/llvm/Config/llvm-config.h | 2 +- 97 files changed, 2022 insertions(+), 1065 deletions(-) create mode 100644 .github/workflows/llvm-project-tests.yml create mode 100644 clang/test/Sema/arm-neon-decl-after-stmt.c create mode 100644 libcxx/include/__ranges/views.h create mode 100644 libcxx/test/libcxx/diagnostics/detail.headers/ranges/views.modu [...] create mode 100644 llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp create mode 100644 llvm/test/CodeGen/AArch64/darwinpcs-tail.ll copy llvm/test/{Analysis/CostModel => CodeGen/MIR}/RISCV/lit.local.cfg (100%) create mode 100644 llvm/test/CodeGen/MIR/RISCV/machine-function-info.mir create mode 100644 llvm/test/CodeGen/RISCV/rvv/constant-folding-crash.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir create mode 100644 llvm/test/Transforms/LoopVectorize/X86/pr54413-select-interleav [...] create mode 100644 llvm/test/tools/llvm-objdump/ELF/dynamic-malformed.test