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from 60d2bcc55bc RISC-V: Handle "(a & twobits) == singlebit" in branches using Zbs new 3142265dedd RISC-V: No extensions for SImode min/max against safe constant

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Summary of changes: gcc/config/riscv/bitmanip.md | 18 ++++++++++++++++++ gcc/config/riscv/iterators.md | 4 ++++ gcc/testsuite/gcc.target/riscv/zbb-min-max-02.c | 14 ++++++++++++++ 3 files changed, 36 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-min-max-02.c