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from 96a468842ef rs6000: Rework vector integer comparison in rs6000_emit_vec [...] new e0a402b3e28 RISC-V: Move scalar SAT_ADD test cases to a isolated folder new 3757009af71 testsuite: fix g++.dg/tree-ssa/pr58483.C

The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: gcc/testsuite/g++.dg/tree-ssa/pr58483.C | 3 +-- gcc/testsuite/gcc.target/riscv/riscv.exp | 12 ++++++++++++ gcc/testsuite/gcc.target/riscv/{ => sat}/sat_arith.h | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_arith_data.h | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-1-i16.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-1-i32.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-1-i64.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-1-i8.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-2-i16.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-2-i32.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-2-i64.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-2-i8.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-3-i16.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-3-i32.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-3-i64.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-3-i8.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-4-i16.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-4-i32.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-4-i64.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-4-i8.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-1-i16.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-1-i32.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-1-i64.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-1-i8.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-2-i16.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-2-i32.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-2-i64.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-2-i8.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-3-i16.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-3-i32.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-3-i64.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-3-i8.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-4-i16.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-4-i32.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-4-i64.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add-run-4-i8.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-1-1.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-1.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-2-1.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-2.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-3-1.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-3.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-4.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add_imm-run-1.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add_imm-run-2.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add_imm-run-3.c | 0 .../gcc.target/riscv/{ => sat}/sat_s_add_imm-run-4.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-1-u16.c | 2 +- gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-1-u32.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-1-u64.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-1-u8.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-2-u16.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-2-u32.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-2-u64.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-2-u8.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-3-u16.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-3-u32.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-3-u64.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-3-u8.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-4-u16.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-4-u32.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-4-u64.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-4-u8.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-5-u16.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-5-u32.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-5-u64.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-5-u8.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-6-u16.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-6-u32.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-6-u64.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-6-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-1-u16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-1-u32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-1-u64.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-1-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-2-u16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-2-u32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-2-u64.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-2-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-3-u16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-3-u32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-3-u64.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-3-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-4-u16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-4-u32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-4-u64.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-4-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-5-u16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-5-u32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-5-u64.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-5-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-6-u16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-6-u32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-6-u64.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add-run-6-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-1-u16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-1-u32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-1-u64.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-1-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-2-u16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-2-u32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-2-u64.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-2-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-3-u16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-3-u32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-3-u64.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-3-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-4-u16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-4-u32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-4-u64.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-4-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-1-u16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-1-u32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-1-u64.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-1-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-2-u16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-2-u32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-2-u64.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-2-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-3-u16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-3-u32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-3-u64.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-3-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-4-u16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-4-u32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-4-u64.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm-run-4-u8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-1.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-10.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-11.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-12.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-13.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-14.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-15.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-16.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-17.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-18.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-19.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-2.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-20.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-21.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-22.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-23.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-24.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-25.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-26.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-27.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-28.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-29.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-3.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-30.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-31.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-32.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-33.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-34.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-35.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-36.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-37.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-38.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-39.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-4.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-40.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-41.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-42.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-43.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-44.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-45.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-46.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-47.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-48.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-49.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-5.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-50.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-51.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-52.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-53.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-54.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-55.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-56.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-57.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-58.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-59.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-6.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-60.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-7.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-8.c | 0 .../gcc.target/riscv/{ => sat}/sat_u_add_imm_type_check-9.c | 0 gcc/testsuite/gcc.target/riscv/{ => sat}/scalar_sat_binary.h | 0 .../gcc.target/riscv/{ => sat}/scalar_sat_binary_run_xxx.h | 0 189 files changed, 14 insertions(+), 3 deletions(-) copy gcc/testsuite/gcc.target/riscv/{ => sat}/sat_arith.h (100%) copy gcc/testsuite/gcc.target/riscv/{ => sat}/sat_arith_data.h (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-1-i16.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-1-i32.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-1-i64.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-1-i8.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-2-i16.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-2-i32.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-2-i64.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-2-i8.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-3-i16.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-3-i32.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-3-i64.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-3-i8.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-4-i16.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-4-i32.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-4-i64.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-4-i8.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-1-i16.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-1-i32.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-1-i64.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-1-i8.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-2-i16.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-2-i32.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-2-i64.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-2-i8.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-3-i16.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-3-i32.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-3-i64.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-3-i8.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-4-i16.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-4-i32.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-4-i64.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add-run-4-i8.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-1-1.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-1.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-2-1.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-2.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-3-1.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-3.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-4.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-run-1.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-run-2.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-run-3.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_s_add_imm-run-4.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-1-u16.c (91%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-1-u32.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-1-u64.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-1-u8.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-2-u16.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-2-u32.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-2-u64.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-2-u8.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-3-u16.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-3-u32.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-3-u64.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-3-u8.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-4-u16.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-4-u32.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-4-u64.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-4-u8.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-5-u16.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-5-u32.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-5-u64.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-5-u8.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-6-u16.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-6-u32.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-6-u64.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => sat}/sat_u_add-6-u8.c (100%) rename gcc/testsuite/gcc.target/riscv/{ => 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