This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch aarch64/sve-acle-branch in repository gcc.
from 7c0700a6143 [SVE ACLE] Add svcnt[bhwd]_pat new f20d68d23c1 Accept code attributes as rtx codes in .md files new f3b2a37e70e [SVE ACLE] Add sv{qdec,qinc}[bhwd] new d0caded0100 [SVE ACLE] Fix variable-length accesses to fixed-length objects new 00a8c3bcf2f [SVE ACLE] Add missing case to copy_reference_ops_from_ref
The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/cfgexpand.c | 14 + gcc/config/aarch64/aarch64-simd.md | 6 +- gcc/config/aarch64/aarch64-sve-builtins.c | 196 ++++++++++ gcc/config/aarch64/aarch64-sve-builtins.def | 44 +++ gcc/config/aarch64/aarch64-sve.md | 130 +++++-- gcc/config/aarch64/iterators.md | 25 ++ gcc/config/aarch64/predicates.md | 6 - gcc/doc/md.texi | 21 ++ gcc/read-md.h | 1 + gcc/read-rtl.c | 127 +++++-- .../aarch64/sve-acle/asm/qdecb_pat_s32.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qdecb_pat_s64.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qdecb_pat_u32.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qdecb_pat_u64.c | 203 +++++++++++ .../gcc.target/aarch64/sve-acle/asm/qdecb_s32.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qdecb_s64.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qdecb_u32.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qdecb_u64.c | 59 +++ .../aarch64/sve-acle/asm/qdecd_pat_s32.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qdecd_pat_s64.c | 402 +++++++++++++++++++++ .../aarch64/sve-acle/asm/qdecd_pat_u32.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qdecd_pat_u64.c | 402 +++++++++++++++++++++ .../gcc.target/aarch64/sve-acle/asm/qdecd_s32.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qdecd_s64.c | 114 ++++++ .../gcc.target/aarch64/sve-acle/asm/qdecd_u32.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qdecd_u64.c | 114 ++++++ .../aarch64/sve-acle/asm/qdech_pat_s16.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qdech_pat_s32.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qdech_pat_s64.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qdech_pat_u16.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qdech_pat_u32.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qdech_pat_u64.c | 203 +++++++++++ .../gcc.target/aarch64/sve-acle/asm/qdech_s16.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qdech_s32.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qdech_s64.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qdech_u16.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qdech_u32.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qdech_u64.c | 59 +++ .../aarch64/sve-acle/asm/qdecw_pat_s32.c | 402 +++++++++++++++++++++ .../aarch64/sve-acle/asm/qdecw_pat_s64.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qdecw_pat_u32.c | 402 +++++++++++++++++++++ .../aarch64/sve-acle/asm/qdecw_pat_u64.c | 203 +++++++++++ .../gcc.target/aarch64/sve-acle/asm/qdecw_s32.c | 114 ++++++ .../gcc.target/aarch64/sve-acle/asm/qdecw_s64.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qdecw_u32.c | 114 ++++++ .../gcc.target/aarch64/sve-acle/asm/qdecw_u64.c | 59 +++ .../aarch64/sve-acle/asm/qincb_pat_s32.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qincb_pat_s64.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qincb_pat_u32.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qincb_pat_u64.c | 203 +++++++++++ .../gcc.target/aarch64/sve-acle/asm/qincb_s32.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qincb_s64.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qincb_u32.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qincb_u64.c | 59 +++ .../aarch64/sve-acle/asm/qincd_pat_s32.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qincd_pat_s64.c | 402 +++++++++++++++++++++ .../aarch64/sve-acle/asm/qincd_pat_u32.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qincd_pat_u64.c | 402 +++++++++++++++++++++ .../gcc.target/aarch64/sve-acle/asm/qincd_s32.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qincd_s64.c | 114 ++++++ .../gcc.target/aarch64/sve-acle/asm/qincd_u32.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qincd_u64.c | 114 ++++++ .../aarch64/sve-acle/asm/qinch_pat_s16.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qinch_pat_s32.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qinch_pat_s64.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qinch_pat_u16.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qinch_pat_u32.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qinch_pat_u64.c | 203 +++++++++++ .../gcc.target/aarch64/sve-acle/asm/qinch_s16.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qinch_s32.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qinch_s64.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qinch_u16.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qinch_u32.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qinch_u64.c | 59 +++ .../aarch64/sve-acle/asm/qincw_pat_s32.c | 402 +++++++++++++++++++++ .../aarch64/sve-acle/asm/qincw_pat_s64.c | 203 +++++++++++ .../aarch64/sve-acle/asm/qincw_pat_u32.c | 402 +++++++++++++++++++++ .../aarch64/sve-acle/asm/qincw_pat_u64.c | 203 +++++++++++ .../gcc.target/aarch64/sve-acle/asm/qincw_s32.c | 114 ++++++ .../gcc.target/aarch64/sve-acle/asm/qincw_s64.c | 59 +++ .../gcc.target/aarch64/sve-acle/asm/qincw_u32.c | 114 ++++++ .../gcc.target/aarch64/sve-acle/asm/qincw_u64.c | 59 +++ .../aarch64/sve-acle/asm/test_sve_acle.h | 14 + .../aarch64/sve-acle/general-c/qincb_1.c | 36 ++ .../aarch64/sve-acle/general-c/qincb_2.c | 16 + .../aarch64/sve-acle/general-c/qincb_pat_1.c | 47 +++ .../aarch64/sve-acle/general-c/qincb_pat_2.c | 23 ++ .../aarch64/sve-acle/general-c/qincd_1.c | 26 ++ .../aarch64/sve-acle/general-c/qincd_pat_1.c | 26 ++ .../aarch64/sve-acle/general-c/qinch_1.c | 26 ++ .../aarch64/sve-acle/general-c/qinch_pat_1.c | 26 ++ .../aarch64/sve-acle/general-c/qincw_1.c | 26 ++ .../aarch64/sve-acle/general-c/qincw_pat_1.c | 26 ++ .../gcc.target/aarch64/sve-acle/general/deref_1.c | 13 + .../gcc.target/aarch64/sve-acle/general/deref_2.c | 20 + .../gcc.target/aarch64/sve-acle/general/qincb_1.c | 43 +++ gcc/tree-ssa-sccvn.c | 1 + 97 files changed, 12343 insertions(+), 60 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecb_pat_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecb_pat_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecb_pat_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecb_pat_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecb_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecb_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecb_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecb_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecd_pat_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecd_pat_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecd_pat_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecd_pat_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecd_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecd_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecd_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecd_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdech_pat_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdech_pat_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdech_pat_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdech_pat_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdech_pat_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdech_pat_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdech_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdech_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdech_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdech_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdech_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdech_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecw_pat_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecw_pat_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecw_pat_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecw_pat_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecw_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecw_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecw_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qdecw_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincb_pat_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincb_pat_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincb_pat_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincb_pat_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincb_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincb_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincb_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincb_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincd_pat_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincd_pat_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincd_pat_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincd_pat_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincd_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincd_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincd_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincd_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qinch_pat_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qinch_pat_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qinch_pat_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qinch_pat_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qinch_pat_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qinch_pat_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qinch_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qinch_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qinch_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qinch_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qinch_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qinch_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincw_pat_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincw_pat_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincw_pat_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincw_pat_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincw_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincw_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincw_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/qincw_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/qincb_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/qincb_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/qincb_pat_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/qincb_pat_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/qincd_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/qincd_pat_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/qinch_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/qinch_pat_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/qincw_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/qincw_pat_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general/deref_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general/deref_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general/qincb_1.c