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from 72319660891 AMDGPU: Remove unnecessary check for constant operands new a038a8340c1 AMDGPU: Allow SIShrinkInstructions to work in non-SSA

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Summary of changes: lib/Target/AMDGPU/SIShrinkInstructions.cpp | 57 ++++++----- test/CodeGen/AMDGPU/add.i16.ll | 10 +- test/CodeGen/AMDGPU/add.v2i16.ll | 4 +- test/CodeGen/AMDGPU/constant-fold-mi-operands.ll | 2 +- test/CodeGen/AMDGPU/ctlz.ll | 2 +- test/CodeGen/AMDGPU/ds_read2.ll | 4 +- test/CodeGen/AMDGPU/ds_read2_superreg.ll | 10 +- test/CodeGen/AMDGPU/ds_read2st64.ll | 6 +- .../AMDGPU/enable-no-signed-zeros-fp-math.ll | 2 +- test/CodeGen/AMDGPU/fabs.f16.ll | 12 +-- test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll | 50 +++++----- test/CodeGen/AMDGPU/fadd.f16.ll | 22 ++--- test/CodeGen/AMDGPU/fdiv.f16.ll | 6 +- test/CodeGen/AMDGPU/fdiv.ll | 4 +- test/CodeGen/AMDGPU/fma-combine.ll | 28 +++--- test/CodeGen/AMDGPU/fmax_legacy.ll | 10 +- test/CodeGen/AMDGPU/fmed3.ll | 4 +- test/CodeGen/AMDGPU/fmin_legacy.ll | 10 +- test/CodeGen/AMDGPU/fmul.f16.ll | 18 ++-- test/CodeGen/AMDGPU/fmuladd.f16.ll | 28 +++--- test/CodeGen/AMDGPU/fmuladd.f32.ll | 66 ++++++------- test/CodeGen/AMDGPU/fneg-combines.ll | 62 ++++++------ test/CodeGen/AMDGPU/fneg-fabs.f16.ll | 4 +- test/CodeGen/AMDGPU/fneg.f16.ll | 2 +- test/CodeGen/AMDGPU/fpext.f16.ll | 2 +- test/CodeGen/AMDGPU/fptosi.f16.ll | 2 +- test/CodeGen/AMDGPU/fptoui.f16.ll | 2 +- test/CodeGen/AMDGPU/fptrunc.f16.ll | 6 +- test/CodeGen/AMDGPU/fract.ll | 2 +- test/CodeGen/AMDGPU/frem.ll | 2 +- test/CodeGen/AMDGPU/fsub.f16.ll | 22 ++--- test/CodeGen/AMDGPU/fsub.ll | 18 ++-- test/CodeGen/AMDGPU/half.ll | 6 +- test/CodeGen/AMDGPU/immv216.ll | 2 +- test/CodeGen/AMDGPU/llvm.ceil.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.cos.f16.ll | 8 +- test/CodeGen/AMDGPU/llvm.exp2.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.floor.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.fma.f16.ll | 8 +- test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll | 16 ++-- test/CodeGen/AMDGPU/llvm.log2.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 18 ++-- test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 18 ++-- test/CodeGen/AMDGPU/llvm.rint.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.round.ll | 4 +- test/CodeGen/AMDGPU/llvm.sin.f16.ll | 8 +- test/CodeGen/AMDGPU/llvm.sqrt.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.trunc.f16.ll | 4 +- test/CodeGen/AMDGPU/mad-combine.ll | 106 ++++++++++----------- test/CodeGen/AMDGPU/madak.ll | 6 +- test/CodeGen/AMDGPU/madmk.ll | 4 +- test/CodeGen/AMDGPU/rsq.ll | 4 +- test/CodeGen/AMDGPU/scalar_to_vector.ll | 2 +- test/CodeGen/AMDGPU/scratch-simple.ll | 4 +- test/CodeGen/AMDGPU/sdwa-peephole.ll | 18 ++-- test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll | 54 +++++------ test/CodeGen/AMDGPU/setcc-fneg-constant.ll | 6 +- test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll | 2 +- test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 4 +- test/CodeGen/AMDGPU/sminmax.ll | 20 ++-- test/CodeGen/AMDGPU/sub.i16.ll | 10 +- test/CodeGen/AMDGPU/sub.v2i16.ll | 16 ++-- test/CodeGen/AMDGPU/usubo.ll | 2 +- test/CodeGen/AMDGPU/v_mac.ll | 4 +- test/CodeGen/AMDGPU/v_mac_f16.ll | 34 +++---- test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir | 40 ++++++++ test/CodeGen/AMDGPU/xor.ll | 2 +- test/CodeGen/AMDGPU/zext-i64-bit-operand.ll | 4 +- test/CodeGen/MIR/AMDGPU/fold-imm-f16-f32.mir | 20 ++-- 69 files changed, 503 insertions(+), 454 deletions(-) create mode 100644 test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir