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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-master-arm-spec2k6-Oz_LTO in repository toolchain/ci/llvm-project.

from 51d8c598331 [lldb] Don't model std::atomic as a transparent data struct [...] adds 58f66f8af01 [ARM,CDE] Cosmetic changes, additonal driver tests adds dd230142d8a Support -fuse-ld=lld for riscv adds 3f0661b5e71 [lldb][NFC] Fix compilation of SymbolFilePDBTests.cpp after [...] adds d4576080da7 [AArch64][SVE] Add remaining SVE2 intrinsics for widening D [...] adds 185ef697ef5 [lldb] Don't call CopyForBreakpoint from a Breakpoint's con [...] adds b624b7dfd08 [lldb] Make shared_from_this-related code safer adds 7fb06796abf [lldb][NFC] Remove unused parameter adds a5ac8ca3e0e [CSInfo][TailDuplicator] Delete the call site info when rem [...] adds cc7a197f9f1 Fix riscv/lld test interaction adds b87a0f7416f [llvm-readobj] - Report a warning when an unexpected DT_SYM [...] adds 106ae108c18 [CGP] Add uaddo test with math used, SPARC/AArch64 variants. adds db23825970b [lldb][test] Remove expected failure decorator from test_co [...] adds 40b2c7f29b4 [lldb] Fix another instance where we pass a nullptr as Type [...] adds d6fe253653b llvm: Use quotes around MSVC_DIA_SDK_DIR CMake variable adds b3cd44f80b8 Use SETNE directly rather than SUB/SETNE 0 for stack guard check adds c30d8f7c910 [IR] Set name when inserting 'llvm::Value*' adds 63bb9fee525 [llvm-exegesis] Improve error reporting in Assembler.cpp adds 9e4b761aba0 Move DFA tables into the read-only data segmant. adds a82d3e8a6e6 Reland "[DebugInfo] Enable the debug entry values feature b [...] adds 1cff2aa5123 [libc++] Remove XFAILs for macOS 10.15, which were fixed in [...] adds 523cae324d7 [libTooling] Add option for `buildAST` to report diagnostics. adds b807a287876 [lldb] Merge RangeArray and RangeVector adds 37c452a2895 AMDGPU/GlobalISel: Adjust branch target when lowering loop [...] adds c85055b2039 [Assembler] Emit summary index flags adds cd2c5af6dfd Reland D74436 "Change clang option -ffp-model=precise to se [...] adds 4518aab289a [AArch64] Add Cortex-A34 Support for clang and llvm adds 0f04384daf7 [mlir] NFC: Rename LLVMOpLowering::lowering to LLVMOpLoweri [...] adds 5526786a56b [VE] TLS codegen adds 498a6136a27 Prevent gcc from issuing a warning upon coffnamecpy adds 2bf44d11cb4 Revert "Reland "[DebugInfo] Enable the debug entry values f [...] adds 5e52effca62 [libc++] Add ABI list for 9.0 release adds 8fbc9258076 Add OffsetIsScalable to getMemOperandWithOffset adds 4ca753f4e3e [RISCV] Implement mayBeEmittedAsTailCall for tail call opti [...] adds 44bbc767000 Drop a constexpr in favor of const, MSVC complains. adds 260b91f379c Use getLocation() in "too few/too many arguments" diagnostic adds fa7d04a0d3f [mlir] Add short readme.txt to docs directory adds 66c01627719 Hopefully fixing a failing build bot. adds 5e7d0ebf735 Cover cases like (b && c && b) in the redundant expression check. adds 9bc6bc2d8ce [InstCombine] Add more tests for icmp+and+ashr; NFC adds 9adedd146d5 [InstCombine] Relax preconditions for ashr+and+icmp fold (PR44754) adds 3126b556d13 [PowerPC][NFC] Add defines to help creating the SpillSlot arrays. adds c9540fe59bb [InstCombine] Fix multi-use handling in cttz transform adds 1ab37fad61a [InstCombine] Fix worklist management when simplifying dema [...] adds ed6d30b517b [BuildLibCalls] Accept IRBuilderBase; NFC adds 28ffe38bbaf [LoopUtils] Accept IRBuilderBase; NFC adds ec6c623ff90 [SimplifyLibCalls] Accept IRBuilderBase; NFC adds f37e899fd73 [VectorUtils] Accept IRBuilderBase; NFC adds aa3e99dc859 [lldb] [nfc] Separate DIERef vs. user_id_t: GetForwardDeclC [...] adds e32522ca178 [SLPVectorizer] Do not assume extracelement idx is a ConstantInt. adds 63809d365e5 [ARM,MVE] Add vbrsrq intrinsics family adds 7603bfb4b0a Revert "[llvm-exegesis] Improve error reporting in Assembler.cpp" adds fc69967a4b9 [scudo][standalone] Shift some data from dynamic to static adds b2a958a0138 [TBLGEN] Emit register pressure set enum adds 711caee5335 [gn build] (manually) port fc69967a4b9 adds 884a58948b1 [lldb/Plugin] Unconditionally initialize DynamicLoaderDarwinKernel adds f4d3765fd98 CodeGen: Move undef_tied_input declaration adds dd4766451ec [AMDGPU] Use generated RegisterPressureSets enum adds 8ee0e1dc024 [NFC] Silence compiler warning [-Wmissing-braces]. adds c9e93c84f61 Add Query API for llvm.assume holding attributes adds e706656af0e [gn build] Port c9e93c84f61 adds 13a97305ba7 [JumpThreading] Skip unconditional PredBB when threading ju [...] adds 89ab5c69c85 [X86] Add a helper function to pull some repeated code out [...] adds 6f846c85045 Improve comments after 8404aeb56a73ab24f9b295111de3b37a37f0b841. adds 2d146aa2a2c [lldb/Plugin] Generate LLDB_PLUGIN_DECLARE with CMake adds 94a4ca4bf33 [mlir] Add a TypeRange class that functions similar to ValueRange. adds bcadb1f2e6a Revert "[CUDA][HIP][OpenMP] Emit deferred diagnostics by a [...] adds 36f480f22c2 Revert "[CUDA][HIP][OpenMP] Add lib/Sema/UsedDeclVisitor.h [...] adds d6eef0614fe [TargetLowering] Add SimplifyMultipleUseDemandedBits 'all e [...] adds b8bea9346af Revert "Support -fuse-ld=lld for riscv" adds 1ae8d81147a [libunwind] Fix memory leak in handling of DW_CFA_remember_ [...] adds a7dcbe90cc2 [libc++] Fix overly complicated test of std::span's extent adds faa889b2358 [Hexagon] clang driver should consider --sysroot option adds 47282b1b4bf Fix PR#44620 'readability-redundant-string-cstr quick-fix c [...] adds a0a1f412fd1 Remove "ELF Only" from -f*-sections help text adds 58817a0783c [clang][XCOFF] Indicate that XCOFF does not support COMDATs adds 870c1fd4c87 [mlir] NFC: rename LLVMOpLowering to ConvertToLLVMPattern adds a8355b5c0f6 [mlir][Linalg] Allow specifiying zero-rank shaped type oper [...] adds ebf9a99bbdc [lldb/Plugin] Reject WASM and Hexagon in DynamicLoaderStatic adds 0159c21119e [TestGlobalVariables] `target var` without a process doesn' [...] adds 3f5e0501b5e [TestGlobalVariables] Remove a reference to a stale rdar. adds 2560a93b706 [TestTargetCommand] `target var` without a process doesn't [...] adds 42cab985fd9 [TestTargetCommand] Remove another reference to a stale rdar. adds 7b64a590600 Reland "[WebAssembly][InstrEmitter] Foundation for multival [...] adds d51910967fd Reland "[WebAssembly] Split and recombine multivalue calls [...] adds 9d37f5afac4 [WebAssembly] Implement multivalue call_indirects adds 2c8ee5329bb Fix assertion on `!eq(?, 0)` adds 236fcbc21a7 Add coding standard recommending use of qualifiers in cpp files adds cf4574299a2 [hexagon] Fix testcase issue with windows builder. adds 0c2b09a9b62 [IR] Lazily number instructions for local dominance queries adds b91d9ec0bb8 [GlobalISel]: Fix some non determinism exposed in CSE due t [...] adds 52861809994 [WebAssembly] Fix RegStackify and ExplicitLocals to handle [...] adds e28d9bae4b3 PR44958: Allow member calls and typeid / dynamic_cast on mu [...] adds 1f441342433 Fix NDEBUG build after instruction ordering adds 8b9cb120812 [Driver] -pg -mfentry should respect target specific decisi [...] adds ca9ba76481f [WebAssembly] Replace all calls with generalized multivalue calls adds 7a4ddfb774a [gn build] Port ca9ba76481f adds 24ad1215824 Add -std=c++20 flag, replace C++2a with C++20 throughout th [...] adds 0d7ff220ed0 [mlir] Refactor TypeConverter to add conversions without in [...] adds ea789f819f2 Remove unused option that gcc ignored adds 7b76767dbc4 [lldb/Core] Remove blatant code duplication by using a temp [...] adds 492d4a992d8 [NFC] Update the testcase clang_f_opts.c for the removed options adds bad1389f125 [lldb/Core] Remove dead Get*PluginCreateCallbackForPluginNa [...] adds a82b63a7411 [mlir][DialectConversion] Forward capture callback to fix b [...] adds 28728bf06f5 Fix a signed/unsigned warning promoted to error. adds f581e655ec3 [MLIR] Add std.assume_alignment op. adds b762bbd4c86 [MLIR] change NVVM.mma.sync to the most useful variant. adds 05c3907b88a Fix test for profile remapper adds 061f3a50dd8 P0593R6: Pseudo-destructor expressions end object lifetimes. adds 80c3ea4e633 Re-land "[lldb/CMake] Auto-generate the Initialize and Term [...] adds ae738911641 [lldb/Docs] Update the Windows documentation adds e68205844db [lldb/Docs] Update the features matrix adds d7db094ef79 [lldb] Move ArchitectureCreateInstance into ldb-private-interfaces adds 7c4b70402c6 [lldb] Sort forward declarations in lldb-forward.h adds 26f356350bd [LazyCallGraph] Fix ambiguous index value adds d840e545231 [DebugInfo][test] Fix section flags/type to avoid warning/e [...] adds a71feda24ea [DebugInfo]: Added support for DWARFv5 Info section header [...] adds 2365238b9d0 Re-land new pass manager coro-split and coro-elide adds 5a187d8ed11 [Coroutines][4/6] New pass manager: coro-cleanup adds 72961071f35 [Coroutines][5/6] Add coroutine passes to pipeline adds 048239e46e4 [Coroutines][6/6] Clang schedules new passes adds 0dbc4658d88 [X86] Handle splats in LowerBUILD_VECTORvXi1 by directly em [...] adds 2a095ff6f50 [clangd] Add add commit characters to the server capabilities adds 80b2e3cc531 [lldb/Core] Remove more duplicate code in PluginManager (NFCI) adds f69a29da5a0 [X86] Remove vXi1 select optimization from LowerSELECT. Mov [...] adds 4921e791922 Fix build after D74606 adds 7cbf710396d [CGP] Precommit tests for D74228. adds fa6aef44277 [clang-tidy] Added a case to UnconventionalAssignOperatorCheck. adds 92c80529ddb [MIPS GlobalISel] RegBankSelect G_MERGE_VALUES and G_UNMERG [...] adds 9ed920444f6 [MLIR][Ploops] Add custom builders from ParallelOp and ReduceOp. adds 2bab1738f39 [lldb] Make TestFormatters.py not rely on working construct [...] adds b4608efc0b7 [lldb][NFC] Add a missing test case to TestCppConstructors.py adds 785df616807 [lldb] Let TypeSystemClang::GetDisplayTypeName remove anony [...] adds c41a1f63b3c [DebugInfo] Pass linux triple to tests requiring ELF. adds 51c6e9445cd [ARM] Extra MVE VADDV reduction patterns adds 3ed0ce458c3 [lldb] Put Host/common headers in a module adds a3093bfb3e7 [lldb] Let TestCppConstructors pass without fix-it intervention adds 6e326882dad [LLD][ELF][ARM] Fix support for SBREL type relocations adds faff707db82 Reland "[DebugInfo] Enable the debug entry values feature b [...] adds 63236078d24 [AArch64][SVE] Add SVE2 intrinsics for polynomial arithmetic adds 216afd3301f [TargetLower] Update shouldFormOverflowOp check if math is used. adds 5171d1523dd [MIPS GlobalISel] Select 4 byte unaligned load and store adds 5e32e7981b3 [MIPS GlobalISel] Legalize non-power-of-2 and unaligned loa [...] adds fceb3e3b4ae [ARM] MVE VADDLV lowering adds 4af8db317d2 [AMDGPU] performCvtF32UByteNCombine - add SHL and SimplifyM [...] adds 78654e8511c Revert "Reland D74436 "Change clang option -ffp-model=preci [...] adds 3439d4ee0e4 [yaml2obj] - Change the order of implicitly created sections. adds 49b307e96d4 [AArch64][SVE] CodeGen of ACLE Builtin Types adds b0060c3a786 [lldb] Make comparing RegisterInfo::[alt_]name's pointer va [...] adds 4a9011dcdad [lldb] Skip failing parts of TestCppConstructors that use ' [...] adds 33aa5dfe9c2 [ARM] VMLAVA reduction patterns adds 066a76a234d Support OptionalAttr inside a StructAttr adds de3e65e60c8 [ARM][LowOverheadLoops] Check loop liveouts adds 10df88de217 [lldb] Remove some unnecessary includes from test sources adds 9746b3ae07d ErrorTest: Break up "ErrorMatchers" test adds 8131cb6e189 [lldb/DWARF] Add support for location lists in package files adds 79c7d34dccd Recommit: "[llvm-exegesis] Improve error reporting in Assem [...] adds 3d7b591dca8 [lldb][NFC] Pointer to reference conversion for CompilerDec [...] adds 284279ac23a [MLIR] Add naive fusion of parallel loops. adds 81e8b60b722 [OpenCL] Only declare _sat conversions for integer types adds a9122758641 [TableGen] Diagnose undefined fields when generating search [...] adds 1b2deb9ae00 [lldb] Remove Windows X-fail for TestCPPAuto and TestStepTarget adds 53eece04bd1 [lldb][NFC] Modernize test setup code in several lang/cpp tests adds 39cecabece8 [AArch64][ASMParser] Refuse equal source/destination for LD [...] adds ff4639f0601 AMDGPU/GlobalISel: Select MUBUF path for global atomic cmpxchg adds e01a3d49c22 [PatternMatch] Match XOR variant of unsigned-add overflow check. adds a6a585b8030 [CGP] Adjust CodeGen tests after e01a3d49c22 adds bc23e83e45e Add <128 x i1> as an intrinsic type adds 440ca29ea26 [Hexagon][NFC] Rename VK_Hexagon_PCREL to VK_PCREL adds b329d1b06eb [AMDGPU][ConstantFolding] Fold llvm.amdgcn.fmul.legacy intrinsic adds bde0e320bcf [gn build] revert e8e078c8bf7987 adds 39317349909 [AArch64][SVE] Add initial backend support for FP splat_vector adds 461fd94f004 [ARM,MVE] Fix predicate types of some intrinsics adds d97d4092772 [mlir] NFC: use ValueRange for BlockArgument in ConvertStan [...] adds 9b91bcf6c61 tsan: removing redundant loop in ThreadClock::release() adds bb61021a8fc [lldb][NFC] Remove giant do{...}while(false); in ClangASTSo [...] adds 896ee361a64 [mlir][spirv] Add mlir-vulkan-runner adds 7a554270c03 [SystemZ] Regenerate risbg tests. NFCI. adds f12fb2d99b8 [IRBuilder] Always respect inserter/folder adds f50fe5eb6d2 [Sema][CodeComplete] Handle symlinks for include code completion adds 6b5ce0de7e5 [InstCombine] Fix removal from deferred instructions adds 476ca094c84 [mlir][ods] Adding attribute setters generation adds b92b1701cd3 Revert "[IRBuilder] Always respect inserter/folder" adds 3f7d0e7e319 [NFC][compiler-rt][test] Fully qualify string -> std::string adds a829443cc73 [libc++] Fix ABI break in __bit_reference. adds ada205e91eb [AMDGPU] Fix assumption about LaneBitmask content adds a54d81f5979 [analyzer] CERT: POS34-C adds f559cecc3e0 [X86] Add DCI.isBeforeLegalize() check to the v64i1 constan [...] adds f14f9bd22ea [gn build] Set up include_dirs for a54d81f597 (first checke [...] adds e84aa5922b1 Fix Block::eraseArgument when block arg is also a successor [...] adds 069b85fed11 [gn build] Port a54d81f5979 adds 187204cd746 [gn build] use \bfoo\b instead of <foo> in sync script adds 0eddeeab29a [ValueTracking] Improve isKnownNonNaN() to recognize zero splats. adds 170ae68fef0 [AssumeBundle] Add documentation for the operand bundles of [...] adds df590f51b62 [lldb/Core] Remove locking in the PluginManager adds 6b6c96695c0 [mlir][ODS] Add a new trait `TypesMatchWith` adds 4a7364f1c2e [mlir][Parser] Use APFloat instead of FloatAttr when parsin [...] adds c7fc0e5da6c Revert "[PatternMatch] Match XOR variant of unsigned-add ov [...] adds fd0e8b4c0ca [mlir][NFC] Fix warning for mismatched sign comparison. adds 0a2626d0cdc [DDG] Data Dependence Graph - Graph Simplification adds 376c68539c5 [mlir][NFC] Fix 'gatherLoops' utility adds 84f80b1faae [CMake] Only detect the linker once in AddLLVM.cmake adds 59982a6d8f9 [UpdateTestChecks] Add support for '.' in ir function names adds 025ff5a4eaf [AMDGPU] Regenerate immediate constant tests adds 076475713c2 [libFuzzer] Fix denominator in the "inputs have DFT" log line. adds 129c911efaa Include static prof data when collecting loop BBs adds 0ba9ee9f0e5 [mlir] [VectorOps] Framework for progressive lowering of ve [...] adds f6875c434ec Reapply [IRBuilder] Always respect inserter/folder adds ba3f863dfb9 [OpenMP][OMPIRBuilder] Introducing the `OMPBuilderCBHelpers [...] adds b1d47467e26 [Hexagon] Change HVX vector predicate types from v512/1024i [...] adds 2ade59ec943 [x86] add test for uint->fp with unsafe-fp-math (PR43609); NFC adds f5678d4a6a6 [AMDGPU] Update AMDGPUUsage with DWARF proposal adds e4d20ec8add [IndVarSimply] Fix assert/release build difference. adds 788e74ce29c [AMDGPU] AMDGPUUsage define call convention ABI adds 6ba2d7b166c [libc++] Fixes backreferences for extended grammar. adds c3478eff7a6 [libc++] reduce <complex> parsing time adds ddd2257f48a [TSan] Fix incorrect expansion of `%deflake` lit substitution. adds 03954a12aec [AMDGPU] Fix DS_WRITE_B32 patterns adds d48d3391569 [lld][ELF] Add --shuffle-sections=seed to shuffle input sections adds 7d91633a2b9 Fix broken test on Windows caused by D74790 adds 85fb997659b [ORC] Add generic initializer/deinitializer support. adds 7ff1f55a121 libclang: Add static build support for Windows adds c4b8c3ddc1a Add benchmarks for basic_string::erase adds 4960eb4a1bd Another fix for 7d91633a2b9b1f563dc14c632cc0c461c3651f76 adds 9df65ca19e5 [ORC] Qualify nullptr_t. adds 63d0932c358 [ORC] Fix a missing move. adds 0b6ead018a6 AMDGPU/GlobalISel: Cleanup min/max RegBankSelect tests adds cbc3b3046f6 AMDGPU/GlobalISel: Remove outdated comment adds ed07c89fc50 Add cl_khr_mipmap_image_writes as supported to AMDGPU adds 4bb0c8f91cb AMDGPU: Enable integer division bypass adds f5efa08247c [JITLink] Fix testcase for main JITDylib rename in 85fb997659b. adds 38419b8afa8 [gn build] Port 85fb997659b adds 709fd989b64 [clang-tidy] fix readability-redundant-member-init auto-fix [...] adds 16aabc86e0a [WebAssembly] Fix memory bug introduced in 52861809994c adds d1d5180e690 [NFC] Fix issues with clang-tidy checks list.rst adds 562c6b80192 Add a `%darwin_min_target_with_tls_support` lit substitution. adds 95e3956189a Add an Offset field to the SourceLocation for LookupResult [...] adds 28e0449ec69 [mlir][Linalg] Allow specifiying zero-rank shaped type oper [...] adds 0edb2129258 [MS] Mark vectorcall FP and vector args inreg adds 40463301e45 [ELF][test] Fix shuffle_sections.s adds 878159038b0 [ELF][test] Fix --symbol-ordering-file tests of shuffle_sections.s adds bd4812776bc [WebAssembly] Use llvm::Optional to store optional symbol a [...] adds a750422609e [mlir] Update usage of createJITDylib to createBareJITDylib [...] adds 6990eaf1fe0 [lldb/Test] Skip VSCode test on embedded Darwin adds 06f1a5c9c28 [lld][WebAssembly] Allow symbols with explict import names [...] adds 8ea3eb86d65 [gn build] (manually) partially (?) merge 7ff1f55a1219 adds be66cf221bb [DebugInfo] Read CIE pointer as a relocatable value. adds 95a239be5b7 [DebugInfo] Remove a misleading comment for llvm::dwarf::FDE. adds 84fc1233d9a [DebugInfo][NFCI]: Removed an exclamation mark from error message. adds 6730f390a1f Fixup test after changes made in 709fd989. adds c6ac717aa70 [Attributor] Allow multiple uses of a casted function pointer adds 490a9a4b77e [examples] Fix the clang-interpreter example for changes in [...] adds 92250ec270e [examples] Fix the SpeculativeJIT example for 85fb997659b. adds 1e99fc9d58d [Attributor] Add initial AAIsDead for arguments adds 14fb31795a4 [lldb/Test] s/skipIfDarwinEmbedded/skipIfRemote/ in VSCode tests. adds 16188f9d70d [Attributor][FIX] Do not create new calls edge we cannot handle adds e1eed6c5b9f [Attributor] Generalize `getAssumedConstantInt` interface adds de6e968c0d4 TableGen: Fix logic for default operands adds a801ee869de [Attributor][FIX] Avoid setting wrong load/store alignments adds f8ad735729b [Attributor] Use existing `returned` information better adds 3c4da4d7454 [Attributor][NFC] Add more memory_location tests adds 8e76fec0ae8 [Attributor][NFC] Improve the debug output & add a TODO adds e253cdda35e [MustExecute] Add backward exploration for must-be-executed [...] adds d6d640ebae6 [ELF][test] Fix section sh_type and sh_flags adds 3a0f6e699bb Fix compiler extension in standalone mode adds d8916e58cf1 Remove debugging artefact. adds fdea9a4ec9b [lldb] Remove license headers from all test source files adds b6e5808b213 [Attributor][NFC] Prepare some tests to be used with update [...] adds 6185fb13d64 [Attributor][NFC] Refactor interface adds d95cb56649e [Attributor] Make sure abstract attributes are properly ini [...] adds 14d7b802db4 [LLD][ELF][ARM] Add test cases for R_ARM_THM_MOV*-type relocs adds ddf60ba09f2 [lldb/DWARF] Always construct a DWARFDebugInfo object adds 689f1e85ba6 [compiler-rt] [builtins] Fix logb / logbl tests adds def62c7f654 [NFC] Remove ar/ranlib test noise during cmake step adds f4fd7dbf85e [ARM,MVE] Add vqdmull[b,t]q intrinsic families adds c8f9e526bc5 [clang-tidy] misc-no-recursion: point to the function defs, [...] adds dbfc682e2ba SpeculativeExecution: fixed ingoring free execution adds 6085593c128 [AMDGPU] simplifyI24 - replace GetDemandedBits with Simplif [...] adds 0e417b034ad [AArch64][SVE] Re-arrange definitions in AArch64SVEInstrInf [...] adds 7b59ff2fa0a [lldb] Add boilerplate to recognize the .debug_tu_index section adds c7b7f76ae6a [lldb]: fix typo in lldb-gdb-remote.txt adds 9ea5d17cc95 [Sema] Demote call-site-based 'alignment is a power of two' [...] adds 2f215cf36ad Revert "Reland "[DebugInfo] Enable the debug entry values f [...] adds bb9e92bad55 [clang][Index] Fix the incomplete instantiations in libindex. adds fa221fc6b8a Regenerate rotate test. NFC. adds 977cd661cf0 [AMDGPU] Don’t marke the .note section as ALLOC adds 15e20dcb8f9 [Utils][x86] add an option to reduce scrubbing of shuffles [...] adds 083717cf499 AMDGPU: Fix v2i64<->v4f32 bitcast adds 659500c0c96 [NFC][RDA] Break-up initialization code adds 45f008704df [PowerPC][NFC] We do not save/restore vrsave for any remain [...] adds 216a6e05249 [x86] regenerate test checks with less shuffle scrubbing; NFC adds 1f984c83a41 Add #include <condition_variable> to fix build after 85fb997659b5 adds fc2b4a02b1a [DAGCombine] visitEXTRACT_VECTOR_ELT - add SimplifyDemanded [...] adds cb54c13c217 [clang][analyzer] Modify include AllocationState.h in Puten [...] adds 12cc105f806 [X86] Add DAG combines to form CVTPH2PS/CVTPS2PH from vXf16 [...] adds ce70e289987 [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations adds 914a97a4e61 [x86] add vector tests for splatted memory ops; NFC adds 9bbf271fc9d [AArch64] Move isOverflowIntrOpRes help function to the ISD [...] adds 3543ac9ab52 [X86] Rewrite LowerBRCOND to remove dead code and handle IS [...] adds e442f38395f [libc++] Fix unintended ADL inside ref(reference_wrapper<T> [...] adds 092a57f5082 [libc++] Fix unqualified call to 'ref' inside shared_ptr(un [...] adds db8911aad72 [clang-tidy] rename_check.py: maintain alphabetical order i [...] adds 0ed7a615438 [X86] Fix a -Wparentheses warning. NFC adds 6fa3894c4e7 [clang] Fix search path logic for C_INCLUDE_DIRS adds af64b31959f Add target.xml support for qXfer request. adds 0ffa6e1a7e1 [lldb] Fix version string when using LLDB_REVISION but not [...] adds f9c326364e7 [DAGCombiner] Use SDValue::getConstantOperandAPInt helper w [...] adds 726c342ce27 [macho][NFC] Extract all CPU_(SUB_)TYPE logic to libObject adds 70d8fec7c94 [mlir] Refactor the structure of the 'verifyConstructionInv [...] adds 3f785212e9c Revert "[macho][NFC] Extract all CPU_(SUB_)TYPE logic to li [...] adds da181d4ba0c [PowerPC][NFC] Cleanup some of the Darwin mentions in the R [...] adds 064cd2ecdb3 [x86] allow peeking through an extract_subvector to find a [...] adds 5d2baa956ac [libc] Add Initial Support for Signals adds 8928c6dbbf7 Fix some typos in the MLIR documentation. adds 6de21c556d1 [ORC][examples] Fix ThinLtoJIT example after changes in 85f [...] adds 813b1b9fd6c [ORC] Add a convenience method for setting the ExecutionSes [...] adds e2c2eb0a550 [X86] Fix NSW/NUW typo in avg test (PR44973) adds a11ff39ba2a [clang-format] Merge name and colon into a single token for [...] adds 7a7c753b0cc libclang: Make shared object symbol exporting by default adds 967eeb109be [AIX] Pack BasicBlockBits adds 2f56789c8fe [clang][doxygen] Fix false -Wdocumentation warning for tag [...] adds e4a9225f5d1 [GISel][KnownBits] Give up on PHI analysis as soon as we do [...] adds 6d34a87bae6 [cxx_status] Update -std= instructions for C++20. adds 0c8fa6db90a [llvm][build] Fix shared lib builds. [NFC] adds 3d0564c7e07 Revert "[NFCI][DebugInfo]: Corrected a Typo." adds 7ddbf802cf6 [ConstantFold] add/move tests for FP with undef operand; NFC adds 6f4d9d10293 Revert "[AArch64][SVE] Add intrinsics for SVE2 bitwise tern [...] adds e84444781aa Revert "libclang: Add static build support for Windows" and [...] adds 714265dabb6 [X86] Replace a bad use of MVT::getVectorVT with EVT::getVectorVT adds 1d8860f90bc Revert 714265dabb606bfef2f85694234f152edbfa91ac "[X86] Repl [...] adds c7b54a196e1 Recommit "[X86] Replace a bad use of MVT::getVectorVT with [...] adds 9e0c95572e5 [AIX] Improve 32/64-bit build configuration adds bf3f427ba23 [ASTImporter] Add linkage check to ASTNodeImporter::hasSame [...] adds 6123074d0c0 [Driver] Escape the program path for -frecord-command-line adds c767cf24e48 [SVE] Add support for lowering GEPs involving scalable vectors. adds 99809f98d7b [SCCP] Do not mark unknown loads as overdefined. adds ee260c1a0f1 [mlir] [VectorOps] Multi-dim reductions for lowering vector [...] adds 6d60d8695d2 [mlir] Use LLJIT::getMainJITDylib instead of hardcoding '<main>' adds 3ee28108273 [lldb/Plugin] Don't mark ProcessNetBSD as a plugin adds 577d9ce3553 Revert "[Driver] Escape the program path for -frecord-comma [...] adds 51bf5d3cc19 [mlir][Parser] Update DenseElementsAttr to print in hex whe [...] adds 0d19b016226 [lldb/Test] Remove stale README in test/API adds 07c559caef9 [libc++] Explain XFAILs with std::uncaught_exceptions test adds d95a10a7f97 [X86] Custom legalize v1i1 add/sub/mul to xor/xor/and with avx512. adds 5228a5544b2 [X86] Fix a couple copy mistakes in v4i1 or/and/xor isel patterns. adds b00ef8951b5 [X86] Custom legalize v1i1 UADDSAT/USUBSAT/SADDSAT/UADDSAT [...] adds 7e927698621 [X86] Expand vselect of v1i1 under avx512. adds e5782377f3f [X86] Add CMOV_VK1 pseudo so we don't crash on v1i1 ISD::SELECT adds 72ce0c8073b [libc++][regex] Validate backreferences in the constructor. adds d4ded05ba85 [libunwind][CMake] Treat S files as C to work around CMake bug. adds 2fe457690da Filter callbr insts from critical edge splitting adds 7593a480dbc [Dominators] Use Instruction::comesBefore for block-local q [...] adds e27b61c1ea3 [XCore] Add instruction pattern for bitrev adds 4b540fa8a1c [OpenMP][NFC] Remove leftover debug messages adds c32c8fd1437 [mlir] Use getOperation()->setAttr when generating attribut [...] adds d8969a1cb96 Split _LIBCPP_STRING_EXTERN_TEMPLATE_LIST up into a V1 and [...] adds 78be6187170 [X86] Add CMOV_VR64 pseudo instruction for MMX. Remove mmx [...] adds efeafa1bdaa libclc: Use acos implementation from amd_builtins adds 45766068315 [X86] Remove unnecessary isNullConstant in LowerSelect. NFC adds df74033ec9f [WebAssembly] Remove unneeded getWasmKindForNamedSection function adds 3bc525af235 [X86] Autogenerate complete checks. NFC adds 263bef2bbcb [X86] Make combineCMov not create unsupported FCMOVs when f [...] adds 97f11600e0b [X86] Don't bother avoiding illegal FCMOVs if we don't have [...] adds e326f524304 [clangd] Fix the incomplete template specialization in findTarget. adds 0e5ed1b2626 [lldb][NFC] Split up ClangASTSource::FindExternalVisibleDecls adds bc498198b55 [clangd] Allow renaming class templates in cross-file rename. adds e5eeb8465f2 Make unittests include path relative adds d0b09f89e0e [NFC][mlir] Adding more operators to EDSC TemplatedIndexedValue adds 32e4e719663 test/CodeGen/AMDGPU: Add a test case that shows a miscompilation adds a24d46318f6 [NFC] Corrected a minor typo in a comment adds 99b03c1c18d Detect and disable openmp tests that require multiple hardw [...] adds d799190851f [ConstantFold] fold fsub -0.0, undef to undef rather than NaN adds b0761bbc763 [DependenceAnalysis] Memory dependence analysis internal ca [...] adds c51b0bede82 [Hexagon] Introduce noop intrinsic to cast between vector p [...] adds 35b685270b4 [mlir] Add a signedness semantics bit to IntegerType adds 86c52af05a6 [TargetLowering] SimplifyDemandedBits - use getValidShiftAm [...] adds d33e96b68c6 [X86] Regenerate hi reg tests adds b55c58a2d56 [Error/unittests] Add a FailedWithMessage gtest matcher adds 4fdaac0e1eb [PowerPC][NFC] Remove Darwin specific logic in frame finalization. adds a49a41e7855 [AST][NFC] Update outdated comments in ASTStructuralEquival [...] adds 175f6e309ab [PowerPC][NFC] Add a test for vrsave usage iinline asm. adds de8793b9184 [lldb/DWARF] Add support for type units in dwp files adds f0c642e8227 Remove unused functions in llvm-ml adds 5125803d344 [mlir] Silence error: call to constructor of 'llvm::APInt' [...] adds b64aa8c7151 AMDGPU/GlobalISel: Fix constant bus violation with source m [...] adds fab4cdea391 AMDGPU/GlobalISel: Select llvm.amdgcn.fmul.legacy adds 79ff188adde AMDGPU/GlobalISel: Legalize G_FPOW adds ac7abe0ba9a AMDGPU/GlobalISel: Manually select G_BUILD_VECTOR_TRUNC adds 83012cb2171 [ARM] Correct Formatting. NFC adds 89dc8fe6222 AMDGPU/GlobalISel: Precommit xnor matching test adds 6ed8e201433 [ELF] Ignore the maximum of input section alignments for two cases adds de0dda54d38 [ELF] Warn changed output section address adds c47e0e2d37d [lldb-vscode] Use libOption with tablegen to parse command [...] adds dbd7281aa77 [ELF] Shuffle .init_array/.fini_array with --shuffle-sections= adds 42ec6fdce92 [TargetLowering] Apply basic shift combines before recursiv [...] adds 043ed2e22ac AMDGPU/GlobalISel: Fix xnor matching adds 6a479220b5e AMDGPU/GlobalISel: Commit test changes I forgot to squash adds cab39e4b8c8 GlobalISel: Fix narrowing of (G_ASHR i64:x, 32) adds 9fff6e823cf [AArch64][SVE] Add +fullfp16 to sve-vector-splat.ll adds 134bab7cd56 [DSE,MSSA] Add debug counter. adds 23444edf30b [AST matchers] Add basic matchers for googletest EXPECT/ASS [...] adds fc4455891c0 [VectorCombine] refactor matching code to reduce duplication; NFC adds db9c40f5624 [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations adds 60023e34711 AMDGPU: Use default operand for VOP3P clamp adds 41bd9ead35f [SystemZ] Return scalarized costs for vector instructions [...] adds 8c70a2597f5 [gn build] Port 23444edf30b adds a8db806d52c [SimplifyLibCalls][IRBuilder] Accept any IRBuilder in Simpl [...] adds c90ea87cfd7 [X86] Fix SDLoc initialization adds 98f5268a729 [VectorUtils] Move ToVectorTy to VectorUtils.h (NFC). adds deb0a8bfc49 [DSE,MSSA] Dbg counters required assertions. Mark test acco [...] adds 656dff9af48 [InstCombine] Use replaceOperand() in more places adds e4df934ca7b [Clang interpreter] Rename Block.{h,cpp} to InterpBlock.{h,cpp} adds 0e3e242209c [BFI] Fix missed BFI updates in MachineSink. adds b178555318c [InstCombine] Improve simplify demanded bits worklist management adds 31ec721516b [llvm][CodeGen] DAG Combiner folds for vscale. adds bc7b26c333f [MLIR] Allow Loop dialect IfOp and ForOp to define values adds 6b4a193defb [XCOFF][AIX] Put undefined symbol name into StringTable whe [...] adds 2769fb90f0a [LoopVectorize][X86] Regenerate tests. NFCI. adds 1723f219939 Fix MSVC "not all control paths return a value" warning. NFCI. adds 72eef820d52 AMDGPU/GlobalISel: Select G_SHUFFLE_VECTOR adds dfce5fd50a0 AMDGPU/GlobalISel: Select VOP3P instructions adds 4c1c9422a3a AMDGPU/GlobalISel: Select llvm.amdgcn.fdot2 adds db06870dbd5 AMDGPU: Move dot intrinsic patterns to instruction def adds 07d2cdae116 [lldb/cmake] Enable more verbose find_package output. adds 00955a62e43 AMDGPU/GlobalISel: Fix SALU mapping for v2s16 min/max adds 73d8d83a6d9 [ARM] Change ARMAttributeParser::Parse to use support::endi [...] adds 7dd6a862e5e [libc++] Do not set the `availability=XXX` feature when not [...] adds 266959c0f72 [AArch64][SVE] Add backend support for splats of immediates adds 0781e93a6ea [CodeGen][RISCV] Fix clang/test/CodeGen/atomic_ops.c for RISC-V adds 29ad9d6b26e [mlir][spirv] Add lowering for load/store zero-rank memref [...] adds 042d97eda9f [MLIR] Remove constexpr from LoopOps.td adds d2b7c09e79a [Hexagon] Simplify intrinsic (vandvrt (vandqrt q b) m) -> q [...] adds 69d757c0e8f Move StandardOps/Ops.h to StandardOps/IR/Ops.h adds e2ed1d14d6c [llvm][aarch64] SVE addressing modes. adds 34e3485560c [VectorCombine] refactor cost calcs to reduce duplication; NFC adds 33bf1196475 [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics [...] adds 446b150065c [IR] Update BasicBlock::validateInstrOrdering comments, NFC adds 8875ee18d72 [X86] Add a new format type for instructions that represent [...] adds 1874dee5662 [macho][NFC] Extract all CPU_(SUB_)TYPE logic to BinaryFormat adds 0bb90628b5f Allow customized relative PYTHONHOME adds 8fa776b8ed0 [gn build] Port 1874dee5662 adds e9c79a7aef1 [VectorCombine] refactor to reduce duplicated code; NFC adds b72f1448ce4 AMDGPU/GlobalISel: Better code for one case of G_SHUFFLE_VE [...] adds a5b22b768f5 [AArch64][SVE] Add support for DestructiveBinary and Destru [...] adds dc046c70de9 [llvm-objcopy][MachO] Change the storage of sections adds 1f04d1b7069 [lldb/test] Move `platform process list` tests to its own d [...] adds d7c403e6404 [lldb/Plugins] Add ability to fetch crash information on cr [...] adds 5c33a81b7a4 [AArch64][SVE] Fix -Wimplicit-fallthrough after D73711 adds a6c8698924d clang/Modules: Finish renaming CompilerInstance::ModuleMana [...] adds 0ad6fc9928d [SelectionDAG] remove unused isFast() helper function; NFC adds fad1c750f16 [AArch64][SVE] Fix -DBUILD_SHARED_LIBS=on builds after -D74 [...] adds fddbff14735 [AArch64] Delete an unneeded dependency on Object after 187 [...] adds d37cbda5f9a [Hexagon] Define __ELF__ by default. adds 0a70edd6962 [CloneFunction] Update loop headers after cloning all block [...] adds 9708279c725 [Attributor][FIX] Undo 16188f9 until SCC iterator bug is fixed adds 618dec2aeff [GISel][KnownBits] Add a cache mechanism to speed compile time

No new revisions were added by this update.

Summary of changes: clang-tools-extra/clang-tidy/add_new_check.py | 10 +- .../bugprone/ReservedIdentifierCheck.cpp | 2 + .../clang-tidy/misc/NoRecursionCheck.cpp | 9 +- .../clang-tidy/misc/RedundantExpressionCheck.cpp | 204 +- .../misc/UnconventionalAssignOperatorCheck.cpp | 7 +- .../readability/IdentifierNamingCheck.cpp | 2 + .../readability/RedundantStringCStrCheck.cpp | 59 +- clang-tools-extra/clang-tidy/rename_check.py | 32 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 1 + clang-tools-extra/clangd/FindTarget.cpp | 10 +- clang-tools-extra/clangd/Protocol.h | 2 + clang-tools-extra/clangd/refactor/Rename.cpp | 7 - .../clangd/test/initialize-params.test | 1 + .../clangd/unittests/FindTargetTests.cpp | 10 + clang-tools-extra/clangd/unittests/RenameTests.cpp | 17 + clang-tools-extra/clangd/unittests/XRefsTests.cpp | 12 + clang-tools-extra/docs/ReleaseNotes.rst | 1 - clang-tools-extra/docs/clang-tidy/checks/list.rst | 5 +- .../test/clang-tidy/checkers/misc-no-recursion.cpp | 52 +- .../checkers/misc-redundant-expression.cpp | 26 + .../misc-unconventional-assign-operator.cpp | 18 + .../checkers/modernize-use-default-member-init.cpp | 16 +- .../checkers/readability-redundant-string-cstr.cpp | 15 + clang/CMakeLists.txt | 2 +- .../python/tests/cindex/test_diagnostics.py | 2 +- clang/docs/LanguageExtensions.rst | 2 +- clang/docs/analyzer/checkers.rst | 32 + clang/examples/clang-interpreter/main.cpp | 2 +- clang/include/clang/AST/CommentSema.h | 3 + clang/include/clang/ASTMatchers/GtestMatchers.h | 45 + clang/include/clang/Analysis/CallGraph.h | 4 + clang/include/clang/Basic/BuiltinsHexagon.def | 16 +- clang/include/clang/Basic/BuiltinsHexagonDep.def | 328 +- .../clang/Basic/BuiltinsHexagonMapCustomDep.def | 206 ++ clang/include/clang/Basic/DiagnosticASTKinds.td | 6 +- clang/include/clang/Basic/DiagnosticCommonKinds.td | 2 +- .../include/clang/Basic/DiagnosticFrontendKinds.td | 6 +- clang/include/clang/Basic/DiagnosticGroups.td | 41 +- clang/include/clang/Basic/DiagnosticLexKinds.td | 12 +- clang/include/clang/Basic/DiagnosticParseKinds.td | 38 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 87 +- clang/include/clang/Basic/LangStandards.def | 10 +- clang/include/clang/Basic/StmtNodes.td | 2 +- clang/include/clang/Basic/arm_mve.td | 55 +- clang/include/clang/Basic/arm_mve_defs.td | 2 + clang/include/clang/Driver/Options.td | 9 +- clang/include/clang/Frontend/CompilerInstance.h | 3 +- clang/include/clang/Sema/Sema.h | 46 +- .../clang/StaticAnalyzer/Checkers/Checkers.td | 12 + .../Core/BugReporter/CommonBugCategories.h | 24 +- clang/include/clang/Tooling/Tooling.h | 3 +- clang/include/clang/module.modulemap | 1 + clang/lib/AST/ASTImporter.cpp | 26 +- clang/lib/AST/ASTStructuralEquivalence.cpp | 12 +- clang/lib/AST/CMakeLists.txt | 2 +- clang/lib/AST/CommentSema.cpp | 48 +- clang/lib/AST/ExprConstant.cpp | 45 +- clang/lib/AST/Interp/Block.cpp | 87 - clang/lib/AST/Interp/Block.h | 140 - clang/lib/AST/Interp/InterpBlock.cpp | 87 + clang/lib/AST/Interp/InterpBlock.h | 140 + clang/lib/AST/Interp/Pointer.cpp | 2 +- clang/lib/AST/Interp/Pointer.h | 4 +- clang/lib/ASTMatchers/CMakeLists.txt | 1 + clang/lib/ASTMatchers/GtestMatchers.cpp | 104 + clang/lib/Basic/Targets/AMDGPU.h | 1 + clang/lib/Basic/Targets/Hexagon.cpp | 2 + clang/lib/Basic/Targets/Hexagon.h | 6 + clang/lib/CodeGen/BackendUtil.cpp | 22 + clang/lib/CodeGen/CGBuiltin.cpp | 140 +- clang/lib/CodeGen/CGCall.cpp | 4 + clang/lib/CodeGen/CGDecl.cpp | 7 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 2 - clang/lib/CodeGen/CGStmtOpenMP.cpp | 125 +- clang/lib/CodeGen/CodeGenFunction.h | 109 + clang/lib/CodeGen/CodeGenTypes.cpp | 53 +- clang/lib/CodeGen/TargetInfo.cpp | 2 +- clang/lib/Driver/ToolChains/Clang.cpp | 5 +- clang/lib/Driver/ToolChains/Darwin.cpp | 2 +- clang/lib/Driver/ToolChains/Fuchsia.cpp | 2 +- clang/lib/Driver/ToolChains/Hexagon.cpp | 7 + clang/lib/Driver/ToolChains/Hurd.cpp | 2 +- clang/lib/Driver/ToolChains/Linux.cpp | 2 +- clang/lib/Driver/ToolChains/Solaris.cpp | 2 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 2 +- clang/lib/Format/FormatToken.h | 1 + clang/lib/Format/FormatTokenLexer.cpp | 35 + clang/lib/Format/FormatTokenLexer.h | 1 + clang/lib/Format/TokenAnnotator.cpp | 11 +- clang/lib/Format/UnwrappedLineParser.cpp | 11 +- clang/lib/Frontend/ChainedIncludesSource.cpp | 2 +- clang/lib/Frontend/CompilerInstance.cpp | 4 +- clang/lib/Frontend/FrontendAction.cpp | 4 +- clang/lib/Frontend/InitPreprocessor.cpp | 44 +- clang/lib/Index/IndexingContext.cpp | 11 +- clang/lib/Sema/OpenCLBuiltins.td | 6 +- clang/lib/Sema/Sema.cpp | 185 +- clang/lib/Sema/SemaCUDA.cpp | 19 + clang/lib/Sema/SemaChecking.cpp | 6 +- clang/lib/Sema/SemaCodeComplete.cpp | 11 +- clang/lib/Sema/SemaDecl.cpp | 18 +- clang/lib/Sema/SemaExpr.cpp | 94 +- clang/lib/Sema/SemaOpenMP.cpp | 158 +- clang/lib/Sema/UsedDeclVisitor.h | 70 - clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt | 1 + .../Checkers/cert/PutenvWithAutoChecker.cpp | 64 + .../StaticAnalyzer/Core/CommonBugCategories.cpp | 23 +- clang/lib/Tooling/Tooling.cpp | 4 +- .../test/Analysis/cert/pos34-c-fp-suppression.cpp | 51 + clang/test/Analysis/cert/pos34-c.cpp | 61 + .../basic/basic.lookup/basic.lookup.unqual/p3.cpp | 4 +- .../CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p2.cpp | 24 +- .../test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/p3.cpp | 72 +- .../test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/p4.cpp | 24 +- .../dcl.fct.def/dcl.fct.def.default/p1.cpp | 22 +- clang/test/CXX/drs/dr2xx.cpp | 6 +- clang/test/CXX/drs/dr6xx.cpp | 6 +- clang/test/CXX/expr/expr.const/p2-0x.cpp | 20 +- .../CXX/expr/expr.prim/expr.prim.lambda/p8.cpp | 6 +- clang/test/CodeCompletion/included-symlinks.cpp | 16 + clang/test/CodeGen/aarch64-sve.c | 50 +- clang/test/CodeGen/arm-mve-intrinsics/vbrsrq.c | 92 + .../CodeGen/arm-mve-intrinsics/vector-shift-imm.c | 64 +- clang/test/CodeGen/arm-mve-intrinsics/vmullbq.c | 24 +- clang/test/CodeGen/arm-mve-intrinsics/vmulltq.c | 24 +- clang/test/CodeGen/arm-mve-intrinsics/vqdmullbq.c | 125 + clang/test/CodeGen/arm-mve-intrinsics/vqdmulltq.c | 125 + clang/test/CodeGen/atomic_ops.c | 55 +- clang/test/CodeGen/builtins-hexagon-v66-128B.c | 2 +- clang/test/CodeGen/builtins-hexagon-v66.c | 2 +- clang/test/CodeGen/builtins-hvx128.c | 147 +- clang/test/CodeGen/builtins-hvx64.c | 147 +- .../CodeGen/non-power-of-2-alignment-assumptions.c | 46 + clang/test/CodeGen/vectorcall.c | 30 +- clang/test/CodeGen/xcoff-comdat.cpp | 10 + clang/test/CodeGenCXX/inalloca-vector.cpp | 19 +- .../test/CodeGenCoroutines/coro-newpm-pipeline.cpp | 57 + clang/test/Driver/aarch64-cpus.c | 25 + clang/test/Driver/arm-cde.c | 21 +- clang/test/Driver/clang_f_opts.c | 9 - clang/test/Driver/hexagon-toolchain-elf.c | 11 + clang/test/Driver/mfentry.c | 10 + clang/test/Driver/unknown-std.cpp | 4 +- .../test/Index/Core/index-instantiated-source.cpp | 34 + clang/test/Index/Core/index-source.cpp | 6 +- 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.../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 183 ++ llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 167 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 42 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 7 + llvm/lib/Target/AArch64/AArch64InstrFormats.td | 27 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 164 +- llvm/lib/Target/AArch64/AArch64InstrInfo.h | 44 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 354 +- .../Target/AArch64/AArch64StorePairSuppress.cpp | 4 +- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 3 + .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 10 + .../AArch64/MCTargetDesc/AArch64AsmBackend.cpp | 20 +- .../MCTargetDesc/AArch64MachObjectWriter.cpp | 2 +- llvm/lib/Target/AArch64/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 149 +- llvm/lib/Target/AMDGPU/AMDGPUGISel.td | 4 + llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp | 9 + llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h | 1 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 13 - llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 21 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 12 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 389 ++- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 14 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 65 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 1 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 93 +- llvm/lib/Target/AMDGPU/DSInstructions.td | 2 +- llvm/lib/Target/AMDGPU/GCNRegPressure.cpp | 9 +- llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp | 22 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 50 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 9 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 2 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 5 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 5 +- llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp | 26 +- llvm/lib/Target/AMDGPU/SIMachineScheduler.h | 6 - llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 69 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 25 - llvm/lib/Target/AMDGPU/VOP3Instructions.td | 24 +- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 61 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 151 + llvm/lib/Target/ARM/ARMISelLowering.h | 20 + llvm/lib/Target/ARM/ARMInstrCDE.td | 12 + llvm/lib/Target/ARM/ARMInstrFormats.td | 1 - llvm/lib/Target/ARM/ARMInstrMVE.td | 262 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 54 +- llvm/lib/Target/ARM/ARMParallelDSP.cpp | 22 +- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 98 +- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 35 +- .../Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h | 12 +- llvm/lib/Target/ARM/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/ARM/README-Thumb.txt | 2 +- llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp | 26 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 48 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 2 + llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 42 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 3 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.h | 2 +- llvm/lib/Target/Hexagon/HexagonIntrinsics.td | 70 - llvm/lib/Target/Hexagon/HexagonIntrinsicsV60.td | 64 +- llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonRegisterInfo.td | 6 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 3 - .../MCTargetDesc/HexagonELFObjectWriter.cpp | 2 +- .../Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp | 6 +- llvm/lib/Target/Lanai/LanaiInstrInfo.cpp | 3 +- llvm/lib/Target/Lanai/LanaiInstrInfo.h | 2 +- llvm/lib/Target/Mips/MicroMipsSizeReduction.cpp | 10 +- llvm/lib/Target/Mips/MipsCallLowering.cpp | 53 +- llvm/lib/Target/Mips/MipsInstrFPU.td | 1 + llvm/lib/Target/Mips/MipsInstructionSelector.cpp | 109 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 173 +- llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp | 15 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 131 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.h | 60 +- llvm/lib/Target/PowerPC/MCTargetDesc/LLVMBuild.txt | 2 +- .../Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 9 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 205 +- llvm/lib/Target/PowerPC/README.txt | 61 - llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 4 + llvm/lib/Target/RISCV/RISCVISelLowering.h | 1 + llvm/lib/Target/SystemZ/SystemZISelLowering.h | 8 + .../Target/SystemZ/SystemZTargetTransformInfo.cpp | 261 +- llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h | 6 + llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp | 54 +- llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h | 4 + llvm/lib/Target/VE/VEAsmPrinter.cpp | 71 + llvm/lib/Target/VE/VEISelLowering.cpp | 54 + llvm/lib/Target/VE/VEISelLowering.h | 4 + llvm/lib/Target/VE/VEInstrInfo.td | 26 + llvm/lib/Target/WebAssembly/CMakeLists.txt | 1 - .../MCTargetDesc/WebAssemblyInstPrinter.cpp | 36 +- .../MCTargetDesc/WebAssemblyInstPrinter.h | 3 +- .../MCTargetDesc/WebAssemblyMCTargetDesc.h | 115 +- llvm/lib/Target/WebAssembly/WebAssembly.h | 2 - .../WebAssembly/WebAssemblyCallIndirectFixup.cpp | 150 - .../WebAssembly/WebAssemblyExplicitLocals.cpp | 32 +- .../lib/Target/WebAssembly/WebAssemblyFastISel.cpp | 36 +- llvm/lib/Target/WebAssembly/WebAssemblyISD.def | 3 +- .../Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp | 29 + .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 75 +- .../lib/Target/WebAssembly/WebAssemblyInstrCall.td | 165 +- .../lib/Target/WebAssembly/WebAssemblyInstrInfo.td | 9 - .../WebAssembly/WebAssemblyLateEHPrepare.cpp | 2 +- .../Target/WebAssembly/WebAssemblyMCInstLower.cpp | 11 +- .../WebAssembly/WebAssemblyMemIntrinsicResults.cpp | 3 +- .../lib/Target/WebAssembly/WebAssemblyPeephole.cpp | 3 +- .../Target/WebAssembly/WebAssemblyRegStackify.cpp | 160 +- .../WebAssembly/WebAssemblyTargetMachine.cpp | 6 - .../Target/WebAssembly/WebAssemblyTargetMachine.h | 2 +- .../Target/WebAssembly/WebAssemblyUtilities.cpp | 19 +- llvm/lib/Target/WebAssembly/WebAssemblyUtilities.h | 4 + llvm/lib/Target/X86/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 306 +- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 10 + .../Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 675 ++-- llvm/lib/Target/X86/X86ISelLowering.h | 3 +- llvm/lib/Target/X86/X86InstrAVX512.td | 4 +- llvm/lib/Target/X86/X86InstrCompiler.td | 8 +- llvm/lib/Target/X86/X86InstrFormats.td | 1 + llvm/lib/Target/X86/X86InstrInfo.cpp | 3 +- llvm/lib/Target/X86/X86InstrInfo.h | 2 +- llvm/lib/Target/X86/X86InstrInfo.td | 10 +- llvm/lib/Target/X86/X86InstrSystem.td | 12 +- llvm/lib/Target/X86/X86InstrTSX.td | 4 +- llvm/lib/Target/XCore/XCoreISelLowering.cpp | 1 + llvm/lib/Target/XCore/XCoreInstrInfo.td | 3 + llvm/lib/Transforms/Coroutines/CoroCleanup.cpp | 28 +- llvm/lib/Transforms/Coroutines/CoroElide.cpp | 56 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 167 +- llvm/lib/Transforms/IPO/Attributor.cpp | 151 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 97 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 12 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 21 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 2 + .../InstCombine/InstructionCombining.cpp | 36 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 48 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 13 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 6 +- llvm/lib/Transforms/Scalar/LICM.cpp | 3 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 7 + .../lib/Transforms/Scalar/SpeculativeExecution.cpp | 3 - llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 3 +- llvm/lib/Transforms/Utils/BuildLibCalls.cpp | 85 +- llvm/lib/Transforms/Utils/CloneFunction.cpp | 7 +- llvm/lib/Transforms/Utils/InjectTLIMappings.cpp | 9 - llvm/lib/Transforms/Utils/KnowledgeRetention.cpp | 109 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 14 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 237 +- .../Transforms/Vectorize/LoadStoreVectorizer.cpp | 16 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 9 - llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 13 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 213 +- .../Analysis/ConstantFolding/AMDGPU/fmul_legacy.ll | 44 + .../AMDGPU/lit.local.cfg | 0 llvm/test/Analysis/ConstantFolding/fp-undef.ll | 535 +++ .../Analysis/CostModel/SystemZ/oldarch-vectors.ll | 13 + llvm/test/Analysis/DDG/basic-a.ll | 63 +- llvm/test/Analysis/DDG/basic-b.ll | 82 +- llvm/test/Analysis/DDG/basic-loopnest.ll | 105 +- .../MemoryDependenceAnalysis/memdep_with_tbaa.ll | 125 + .../MustExecute/must_be_executed_context.ll | 178 +- llvm/test/Assembler/summary-flags.ll | 12 + llvm/test/CodeGen/AArch64/O0-pipeline.ll | 1 + llvm/test/CodeGen/AArch64/O3-pipeline.ll | 1 + llvm/test/CodeGen/AArch64/cpus.ll | 1 + llvm/test/CodeGen/AArch64/remat.ll | 1 + llvm/test/CodeGen/AArch64/sve-gep.ll | 139 + .../sve-intrinsics-contiguous-prefetches.ll | 252 ++ .../AArch64/sve-intrinsics-fp-arith-merging.ll | 261 ++ ...pred-contiguous-ldst-addressing-mode-reg-imm.ll | 622 ++++ ...pred-contiguous-ldst-addressing-mode-reg-reg.ll | 610 ++++ ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 171 + ...ed-non-temporal-ldst-addressing-mode-reg-reg.ll | 145 + llvm/test/CodeGen/AArch64/sve-vector-splat.ll | 190 +- llvm/test/CodeGen/AArch64/sve-vscale-combine.ll | 97 + llvm/test/CodeGen/AArch64/sve2-bitwise-ternary.ll | 284 ++ .../sve2-intrinsics-polynomial-arithmetic-128.ll | 31 + .../sve2-intrinsics-polynomial-arithmetic.ll | 149 + .../AArch64/sve2-intrinsics-widening-dsp.ll | 572 ++++ .../CodeGen/AArch64/vecreduce-and-legalization.ll | 4 +- .../AMDGPU/GlobalISel/combine-ashr-narrow.mir | 4 +- .../AMDGPU/GlobalISel/constant-bus-restriction.ll | 67 + .../AMDGPU/GlobalISel/divergent-control-flow.ll | 53 +- llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll | 542 +++ llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll | 619 ++++ .../inst-select-amdgpu-atomic-cmpxchg-global.mir | 826 +++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-and.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-ashr.v2s16.mir | 54 +- .../inst-select-build-vector-trunc.v2s16.mir | 272 +- .../AMDGPU/GlobalISel/inst-select-fadd.s32.mir | 90 +- .../AMDGPU/GlobalISel/inst-select-fadd.s64.mir | 90 +- .../GlobalISel/inst-select-fcanonicalize.mir | 14 +- .../GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir | 11 +- .../GlobalISel/inst-select-fmaxnum.v2s16.mir | 11 +- .../GlobalISel/inst-select-fminnum-ieee.v2s16.mir | 10 +- .../GlobalISel/inst-select-fminnum.v2s16.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-fmul.v2s16.mir | 74 + .../AMDGPU/GlobalISel/inst-select-lshr.v2s16.mir | 54 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-pattern-or3.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-pattern-xor3.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-shl.v2s16.mir | 55 +- .../inst-select-shuffle-vector.v2s16.mir | 740 +++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir | 8 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir | 306 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll | 183 ++ .../AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll | 136 + .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll | 388 +++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll | 141 + .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll | 94 + .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll | 388 +++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll | 141 + .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll | 94 + .../test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll | 194 ++ .../AMDGPU/GlobalISel/regbankselect-smax.mir | 244 +- .../AMDGPU/GlobalISel/regbankselect-smin.mir | 247 +- .../AMDGPU/GlobalISel/regbankselect-umax.mir | 249 +- .../AMDGPU/GlobalISel/regbankselect-umin.mir | 253 +- llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll | 272 ++ llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ll | 11 + .../CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll | 4 +- llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll | 4 +- llvm/test/CodeGen/AMDGPU/bypass-div.ll | 1208 +++++++ llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 194 +- llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll | 4 +- llvm/test/CodeGen/AMDGPU/hsa.ll | 3 +- llvm/test/CodeGen/AMDGPU/idot4s.ll | 40 +- llvm/test/CodeGen/AMDGPU/idot4u.ll | 33 +- llvm/test/CodeGen/AMDGPU/idot8s.ll | 246 +- llvm/test/CodeGen/AMDGPU/imm.ll | 1734 ++++++++-- llvm/test/CodeGen/AMDGPU/imm16.ll | 891 ++++- llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll | 2 +- llvm/test/CodeGen/AMDGPU/sdiv64.ll | 4 +- llvm/test/CodeGen/AMDGPU/sdivrem64.r600.ll | 2 +- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 35 + .../AMDGPU/speculative-execution-freecasts.ll | 30 + llvm/test/CodeGen/AMDGPU/srem64.ll | 4 +- llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 44 +- llvm/test/CodeGen/AMDGPU/udiv64.ll | 97 +- llvm/test/CodeGen/AMDGPU/urem64.ll | 4 +- llvm/test/CodeGen/ARM/rotate.ll | 11 +- .../CodeGen/Hexagon/autohvx/bitwise-pred-128b.ll | 2 +- .../Hexagon/autohvx/vector-predicate-typecast.ll | 31 + .../CodeGen/Hexagon/bug-aa4463-ifconv-vecpred.ll | 30 +- .../test/CodeGen/Hexagon/convert_const_i1_to_i8.ll | 4 +- llvm/test/CodeGen/Hexagon/early-if-vecpred.ll | 13 +- llvm/test/CodeGen/Hexagon/eliminate-pred-spill.ll | 114 +- llvm/test/CodeGen/Hexagon/hvx-byte-store-double.ll | 27 +- llvm/test/CodeGen/Hexagon/hvx-byte-store.ll | 27 +- llvm/test/CodeGen/Hexagon/hvx-dbl-dual-output.ll | 29 +- llvm/test/CodeGen/Hexagon/hvx-dual-output.ll | 29 +- llvm/test/CodeGen/Hexagon/inline-asm-qv.ll | 7 +- llvm/test/CodeGen/Hexagon/inline-asm-vecpred128.ll | 2 +- llvm/test/CodeGen/Hexagon/intrinsics-v60-alu.ll | 73 +- llvm/test/CodeGen/Hexagon/intrinsics-v60-misc.ll | 147 +- llvm/test/CodeGen/Hexagon/intrinsics-v60-vcmp.ll | 301 +- .../Hexagon/intrinsics/byte-store-double.ll | 26 +- llvm/test/CodeGen/Hexagon/intrinsics/byte-store.ll | 26 +- .../Hexagon/intrinsics/v65-gather-double.ll | 20 +- llvm/test/CodeGen/Hexagon/intrinsics/v65-gather.ll | 20 +- .../Hexagon/intrinsics/v65-scatter-double.ll | 19 +- .../test/CodeGen/Hexagon/intrinsics/v65-scatter.ll | 19 +- llvm/test/CodeGen/Hexagon/intrinsics/v65.ll | 18 +- llvm/test/CodeGen/Hexagon/late_instr.ll | 26 +- llvm/test/CodeGen/Hexagon/peephole-move-phi.ll | 22 +- llvm/test/CodeGen/Hexagon/prof-early-if.ll | 2 +- llvm/test/CodeGen/Hexagon/reg-scavengebug-2.ll | 48 +- llvm/test/CodeGen/Hexagon/reg-scavengebug-3.ll | 16 +- llvm/test/CodeGen/Hexagon/reg-scavengebug-4.ll | 16 +- .../CodeGen/Hexagon/reg-scavenger-valid-slot.ll | 16 +- llvm/test/CodeGen/Hexagon/split-vecpred.ll | 24 +- llvm/test/CodeGen/Hexagon/swp-prolog-phi.ll | 12 +- llvm/test/CodeGen/Hexagon/swp-sigma.ll | 54 +- llvm/test/CodeGen/Hexagon/v6-inlasm4.ll | 9 +- llvm/test/CodeGen/Hexagon/v6-spill1.ll | 60 +- llvm/test/CodeGen/Hexagon/v6-unaligned-spill.ll | 4 +- llvm/test/CodeGen/Hexagon/v6-vecpred-copy.ll | 75 +- llvm/test/CodeGen/Hexagon/v60-vecpred-spill.ll | 60 +- llvm/test/CodeGen/Hexagon/v60-vsel1.ll | 14 +- llvm/test/CodeGen/Hexagon/v60-vsel2.ll | 14 +- llvm/test/CodeGen/Hexagon/v60Intrins.ll | 444 +-- llvm/test/CodeGen/Hexagon/v60_sort16.ll | 9 +- llvm/test/CodeGen/Hexagon/v60small.ll | 26 +- llvm/test/CodeGen/Hexagon/v62-inlasm4.ll | 9 +- llvm/test/CodeGen/Hexagon/v6vect-dbl-spill.ll | 84 +- llvm/test/CodeGen/Hexagon/v6vect-pred2.ll | 9 +- llvm/test/CodeGen/Hexagon/v6vect-spill-kill.ll | 78 +- llvm/test/CodeGen/Hexagon/vec-pred-spill1.ll | 21 +- llvm/test/CodeGen/Hexagon/vecPred2Vec.ll | 15 +- llvm/test/CodeGen/Hexagon/vect-downscale.ll | 8 +- llvm/test/CodeGen/Hexagon/vector-align.ll | 19 +- llvm/test/CodeGen/Hexagon/vselect-pseudo.ll | 4 +- .../GlobalISel/instruction-select/float_args.mir | 78 +- .../instruction-select/load_4_unaligned.mir | 89 + .../instruction-select/load_4_unaligned_r6.mir | 90 + .../Mips/GlobalISel/instruction-select/phi.mir | 18 +- .../Mips/GlobalISel/instruction-select/select.mir | 24 +- .../instruction-select/sitofp_and_uitofp.mir | 42 + .../instruction-select/store_4_unaligned.mir | 99 + .../instruction-select/store_4_unaligned_r6.mir | 96 + .../Mips/GlobalISel/irtranslator/float_args.ll | 62 +- .../Mips/GlobalISel/legalizer/load_4_unaligned.mir | 239 ++ .../load_split_because_of_memsize_or_align | 1146 +++++++ .../test/CodeGen/Mips/GlobalISel/legalizer/phi.mir | 156 +- .../CodeGen/Mips/GlobalISel/legalizer/select.mir | 14 +- .../GlobalISel/legalizer/sitofp_and_uitofp.mir | 96 +- .../GlobalISel/legalizer/store_4_unaligned.mir | 271 ++ .../store_split_because_of_memsize_or_align.mir | 1113 +++++++ .../CodeGen/Mips/GlobalISel/llvm-ir/float_args.ll | 47 +- .../Mips/GlobalISel/llvm-ir/load_4_unaligned.ll | 182 + .../load_split_because_of_memsize_or_align.ll | 692 ++++ llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll | 23 +- .../test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll | 2 +- .../Mips/GlobalISel/llvm-ir/store_4_unaligned.ll | 178 + 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mlir/test/lit.cfg.py | 3 +- mlir/test/lit.site.cfg.py.in | 2 + mlir/test/mlir-tblgen/op-attribute.td | 14 +- mlir/test/mlir-tblgen/predicate.td | 2 +- mlir/test/mlir-vulkan-runner/addf.mlir | 45 + mlir/test/mlir-vulkan-runner/lit.local.cfg | 2 + mlir/tools/CMakeLists.txt | 1 + mlir/tools/mlir-opt/CMakeLists.txt | 1 + mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 93 +- mlir/tools/mlir-tblgen/StructsGen.cpp | 56 +- mlir/tools/mlir-vulkan-runner/CMakeLists.txt | 105 + mlir/tools/mlir-vulkan-runner/VulkanRuntime.cpp | 717 ++++ mlir/tools/mlir-vulkan-runner/VulkanRuntime.h | 225 ++ .../mlir-vulkan-runner/mlir-vulkan-runner.cpp | 46 + .../mlir-vulkan-runner/vulkan-runtime-wrappers.cpp | 97 + mlir/unittests/TableGen/StructsGenTest.cpp | 10 +- mlir/unittests/TableGen/structs.td | 4 +- openmp/runtime/test/lit.cfg | 7 + openmp/runtime/test/ompt/teams/parallel_team.c | 2 +- openmp/runtime/test/ompt/teams/serial_teams.c | 2 +- 1742 files changed, 66477 insertions(+), 26855 deletions(-) create mode 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