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from c8238de61fc Changed EOL back to LF. NFC. new 9a18b7e82aa [X86] Adding ISel tests for strided-shuffles with non-zero [...] new 20f8334c2a8 Add an ID field to StackObjects new 524fde4af11 AMDGPU: Rename _RTN atomic instructions

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Summary of changes: include/llvm/CodeGen/MIRYamlMapping.h | 6 + include/llvm/CodeGen/MachineFrameInfo.h | 31 +- include/llvm/CodeGen/MachineMemOperand.h | 20 +- lib/CodeGen/MIRParser/MIRParser.cpp | 3 + lib/CodeGen/MIRPrinter.cpp | 2 + lib/CodeGen/MachineFrameInfo.cpp | 9 +- lib/CodeGen/MachineInstr.cpp | 5 +- lib/CodeGen/StackSlotColoring.cpp | 8 +- lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 8 +- lib/Target/AMDGPU/BUFInstructions.td | 44 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 2 + .../AArch64/GlobalISel/arm64-irtranslator.ll | 11 +- test/CodeGen/AArch64/GlobalISel/call-translator.ll | 3 +- .../AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir | 34 + .../MIR/AArch64/stack-object-local-offset.mir | 6 +- test/CodeGen/MIR/AMDGPU/stack-id.mir | 35 + test/CodeGen/MIR/X86/callee-saved-info.mir | 2 +- test/CodeGen/MIR/X86/fixed-stack-objects.mir | 3 +- .../MIR/X86/spill-slot-fixed-stack-objects.mir | 3 +- test/CodeGen/MIR/X86/stack-objects.mir | 9 +- .../MIR/X86/variable-sized-stack-objects.mir | 6 +- .../X86/GlobalISel/irtranslator-callingconv.ll | 150 +- .../CodeGen/X86/shuffle-strided-with-offset-128.ll | 907 ++++++++++++ .../CodeGen/X86/shuffle-strided-with-offset-256.ll | 1255 +++++++++++++++++ .../CodeGen/X86/shuffle-strided-with-offset-512.ll | 1479 ++++++++++++++++++++ 25 files changed, 3938 insertions(+), 103 deletions(-) create mode 100644 test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir create mode 100644 test/CodeGen/MIR/AMDGPU/stack-id.mir create mode 100644 test/CodeGen/X86/shuffle-strided-with-offset-128.ll create mode 100644 test/CodeGen/X86/shuffle-strided-with-offset-256.ll create mode 100644 test/CodeGen/X86/shuffle-strided-with-offset-512.ll