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from 251c275495c [IR][PatternMatch] Introduce m_NegatedPower2() matcher new 53c99836bc3 AMDGPU: Don't assert on v4f16 arguments to shader calling c [...] new 4c4779b1bb1 [AArch64][SVE] Allow explicit size specifier for predicate operand
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Summary of changes: lib/Target/AArch64/SVEInstrFormats.td | 23 ++++++++++++++-------- lib/Target/AMDGPU/SIISelLowering.cpp | 3 ++- test/CodeGen/AMDGPU/calling-conventions.ll | 31 ++++++++++++++++++++++++++++++ test/MC/AArch64/SVE/decp.s | 26 +++++++++++++++++++++---- test/MC/AArch64/SVE/incp.s | 28 ++++++++++++++++++++++----- test/MC/AArch64/SVE/sqdecp.s | 28 ++++++++++++++++++++++----- test/MC/AArch64/SVE/sqincp.s | 28 ++++++++++++++++++++++----- test/MC/AArch64/SVE/uqdecp.s | 28 ++++++++++++++++++++++----- test/MC/AArch64/SVE/uqincp.s | 28 ++++++++++++++++++++++----- 9 files changed, 185 insertions(+), 38 deletions(-)