This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig in repository toolchain/ci/llvm-project.
from 7264a474b7c Change std::{lower,upper}_bound to llvm::{lower,upper}_boun [...] adds e6020f5c62e [clang-tidy] new check: bugprone-posix-return adds f82672873a2 MSan: handle callbr instructions adds ac407a7b4a9 [SCEV][LSR] Prevent using undefined value in binops adds c4b83a6054b [Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of- [...] adds 9f0c83902de [InstCombine] Y - ~X --> X + Y + 1 fold (PR42457) adds 71600be3f38 Fix MSVC "not all control paths return a value" warnings. NFCI. adds 1bc2cccf18b Remove some autoconf references from docs and comments adds 830b20344bd [ARM] Thumb2: favor R4-R7 over R12/LR in allocation order w [...] adds 347692e2ded [ELF] Allow placing SHF_MERGE sections with different align [...] adds 7b7b9b78a2d [X86] LowerFunnelShift - use modulo constant shift amount. adds 080014ee6df [clang-tidy] Fix the YAML created for checks like modernize [...] adds 64e3a515344 Fix uninitialized variable warnings. NFCI. adds a372bb21c36 Fix MSVC "signed/unsigned mismatch" warning. NFCI. adds e5dfbe83b60 [mips] Replace some itineraries by instructions in the gene [...] adds b04f6a1a25d [mips] Add missing MSA and ASE instructions to general sche [...] adds dc3c67bbe21 [mips] Add missing mips16 instructions to general schedulin [...] adds 3e41b97f141 [mips] Add SIGRIE,GINVI,GINVT to general scheduling definitions adds 8853bd95920 [X86][SSE] LowerScalarImmediateShift - ensure shift amount [...] adds 8df90b843d1 [X86][SSE] LowerINSERT_VECTOR_ELT - ensure insertion index [...] adds 85211c08357 [Dominators] PR42041: Skip nullpointer successors adds 8c099cbe7cc [X86][SSE] lowerUINT_TO_FP_v2i32 - explicitly cast half wor [...] adds 71a9dc39e4f [analyzer][Dominator] Add post dominators to CFG + a new de [...] adds c4b89fec5fc Specialize an anchor() function in the correct namespace adds b069bbf510e Make a buildbot using a buggy gcc happy adds bc7f30e85c6 Fix -Wcast-qual const warning. NFCI. adds 3e4c7eb33ef [mips] Add missing microMIPS instructions to general schedu [...] adds 4d364659f9d [mips] Add missing atomic instructions to general schedulin [...] adds a10bf0939d6 [mips] Mark general scheduling model as complete adds 5cf3cc62460 [ELF][RISCV] Allow R_RISCV_ADD in relocateNonAlloc() adds 00aab1d45e1 [analyzer][CFG] Return the correct terminator condition adds 9854d771bd1 Revert "[analyzer][CFG] Return the correct terminator condition" adds 1665dd63466 [CMake] Avoid libcxxabi dependency when building LLDB from [...] adds 250015bacf7 [llvm-ar][test] Add to MRI test coverage adds 5cacb914758 [ThinLTO] Optimize writeonly globals out adds 0c230209fe2 [X86][AVX] combineX86ShuffleChainWithExtract - add number o [...] adds e26ca966fba [docs][llvm-objcopy] Write documentation for llvm-objcopy adds fa4aac7335a [SelectionDAG] Propagate alias metadata to target intrinsic nodes adds 868d0b7fd99 [X86][AVX] Combine vpermi(bitcast(x)) -> bitcast(vpermi(x)) adds d63d14f76b9 [scudo][standalone] Potential fix for missing sized delete adds 6005681ac61 [ARM] Fix for NDEBUG builds adds 79e50166f83 [ThinLTO] Fix gcc warnings from commit adds b9bc9f67f57 Revert D63432 "[ELF] Allow placing SHF_MERGE sections with [...] adds 4e225deab4d [ELF][RISCV] Error on R_RISCV_PCREL_LO12_[IS] that point to [...] adds 783dbe402f1 [X86][AVX] combineX86ShufflesRecursively - peek through ext [...] adds bddb8c35973 [DAGCombine] More diamong carry pattern optimization.
No new revisions were added by this update.
Summary of changes: .../clang-tidy/bugprone/BugproneTidyModule.cpp | 3 + .../clang-tidy/bugprone/CMakeLists.txt | 1 + .../clang-tidy/bugprone/PosixReturnCheck.cpp | 82 ++ .../clang-tidy/bugprone/PosixReturnCheck.h | 30 + clang-tools-extra/docs/ReleaseNotes.rst | 6 + .../clang-tidy/checks/bugprone-posix-return.rst | 20 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../test/clang-tidy/bugprone-posix-return.cpp | 127 +++ clang/include/clang/Analysis/Analyses/Dominators.h | 216 +++-- .../clang/StaticAnalyzer/Checkers/Checkers.td | 4 + clang/include/clang/Tooling/ReplacementsYaml.h | 8 +- clang/lib/AST/ExprConstant.cpp | 4 +- clang/lib/Analysis/Dominators.cpp | 10 +- clang/lib/Basic/SourceManager.cpp | 3 +- .../lib/StaticAnalyzer/Checkers/DebugCheckers.cpp | 30 +- clang/test/Analysis/domtest.c | 224 +++-- clang/test/Analysis/domtest.cpp | 64 ++ clang/unittests/Tooling/ReplacementsYamlTest.cpp | 24 + .../lib/scudo/standalone/tests/CMakeLists.txt | 2 +- .../scudo/standalone/tests/wrappers_cpp_test.cc | 3 + lld/ELF/InputSection.cpp | 7 +- lld/test/ELF/riscv-pcrel-hilo-error.s | 7 + lld/test/ELF/riscv-reloc-add.s | 6 + lldb/cmake/caches/Apple-lldb-base.cmake | 3 + llvm/docs/CMake.rst | 8 +- llvm/docs/CommandGuide/llvm-objcopy.md | 16 - llvm/docs/CommandGuide/llvm-objcopy.rst | 482 +++++++++++ llvm/docs/FAQ.rst | 6 - llvm/docs/HowToReleaseLLVM.rst | 3 +- llvm/docs/ProgrammersManual.rst | 4 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 3 +- llvm/include/llvm/CodeGen/TargetLowering.h | 10 + llvm/include/llvm/CodeGen/TargetSubtargetInfo.h | 8 + llvm/include/llvm/IR/ModuleSummaryIndex.h | 67 +- llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | 110 ++- llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 4 +- llvm/lib/AsmParser/LLParser.cpp | 57 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 47 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 32 +- llvm/lib/CodeGen/RegisterClassInfo.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 150 +++- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 10 +- llvm/lib/IR/AsmWriter.cpp | 5 +- llvm/lib/IR/ModuleSummaryIndex.cpp | 141 ++-- llvm/lib/LTO/LTO.cpp | 21 +- llvm/lib/Support/Errno.cpp | 2 +- llvm/lib/Support/PrettyStackTrace.cpp | 2 +- llvm/lib/Support/Unix/Unix.h | 2 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 5 + llvm/lib/Target/AArch64/AArch64ISelLowering.h | 2 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 16 +- llvm/lib/Target/ARM/ARMISelLowering.h | 3 + llvm/lib/Target/ARM/ARMRegisterInfo.td | 15 +- llvm/lib/Target/ARM/ARMSubtarget.cpp | 42 + llvm/lib/Target/ARM/ARMSubtarget.h | 4 + llvm/lib/Target/Mips/Mips16InstrInfo.td | 8 +- llvm/lib/Target/Mips/MipsScheduleGeneric.td | 927 ++++++++++++++++----- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 4 + llvm/lib/Target/PowerPC/PPCISelLowering.h | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 79 +- llvm/lib/Transforms/IPO/FunctionImport.cpp | 12 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 6 + .../Transforms/Instrumentation/MemorySanitizer.cpp | 42 +- llvm/lib/Transforms/Utils/FunctionImportUtils.cpp | 13 +- llvm/test/Assembler/thinlto-summary.ll | 14 +- llvm/test/Assembler/thinlto-vtable-summary.ll | 4 +- llvm/test/Bitcode/summary_version.ll | 2 +- llvm/test/Bitcode/thinlto-alias.ll | 4 +- llvm/test/Bitcode/thinlto-alias2.ll | 2 +- .../thinlto-function-summary-callgraph-cast.ll | 4 +- .../thinlto-function-summary-callgraph-pgo.ll | 4 +- ...o-function-summary-callgraph-profile-summary.ll | 4 +- .../thinlto-function-summary-callgraph-relbf.ll | 2 +- ...ion-summary-callgraph-sample-profile-summary.ll | 4 +- .../Bitcode/thinlto-function-summary-callgraph.ll | 2 +- .../Bitcode/thinlto-function-summary-refgraph.ll | 16 +- llvm/test/CodeGen/AArch64/inc-of-add.ll | 21 +- llvm/test/CodeGen/AArch64/sub-of-not.ll | 16 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll | 7 +- llvm/test/CodeGen/ARM/avoid-cpsr-rmw.ll | 2 +- llvm/test/CodeGen/ARM/favor-low-reg-for-Osize.ll | 29 + llvm/test/CodeGen/ARM/inc-of-add.ll | 117 +-- llvm/test/CodeGen/ARM/lsr-undef-in-binop.ll | 251 ++++++ llvm/test/CodeGen/ARM/sub-of-not.ll | 398 ++++----- llvm/test/CodeGen/PowerPC/inc-of-add.ll | 401 +++++---- llvm/test/CodeGen/PowerPC/sub-of-not.ll | 490 +++++------ llvm/test/CodeGen/X86/addcarry.ll | 10 +- llvm/test/CodeGen/X86/pr29112.ll | 83 +- .../test/CodeGen/X86/shuffle-vs-trunc-512-widen.ll | 16 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll | 16 +- llvm/test/CodeGen/X86/sub-of-not.ll | 96 +-- llvm/test/CodeGen/X86/subcarry.ll | 32 +- llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll | 9 +- .../MemorySanitizer/msan_asm_conservative.ll | 31 + llvm/test/ThinLTO/X86/Inputs/dot-dumper2.ll | 4 + llvm/test/ThinLTO/X86/dot-dumper2.ll | 43 + llvm/test/ThinLTO/X86/index-const-prop2.ll | 44 +- llvm/test/ThinLTO/X86/writeonly.ll | 41 + llvm/test/ThinLTO/X86/writeonly2.ll | 50 ++ .../InstCombine/fold-sub-of-not-to-inc-of-add.ll | 15 +- .../LoopDistribute/bounds-expansion-bug.ll | 16 +- llvm/test/tools/llvm-ar/mri-addlib.test | 45 + llvm/test/tools/llvm-ar/mri-addmod.test | 27 + llvm/test/tools/llvm-ar/mri-comments.test | 19 + llvm/test/tools/llvm-ar/mri-end.test | 48 ++ llvm/test/tools/llvm-ar/mri-utf8.test | 18 + 107 files changed, 4194 insertions(+), 1526 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/bugprone/PosixReturnCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/bugprone/PosixReturnCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/bugprone-posix-return.rst create mode 100644 clang-tools-extra/test/clang-tidy/bugprone-posix-return.cpp create mode 100644 clang/test/Analysis/domtest.cpp create mode 100644 lld/test/ELF/riscv-pcrel-hilo-error.s delete mode 100644 llvm/docs/CommandGuide/llvm-objcopy.md create mode 100644 llvm/docs/CommandGuide/llvm-objcopy.rst create mode 100644 llvm/test/CodeGen/ARM/favor-low-reg-for-Osize.ll create mode 100644 llvm/test/CodeGen/ARM/lsr-undef-in-binop.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/dot-dumper2.ll create mode 100644 llvm/test/ThinLTO/X86/dot-dumper2.ll create mode 100644 llvm/test/ThinLTO/X86/writeonly.ll create mode 100644 llvm/test/ThinLTO/X86/writeonly2.ll create mode 100644 llvm/test/tools/llvm-ar/mri-addlib.test create mode 100644 llvm/test/tools/llvm-ar/mri-addmod.test create mode 100644 llvm/test/tools/llvm-ar/mri-comments.test create mode 100644 llvm/test/tools/llvm-ar/mri-end.test create mode 100644 llvm/test/tools/llvm-ar/mri-utf8.test