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from 94edab2572a [gn build] Make `ninja check-lld` also run LLD's unit tests new a94c9341011 [asan] Prevent folding of globals with redzones new b7cd6fd37a7 [asan] Undo special treatment of linkonce_odr and weak_odr new c6f008464fe AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/ato [...] new e675164b4b1 AMDGPU/GlobalISel: RegBankSelect for fp conversions

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Summary of changes: lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 16 +++++ lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 32 ++++++++++ lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 2 + .../Instrumentation/AddressSanitizer.cpp | 10 +-- .../AMDGPU/GlobalISel/legalize-atomic-cmpxchg.mir | 71 ++++++++++++++++++++++ .../AMDGPU/GlobalISel/legalize-atomicrmw-add.mir | 63 +++++++++++++++++++ .../AMDGPU/GlobalISel/legalize-atomicrmw-and.mir | 63 +++++++++++++++++++ .../AMDGPU/GlobalISel/legalize-atomicrmw-max.mir | 63 +++++++++++++++++++ .../AMDGPU/GlobalISel/legalize-atomicrmw-min.mir | 63 +++++++++++++++++++ .../AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir | 22 +++++++ .../AMDGPU/GlobalISel/legalize-atomicrmw-or.mir | 63 +++++++++++++++++++ .../AMDGPU/GlobalISel/legalize-atomicrmw-sub.mir | 63 +++++++++++++++++++ .../AMDGPU/GlobalISel/legalize-atomicrmw-umax.mir | 63 +++++++++++++++++++ .../AMDGPU/GlobalISel/legalize-atomicrmw-umin.mir | 63 +++++++++++++++++++ .../GlobalISel/legalize-atomicrmw-xchg-flat.mir | 36 +++++++++++ .../AMDGPU/GlobalISel/legalize-atomicrmw-xchg.mir | 63 +++++++++++++++++++ .../AMDGPU/GlobalISel/legalize-atomicrmw-xor.mir | 63 +++++++++++++++++++ .../CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir | 17 ++++++ .../GlobalISel/regbankselect-atomic-cmpxchg.mir | 66 ++++++++++++++++++++ .../GlobalISel/regbankselect-atomicrmw-add.mir | 57 +++++++++++++++++ .../GlobalISel/regbankselect-atomicrmw-and.mir | 57 +++++++++++++++++ .../GlobalISel/regbankselect-atomicrmw-max.mir | 57 +++++++++++++++++ .../GlobalISel/regbankselect-atomicrmw-min.mir | 57 +++++++++++++++++ .../GlobalISel/regbankselect-atomicrmw-or.mir | 57 +++++++++++++++++ .../GlobalISel/regbankselect-atomicrmw-sub.mir | 57 +++++++++++++++++ .../GlobalISel/regbankselect-atomicrmw-umax.mir | 57 +++++++++++++++++ .../GlobalISel/regbankselect-atomicrmw-umin.mir | 57 +++++++++++++++++ .../GlobalISel/regbankselect-atomicrmw-xchg.mir | 57 +++++++++++++++++ .../GlobalISel/regbankselect-atomicrmw-xor.mir | 57 +++++++++++++++++ .../AMDGPU/GlobalISel/regbankselect-fptrunc.mir | 31 ++++++++++ .../AMDGPU/GlobalISel/regbankselect-sitofp.mir | 31 ++++++++++ .../AMDGPU/GlobalISel/regbankselect-uitofp.mir | 31 ++++++++++ .../AddressSanitizer/global_cstring_darwin.ll | 10 +-- .../AddressSanitizer/global_metadata.ll | 2 +- .../AddressSanitizer/global_metadata_array.ll | 2 +- .../AddressSanitizer/global_metadata_windows.ll | 4 +- .../AddressSanitizer/win-string-literal.ll | 4 +- 37 files changed, 1572 insertions(+), 15 deletions(-) create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-add.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-and.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-max.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-min.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-or.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-sub.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-umax.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-umin.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xor.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomic-cmpxchg.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-add.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-and.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-max.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-min.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-or.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-sub.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-umax.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-umin.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-xchg.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-xor.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptrunc.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir